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202b84ae59
The Kona PHY supports an 8-bit wide UTMI interface, therefore, choose this Kconfig setting. Signed-off-by: Steve Rae <srae@broadcom.com>
148 lines
4.0 KiB
C
148 lines
4.0 KiB
C
/*
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* Copyright 2013 Broadcom Corporation.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __BCM23550_W1D_H
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#define __BCM23550_W1D_H
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#include <linux/sizes.h>
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#include <asm/arch/sysmap.h>
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/* CPU, chip, mach, etc */
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#define CONFIG_KONA
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_KONA_RESET_S
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/*
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* Memory configuration
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*/
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#define CONFIG_SYS_TEXT_BASE 0x9f000000
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#define CONFIG_SYS_SDRAM_BASE 0x80000000
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#define CONFIG_SYS_SDRAM_SIZE 0x20000000
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_MALLOC_LEN SZ_4M /* see armv7/start.S. */
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#define CONFIG_STACKSIZE SZ_256K
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/* GPIO Driver */
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#define CONFIG_KONA_GPIO
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/* MMC/SD Driver */
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#define CONFIG_SDHCI
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#define CONFIG_MMC_SDMA
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#define CONFIG_KONA_SDHCI
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_SYS_SDIO_BASE0 SDIO1_BASE_ADDR
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#define CONFIG_SYS_SDIO_BASE1 SDIO2_BASE_ADDR
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#define CONFIG_SYS_SDIO_BASE2 SDIO3_BASE_ADDR
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#define CONFIG_SYS_SDIO_BASE3 SDIO4_BASE_ADDR
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#define CONFIG_SYS_SDIO0_MAX_CLK 48000000
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#define CONFIG_SYS_SDIO1_MAX_CLK 48000000
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#define CONFIG_SYS_SDIO2_MAX_CLK 48000000
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#define CONFIG_SYS_SDIO3_MAX_CLK 48000000
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#define CONFIG_SYS_SDIO0 "sdio1"
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#define CONFIG_SYS_SDIO1 "sdio2"
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#define CONFIG_SYS_SDIO2 "sdio3"
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#define CONFIG_SYS_SDIO3 "sdio4"
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/* I2C Driver */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_KONA
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#define CONFIG_SYS_SPD_BUS_NUM 3 /* Start with PMU bus */
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#define CONFIG_SYS_MAX_I2C_BUS 4
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#define CONFIG_SYS_I2C_BASE0 BSC1_BASE_ADDR
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#define CONFIG_SYS_I2C_BASE1 BSC2_BASE_ADDR
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#define CONFIG_SYS_I2C_BASE2 BSC3_BASE_ADDR
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#define CONFIG_SYS_I2C_BASE3 PMU_BSC_BASE_ADDR
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/* Timer Driver */
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#define CONFIG_SYS_TIMER_RATE 32000
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#define CONFIG_SYS_TIMER_COUNTER (TIMER_BASE_ADDR + 4) /* STCLO offset */
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/* Init functions */
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#define CONFIG_MISC_INIT_R /* board's misc_init_r function */
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/* Some commands use this as the default load address */
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#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
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/* No mtest functions as recommended */
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/*
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* This is the initial SP which is used only briefly for relocating the u-boot
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* image to the top of SDRAM. After relocation u-boot moves the stack to the
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* proper place.
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*/
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#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE
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/* Serial Info */
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#define CONFIG_SYS_NS16550_SERIAL
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/* Post pad 3 bytes after each reg addr */
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#define CONFIG_SYS_NS16550_REG_SIZE (-4)
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#define CONFIG_SYS_NS16550_CLK 13000000
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_SYS_NS16550_COM1 0x3e000000
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#define CONFIG_BAUDRATE 115200
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/* must fit into GPT:u-boot-env partition */
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_ENV_OFFSET (0x00011a00 * 512)
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#define CONFIG_ENV_SIZE (8 * 512)
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#define CONFIG_SYS_NO_FLASH /* Not using NAND/NOR unmanaged flash */
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/* console configuration */
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#define CONFIG_SYS_CBSIZE 1024 /* Console buffer size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16) /* Printbuffer size */
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#define CONFIG_SYS_MAXARGS 64
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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/*
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* One partition type must be defined for part.c
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* This is necessary for the fatls command to work on an SD card
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* for example.
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*/
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#define CONFIG_DOS_PARTITION
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#define CONFIG_EFI_PARTITION
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/* version string, parser, etc */
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#define CONFIG_VERSION_VARIABLE
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CRC32_VERIFY
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#define CONFIG_MX_CYCLIC
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/* Initial upstream - boot to cmd prompt only */
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#define CONFIG_BOOTCOMMAND ""
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/* Commands */
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#define CONFIG_FAT_WRITE
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/* Fastboot and USB OTG */
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#define CONFIG_USB_FUNCTION_FASTBOOT
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#define CONFIG_CMD_FASTBOOT
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#define CONFIG_FASTBOOT_FLASH
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#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0
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#define CONFIG_SYS_CACHELINE_SIZE 64
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#define CONFIG_FASTBOOT_BUF_SIZE 0x1d000000
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#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_SDRAM_BASE
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#undef CONFIG_USB_GADGET_VBUS_DRAW
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#define CONFIG_USB_GADGET_VBUS_DRAW 0
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#define CONFIG_USB_GADGET_BCM_UDC_OTG_PHY
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#define CONFIG_USBID_ADDR 0x34052c46
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#define CONFIG_SYS_ICACHE_OFF
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#define CONFIG_SYS_DCACHE_OFF
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#define CONFIG_SYS_L2CACHE_OFF
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#endif /* __BCM23550_W1D_H */
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