mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-24 04:34:22 +08:00
34ded87506
Until the last SoC, the register addresses have been hard-coded because they are always constant. For a planned new SoC, the register bases will be completely changed. I insist on supporting multiple SoCs/boards by a single defconfig (uniphier_v8_defconfig) since duplicating similar defconfig files is a maintenance burden. The base addresses must be fixed-up at run-time somehow. Previously, the board init code identified the SoC by reading out the SG_REVISION register. This is much easier than parsing DT. You cannot do it any more because the base address of SG will be changed. The SG_REVISION register exists to read out the SoC ID, but you never know its address before identifying the SoC. Oh well. So, the possible solution is to parse the DT, and find out the node with "*-soc-glue" compatible string. Then, sg_base is set to the value of the "reg" property. The sc_base is set up likewise. It is worth noting a pit-fall. Having sc_base and sg_base in the global scope will make the life easier, but the global variables are poorly supported before the relocation. In fact, the .bss section overwraps with DT. Allocating them in the .bss section would break DT. So, I gave dummy initializers to assign them in the .data section. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
42 lines
957 B
C
42 lines
957 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* UniPhier SC (System Control) block registers for ARMv8 SoCs
|
|
*
|
|
* Copyright (C) 2016 Socionext Inc.
|
|
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
|
|
*/
|
|
|
|
#ifndef SC64_REGS_H
|
|
#define SC64_REGS_H
|
|
|
|
#ifndef __ASSEMBLY__
|
|
#include <linux/compiler.h>
|
|
extern void __iomem *sc_base;
|
|
#endif
|
|
|
|
#define SC_BASE 0x61840000
|
|
|
|
#define SC_RSTCTRL 0x2000
|
|
#define SC_RSTCTRL3 0x2008
|
|
#define SC_RSTCTRL4 0x200c
|
|
#define SC_RSTCTRL5 0x2010
|
|
#define SC_RSTCTRL6 0x2014
|
|
#define SC_RSTCTRL7 0x2018
|
|
|
|
#define SC_CLKCTRL 0x2100
|
|
#define SC_CLKCTRL3 0x2108
|
|
#define SC_CLKCTRL4 0x210c
|
|
#define SC_CLKCTRL5 0x2110
|
|
#define SC_CLKCTRL6 0x2114
|
|
#define SC_CLKCTRL7 0x2118
|
|
|
|
#define SC_CA72_GEARST 0x8000
|
|
#define SC_CA72_GEARSET 0x8004
|
|
#define SC_CA72_GEARUPD 0x8008
|
|
#define SC_CA53_GEARST 0x8080
|
|
#define SC_CA53_GEARSET 0x8084
|
|
#define SC_CA53_GEARUPD 0x8088
|
|
#define SC_CA_GEARUPD (1 << 0)
|
|
|
|
#endif /* SC64_REGS_H */
|