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268f6ac1f9
At early U-Boot stage, before relocation, MMU is not yet configured
and disabled. DDR may not be configured with the correct memory
attributes (can be configured in MT_DEVICE instead of MT_MEMORY).
In this case, usage of memcpy_{from, to}io() may leads to synchronous
abort in AARCH64 in case the normal memory address is not 64Bits aligned.
To avoid such situation, forbid usage of normal memory cast to (u64 *) in
case MMU is not enabled.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: mark.kettenis@xs4all.nl
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
91 lines
2.1 KiB
C
91 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2000-2009
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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* Copyright 2019 Google LLC
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*/
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#ifndef __CPU_LEGACY_H
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#define __CPU_LEGACY_H
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#include <linux/types.h>
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/*
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* Multicore arch functions
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*
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* These should be moved to use the CPU uclass.
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*/
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int cpu_status(u32 nr);
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int cpu_reset(u32 nr);
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int cpu_disable(u32 nr);
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int cpu_release(u32 nr, int argc, char *const argv[]);
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static inline int cpumask_next(int cpu, unsigned int mask)
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{
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for (cpu++; !((1 << cpu) & mask); cpu++)
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;
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return cpu;
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}
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#define for_each_cpu(iter, cpu, num_cpus, mask) \
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for (iter = 0, cpu = cpumask_next(-1, mask); \
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iter < num_cpus; \
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iter++, cpu = cpumask_next(cpu, mask)) \
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int cpu_numcores(void);
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int cpu_num_dspcores(void);
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u32 cpu_mask(void);
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u32 cpu_dsp_mask(void);
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int is_core_valid(unsigned int core);
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/**
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* checkcpu() - perform an early check of the CPU
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*
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* This is used on PowerPC, SH and X86 machines as a CPU init mechanism. It is
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* called during the pre-relocation init sequence in board_init_f().
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*
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* @return 0 if oK, -ve on error
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*/
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int checkcpu(void);
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void smp_set_core_boot_addr(unsigned long addr, int corenr);
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void smp_kick_all_cpus(void);
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int icache_status(void);
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void icache_enable(void);
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void icache_disable(void);
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int dcache_status(void);
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void dcache_enable(void);
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void dcache_disable(void);
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void mmu_disable(void);
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int mmu_status(void);
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/* arch/$(ARCH)/lib/cache.c */
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void enable_caches(void);
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void flush_cache(unsigned long addr, unsigned long size);
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void flush_dcache_all(void);
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void flush_dcache_range(unsigned long start, unsigned long stop);
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void invalidate_dcache_range(unsigned long start, unsigned long stop);
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void invalidate_dcache_all(void);
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void invalidate_icache_all(void);
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enum {
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/* Disable caches (else flush caches but leave them active) */
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CBL_DISABLE_CACHES = 1 << 0,
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CBL_SHOW_BOOTSTAGE_REPORT = 1 << 1,
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CBL_ALL = 3,
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};
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/**
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* Clean up ready for linux
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*
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* @param flags Flags to control what is done
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*/
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int cleanup_before_linux_select(int flags);
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void reset_cpu(void);
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#endif
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