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https://github.com/u-boot/u-boot.git
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03544c6640
The driver assumed that I2C1 and I2C2 were always enabled, and if they were not, then an asynchronous abort was (silently) raised, to be caught much later on in the Linux kernel. Fix this by making I2C1 and I2C2 optional just like I2C3 and I2C4 are. To make the change binary-invariant, declare I2C1 and I2C2 in every include/configs/ file which defines CONFIG_SYS_I2C_MXC. Also, while updating README about CONFIG_SYS_I2C_MXC_I2C1 and CONFIG_SYS_I2C_MXC_I2C2, add missing descriptions for I2C4 speed (CONFIG_SYS_MXC_I2C4_SPEED) and slave (CONFIG_SYS_MXC_I2C4_SLAVE) config options. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
211 lines
6.4 KiB
C
211 lines
6.4 KiB
C
/*
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* Copyright (C) 2013 Stefan Roese <sr@denx.de>
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*
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* Configuration settings for the ProjectionDesign / Barco
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* Titanium board.
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*
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* Based on mx6qsabrelite.h which is:
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* Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include "mx6_common.h"
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#define CONFIG_MX6Q
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#define MACH_TYPE_TITANIUM 3769
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#define CONFIG_MACH_TYPE MACH_TYPE_TITANIUM
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024)
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_MISC_INIT_R
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART1_BASE
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/* I2C Configs */
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#define CONFIG_CMD_I2C
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
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#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
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#define CONFIG_SYS_I2C_SPEED 100000
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/* MMC Configs */
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_SYS_FSL_USDHC_NUM 1
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_MII
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#define CONFIG_FEC_MXC
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#define CONFIG_MII
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define CONFIG_FEC_MXC_PHYADDR 4
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_MICREL
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#define CONFIG_PHY_MICREL_KSZ9021
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/* USB Configs */
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#define CONFIG_CMD_USB
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_MX6
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#define CONFIG_USB_STORAGE
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#define CONFIG_MXC_USB_PORT 1
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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/* Miscellaneous commands */
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#define CONFIG_CMD_BMODE
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#define CONFIG_SYS_MEMTEST_START 0x10000000
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (500 << 20))
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#define CONFIG_HOSTNAME titanium
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#define CONFIG_UBI_PART ubi
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#define CONFIG_UBIFS_VOLUME rootfs0
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#define MTDIDS_DEFAULT "nand0=gpmi-nand"
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#define MTDPARTS_DEFAULT "mtdparts=gpmi-nand:16M(uboot),512k(env1)," \
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"512k(env2),-(ubi)"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"kernel=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
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"kernel_fs=/boot/uImage\0" \
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"kernel_addr=11000000\0" \
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"dtb=" __stringify(CONFIG_HOSTNAME) "/" \
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__stringify(CONFIG_HOSTNAME) ".dtb\0" \
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"dtb_fs=/boot/" __stringify(CONFIG_HOSTNAME) ".dtb\0" \
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"dtb_addr=12800000\0" \
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"script=boot.scr\0" \
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"uimage=uImage\0" \
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"console=ttymxc0\0" \
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"baudrate=115200\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"mmcdev=0\0" \
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"mmcpart=1\0" \
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"uimage=uImage\0" \
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"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
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" ${script}\0" \
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"bootscript=echo Running bootscript from mmc ...; source\0" \
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"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
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"mmcroot=/dev/mmcblk0p2\0" \
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=${mmcroot} rootwait rw\0" \
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"bootmmc=run mmcargs; fatload mmc ${mmcdev}:${mmcpart} ${loadaddr}" \
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" ${uimage}; bootm\0" \
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"addip=setenv bootargs ${bootargs} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
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":${hostname}:${netdev}:off panic=1\0" \
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"addcon=setenv bootargs ${bootargs} console=ttymxc0," \
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"${baudrate}\0" \
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"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
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"rootpath=/opt/eldk-5.3/armv7a/rootfs-minimal-mtdutils\0" \
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"nfsargs=setenv bootargs root=/dev/nfs rw " \
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"nfsroot=${serverip}:${rootpath}\0" \
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"ubifs=" __stringify(CONFIG_HOSTNAME) "/ubifs.img\0" \
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"part=" __stringify(CONFIG_UBI_PART) "\0" \
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"boot_vol=0\0" \
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"vol=" __stringify(CONFIG_UBIFS_VOLUME) "\0" \
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"load_ubifs=tftp ${kernel_addr} ${ubifs}\0" \
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"update_ubifs=ubi part ${part};ubi write ${kernel_addr} ${vol}" \
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" ${filesize}\0" \
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"upd_ubifs=run load_ubifs update_ubifs\0" \
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"init_ubi=nand erase.part ubi;ubi part ${part};" \
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"ubi create ${vol} c800000\0" \
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"mtdids=" MTDIDS_DEFAULT "\0" \
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"mtdparts=" MTDPARTS_DEFAULT "\0" \
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"nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip" \
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" addcon addmtd;" \
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"bootm ${kernel_addr} - ${dtb_addr}\0" \
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"ubifsargs=set bootargs ubi.mtd=ubi " \
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"root=ubi:rootfs${boot_vol} rootfstype=ubifs\0" \
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"ubifs_mount=ubi part ubi;ubifsmount ubi:rootfs${boot_vol}\0" \
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"ubifs_load=ubifsload ${kernel_addr} ${kernel_fs};" \
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"ubifsload ${dtb_addr} ${dtb_fs};\0" \
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"nand_ubifs=run ubifs_mount ubifs_load ubifsargs addip addcon " \
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"addmtd;bootm ${kernel_addr} - ${dtb_addr}\0" \
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"load_kernel=tftp ${kernel_addr} ${kernel}\0" \
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"load_dtb=tftp ${dtb_addr} ${dtb}\0" \
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"net_nfs=run load_dtb load_kernel; " \
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"run nfsargs addip addcon addmtd;" \
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"bootm ${kernel_addr} - ${dtb_addr}\0" \
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"delenv=env default -a -f; saveenv; reset\0"
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#define CONFIG_BOOTCOMMAND "run nand_ubifs"
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
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sizeof(CONFIG_SYS_PROMPT) + 16)
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define PHYS_SDRAM_SIZE (512 << 20)
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* Enable NAND support */
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_NAND_TRIMFFS
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#define CONFIG_CMD_TIME
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#ifdef CONFIG_CMD_NAND
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/* NAND stuff */
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#define CONFIG_NAND_MXS
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x40000000
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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/* DMA stuff, needed for GPMI/MXS NAND support */
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#define CONFIG_APBH_DMA
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#define CONFIG_APBH_DMA_BURST
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#define CONFIG_APBH_DMA_BURST8
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/* Environment in NAND */
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#define CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_OFFSET (16 << 20)
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#define CONFIG_ENV_SECT_SIZE (128 << 10)
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#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
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#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 << 10))
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#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
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#else /* CONFIG_CMD_NAND */
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/* Environment in MMC */
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#define CONFIG_ENV_SIZE (8 << 10)
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#endif /* CONFIG_CMD_NAND */
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/* UBI/UBIFS config options */
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#define CONFIG_LZO
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_RBTREE
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_CMD_UBI
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#define CONFIG_CMD_UBIFS
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#endif /* __CONFIG_H */
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