mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-23 12:14:32 +08:00
867e16ae05
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
115 lines
2.9 KiB
Plaintext
115 lines
2.9 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT=y
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CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
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CONFIG_COUNTER_FREQUENCY=12500000
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CONFIG_TARGET_LS1021ATWR=y
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CONFIG_TEXT_BASE=0x82000000
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CONFIG_SYS_MALLOC_LEN=0x1020000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_SIZE=0x20000
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CONFIG_ENV_OFFSET=0x300000
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CONFIG_SYS_I2C_MXC_I2C1=y
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CONFIG_SYS_I2C_MXC_I2C2=y
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CONFIG_SYS_I2C_MXC_I2C3=y
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CONFIG_DM_GPIO=y
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CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
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CONFIG_SYS_MONITOR_LEN=1048576
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CONFIG_SPL_MMC=y
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CONFIG_SPL_SERIAL=y
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CONFIG_SPL_STACK=0x1001d000
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CONFIG_SPL_TEXT_BASE=0x10000000
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CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
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CONFIG_SPL_BSS_START_ADDR=0x80100000
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CONFIG_SPL_BSS_MAX_SIZE=0x80000
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CONFIG_SYS_BOOTM_LEN=0x4000000
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CONFIG_SYS_LOAD_ADDR=0x82000000
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CONFIG_SPL=y
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CONFIG_PCI=y
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CONFIG_AHCI=y
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CONFIG_LAYERSCAPE_NS_ACCESS=y
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CONFIG_PCIE1=y
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CONFIG_PCIE2=y
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CONFIG_SYS_MEMTEST_START=0x80000000
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CONFIG_SYS_MEMTEST_END=0x9fffffff
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_RAMBOOT_PBL=y
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CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1021atwr/ls102xa_pbi.cfg"
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CONFIG_SYS_FSL_PBL_RCW="board/freescale/ls1021atwr/ls102xa_rcw_sd_qspi.cfg"
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_SD_BOOT=y
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CONFIG_SD_BOOT_QSPI=y
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CONFIG_BOOTDELAY=3
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
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CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot && esbc_halt"
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CONFIG_SYS_CBSIZE=256
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CONFIG_SYS_PBSIZE=276
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CONFIG_SILENT_CONSOLE=y
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CONFIG_SYS_CONSOLE_IS_IN_ENV=y
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CONFIG_ARCH_MISC_INIT=y
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CONFIG_MISC_INIT_R=y
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CONFIG_ID_EEPROM=y
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CONFIG_SYS_EEPROM_BUS_NUM=1
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CONFIG_SPL_MAX_SIZE=0x1a000
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CONFIG_SPL_PAD_TO=0x1c000
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CONFIG_SPL_FSL_PBL=y
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# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
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CONFIG_SPL_SYS_MALLOC=y
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CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
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CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x82100000
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CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
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CONFIG_SPL_ENV_SUPPORT=y
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CONFIG_SPL_I2C=y
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CONFIG_SPL_MPC8XXX_INIT_DDR=y
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CONFIG_SPL_WATCHDOG=y
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CONFIG_CMD_GREPENV=y
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CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
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CONFIG_CMD_MEMINFO=y
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CONFIG_CMD_MEMTEST=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_USB=y
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# CONFIG_SPL_EFI_PARTITION is not set
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CONFIG_OF_CONTROL=y
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CONFIG_ENV_OVERWRITE=y
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_USE_ETHPRIME=y
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CONFIG_ETHPRIME="ethernet@2d10000"
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CONFIG_SATA=y
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CONFIG_SATA_CEVA=y
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CONFIG_FSL_CAAM=y
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CONFIG_MPC8XXX_GPIO=y
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CONFIG_DM_I2C=y
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CONFIG_SPL_SYS_I2C_LEGACY=y
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CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
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CONFIG_SYS_I2C_EEPROM_ADDR=0x53
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CONFIG_FSL_ESDHC=y
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CONFIG_MTD=y
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CONFIG_SPI_FLASH_ATMEL=y
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CONFIG_SPI_FLASH_STMICRO=y
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CONFIG_PHY_ATHEROS=y
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CONFIG_DM_MDIO=y
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CONFIG_PHY_GIGE=y
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CONFIG_E1000=y
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CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_NVME_PCI=y
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CONFIG_PCIE_LAYERSCAPE_RC=y
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CONFIG_SYS_NS16550_SERIAL=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_FSL_DSPI=y
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CONFIG_FSL_QSPI=y
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CONFIG_USB=y
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CONFIG_USB_XHCI_HCD=y
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CONFIG_USB_XHCI_DWC3=y
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