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a187559e3d
Correct spelling of "U-Boot" shall be used in all written text (documentation, comments in source files etc.). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
52 lines
1.5 KiB
C
52 lines
1.5 KiB
C
/*
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* U-Boot - psd4256.h
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*
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* Copyright (c) 2005-2007 Analog Devices Inc.
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*
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* (C) Copyright 2000-2004
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/*
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* Flash A/B Port A configuration registers.
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* Addresses are offset values to CONFIG_SYS_FLASH1_BASE
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* for Flash A and CONFIG_SYS_FLASH2_BASE for Flash B.
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*/
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#define PSD_PORTA_DIN 0x070000
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#define PSD_PORTA_DOUT 0x070004
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#define PSD_PORTA_DIR 0x070006
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/*
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* Flash A/B Port B configuration registers
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* Addresses are offset values to CONFIG_SYS_FLASH1_BASE
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* for Flash A and CONFIG_SYS_FLASH2_BASE for Flash B.
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*/
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#define PSD_PORTB_DIN 0x070001
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#define PSD_PORTB_DOUT 0x070005
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#define PSD_PORTB_DIR 0x070007
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/*
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* Flash A Port A Bit definitions
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*/
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#define PSDA_PPICLK1 0x20 /* PPI Clock select bit 1 */
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#define PSDA_PPICLK0 0x10 /* PPI Clock select bit 0 */
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#define PSDA_VDEC_RST 0x08 /* Video decoder reset, 0 = RESET */
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#define PSDA_VENC_RST 0x04 /* Video encoder reset, 0 = RESET */
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#define PSDA_CODEC_RST 0x01 /* Codec reset, 0 = RESET */
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/*
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* Flash A Port B Bit definitions
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*/
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#define PSDA_LED9 0x20 /* LED 9, 1 = LED ON */
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#define PSDA_LED8 0x10 /* LED 8, 1 = LED ON */
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#define PSDA_LED7 0x08 /* LED 7, 1 = LED ON */
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#define PSDA_LED6 0x04 /* LED 6, 1 = LED ON */
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#define PSDA_LED5 0x02 /* LED 5, 1 = LED ON */
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#define PSDA_LED4 0x01 /* LED 4, 1 = LED ON */
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