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This workaround is for the erratum I2C A004447. Device reference manual provides a scheme that allows the I2C master controller to generate nine SCL pulses, which enable an I2C slave device that held SDA low to release SDA. However, due to this erratum, this scheme no longer works. In addition, when I2C is used as a source of the PBL, the state machine is not able to recover. At the same time, delete the reduplicative definition of SVR_VER and SVR_REV. The SVR_REV is the low 8 bits rather than the low 16 bits of svr. And we use the CONFIG_SYS_FSL_A004447_SVR_REV macro instead of hard-code value 0x10, 0x11 and 0x20. The CONFIG_SYS_FSL_A004447_SVR_REV = 0x00 represents that one version of platform has this I2C errata. So enable this errata by IS_SVR_REV(svr, maj, min) function. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Heiko Schocher <hs@denx.de> |
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| .. | ||
| bfin-twi_i2c.c | ||
| davinci_i2c.c | ||
| designware_i2c.c | ||
| designware_i2c.h | ||
| fsl_i2c.c | ||
| fti2c010.c | ||
| fti2c010.h | ||
| i2c_core.c | ||
| Makefile | ||
| mv_i2c.c | ||
| mv_i2c.h | ||
| mvtwsi.c | ||
| mxc_i2c.c | ||
| mxs_i2c.c | ||
| omap24xx_i2c.c | ||
| omap24xx_i2c.h | ||
| omap1510_i2c.c | ||
| pca9564_i2c.c | ||
| ppc4xx_i2c.c | ||
| s3c24x0_i2c.c | ||
| s3c24x0_i2c.h | ||
| s3c44b0_i2c.c | ||
| sh_i2c.c | ||
| sh_sh7734_i2c.c | ||
| soft_i2c.c | ||
| tegra_i2c.c | ||
| tsi108_i2c.c | ||
| u8500_i2c.c | ||
| u8500_i2c.h | ||
| zynq_i2c.c | ||