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https://github.com/u-boot/u-boot.git
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bee9fd2957
Allow device trees to be reused between Linux and U-Boot. The source for these device trees is linux-next as of commit bd8a9cd624c6 ("arm64: dts: ls1028a-rdb: update copyright"), which was chosen because some changes needed to be done to the Linux DTs too, before they could be shared: https://lore.kernel.org/linux-arm-kernel/20211202141528.2450169-5-vladimir.oltean@nxp.com/T/#m6f63c92e75fa79a01144b2c2c6dc4776e7971395 There are two more commits on the RDB device tree which haven't been picked up yet, because they have dependencies on the SoC device tree: dd3d936a1b17 ("arm64: dts: ls1028a: add ftm_alarm1 node to be used as wakeup source") b2e2d3e02fb6 ("arm64: dts: ls1028a-rdb: enable pwm0") These will be picked up on the next resync. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: Michael Walle <michael@walle.cc>
301 lines
4.8 KiB
Plaintext
301 lines
4.8 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device Tree file for NXP LS1028A RDB Board.
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*
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* Copyright 2018-2021 NXP
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*
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* Harninder Rai <harninder.rai@nxp.com>
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*
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*/
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/dts-v1/;
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#include "fsl-ls1028a.dtsi"
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/ {
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model = "LS1028A RDB Board";
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compatible = "fsl,ls1028a-rdb", "fsl,ls1028a";
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aliases {
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crypto = &crypto;
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serial0 = &duart0;
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serial1 = &duart1;
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mmc0 = &esdhc;
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mmc1 = &esdhc1;
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rtc1 = &ftm_alarm0;
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spi0 = &fspi;
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ethernet0 = &enetc_port0;
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ethernet1 = &enetc_port2;
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ethernet2 = &mscc_felix_port0;
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ethernet3 = &mscc_felix_port1;
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ethernet4 = &mscc_felix_port2;
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ethernet5 = &mscc_felix_port3;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x0 0x80000000 0x1 0x0000000>;
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};
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sys_mclk: clock-mclk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <25000000>;
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "1P8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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sb_3v3: regulator-sb3v3 {
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compatible = "regulator-fixed";
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regulator-name = "3v3_vbus";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,widgets =
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"Microphone", "Microphone Jack",
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"Headphone", "Headphone Jack",
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"Speaker", "Speaker Ext",
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"Line", "Line In Jack";
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simple-audio-card,routing =
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"MIC_IN", "Microphone Jack",
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"Microphone Jack", "Mic Bias",
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"LINE_IN", "Line In Jack",
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"Headphone Jack", "HP_OUT",
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"Speaker Ext", "LINE_OUT";
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simple-audio-card,cpu {
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sound-dai = <&sai4>;
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frame-master;
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bitclock-master;
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};
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simple-audio-card,codec {
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sound-dai = <&sgtl5000>;
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frame-master;
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bitclock-master;
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system-clock-frequency = <25000000>;
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};
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};
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};
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&can0 {
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status = "okay";
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can-transceiver {
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max-bitrate = <5000000>;
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};
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};
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&can1 {
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status = "okay";
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can-transceiver {
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max-bitrate = <5000000>;
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};
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};
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&duart0 {
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status = "okay";
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};
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&duart1 {
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status = "okay";
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};
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&enetc_mdio_pf3 {
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sgmii_phy0: ethernet-phy@2 {
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reg = <0x2>;
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};
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/* VSC8514 QSGMII quad PHY */
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qsgmii_phy0: ethernet-phy@10 {
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reg = <0x10>;
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};
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qsgmii_phy1: ethernet-phy@11 {
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reg = <0x11>;
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};
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qsgmii_phy2: ethernet-phy@12 {
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reg = <0x12>;
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};
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qsgmii_phy3: ethernet-phy@13 {
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reg = <0x13>;
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};
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};
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&enetc_port0 {
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phy-handle = <&sgmii_phy0>;
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phy-mode = "sgmii";
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managed = "in-band-status";
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status = "okay";
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};
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&enetc_port2 {
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status = "okay";
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};
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&esdhc {
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sd-uhs-sdr104;
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sd-uhs-sdr50;
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sd-uhs-sdr25;
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sd-uhs-sdr12;
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status = "okay";
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};
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&esdhc1 {
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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bus-width = <8>;
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status = "okay";
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};
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&fspi {
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status = "okay";
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mt35xu02g0: flash@0 {
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compatible = "jedec,spi-nor";
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <50000000>;
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/* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
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spi-rx-bus-width = <8>; /* 8 SPI Rx lines */
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spi-tx-bus-width = <1>; /* 1 SPI Tx line */
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reg = <0>;
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};
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};
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&i2c0 {
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status = "okay";
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i2c-mux@77 {
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compatible = "nxp,pca9847";
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reg = <0x77>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x1>;
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sgtl5000: audio-codec@a {
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#sound-dai-cells = <0>;
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compatible = "fsl,sgtl5000";
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reg = <0xa>;
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VDDA-supply = <®_1p8v>;
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VDDIO-supply = <®_1p8v>;
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clocks = <&sys_mclk>;
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sclk-strength = <3>;
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};
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};
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i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x02>;
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current-monitor@40 {
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compatible = "ti,ina220";
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reg = <0x40>;
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shunt-resistor = <500>;
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};
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};
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i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x3>;
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temperature-sensor@4c {
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compatible = "nxp,sa56004";
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reg = <0x4c>;
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vcc-supply = <&sb_3v3>;
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};
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rtc@51 {
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compatible = "nxp,pcf2129";
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reg = <0x51>;
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};
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};
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};
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};
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&mscc_felix {
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status = "okay";
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};
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&mscc_felix_port0 {
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label = "swp0";
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managed = "in-band-status";
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phy-handle = <&qsgmii_phy0>;
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phy-mode = "qsgmii";
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status = "okay";
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};
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&mscc_felix_port1 {
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label = "swp1";
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managed = "in-band-status";
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phy-handle = <&qsgmii_phy1>;
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phy-mode = "qsgmii";
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status = "okay";
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};
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&mscc_felix_port2 {
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label = "swp2";
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managed = "in-band-status";
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phy-handle = <&qsgmii_phy2>;
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phy-mode = "qsgmii";
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status = "okay";
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};
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&mscc_felix_port3 {
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label = "swp3";
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managed = "in-band-status";
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phy-handle = <&qsgmii_phy3>;
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phy-mode = "qsgmii";
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status = "okay";
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};
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&mscc_felix_port4 {
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ethernet = <&enetc_port2>;
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status = "okay";
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};
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&optee {
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status = "okay";
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};
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&sai4 {
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status = "okay";
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};
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&sata {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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};
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&usb1 {
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dr_mode = "otg";
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status = "okay";
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};
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