Kever Yang 1960b01034 rockchip: clock: rk3036: some fix according TRM ... - hclk/pclk_div range　should use '<=' instead of '<' - use GPLL for pd_bus clock source - pd_bus HCLK/PCLK clock rate should not bigger than ACLK Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>		2017-06-07 07:29:20 -06:00
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asm	rockchip: clock: rk3036: some fix according TRM	2017-06-07 07:29:20 -06:00
debug	arm: debug: replace license blocks with SPDX	2014-10-26 22:22:09 +01:00