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79e2a6a04a
The most of ethernet drivers are using this mdio registration sequence.
strcpy(priv->bus->name, "emac");
mdio_register(priv->bus);
Where driver can be used only with one MDIO bus because only unique
name should be used.
Other drivers are using unique device name for MDIO registration to
support multiple instances.
snprintf(priv->bus->name, sizeof(bus->name), "%s", name);
With DM dev->seq is used more even in logs
(like random MAC address generation:
printf("\nWarning: %s (eth%d) using random MAC address - %pM\n",
dev->name, dev->seq, pdata->enetaddr);
)
where eth%d prefix is used.
Simplify driver code to register mdio device with dev->seq number
to simplify mdio registration and reduce code duplication across
all drivers. With DM_SEQ_ALIAS enabled dev->seq reflects alias setting.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
122 lines
3.3 KiB
C
122 lines
3.3 KiB
C
/*
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* SPDX-License-Identifier: GPL-2.0 IBM-pibs
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*
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* Additions (C) Copyright 2009 Industrie Dial Face S.p.A.
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*/
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/*----------------------------------------------------------------------------+
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| File Name: miiphy.h
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| Function: Include file defining PHY registers.
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| Author: Mark Wisner
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+----------------------------------------------------------------------------*/
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#ifndef _miiphy_h_
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#define _miiphy_h_
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#include <common.h>
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#include <linux/mii.h>
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#include <linux/list.h>
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#include <net.h>
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#include <phy.h>
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int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
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unsigned short *value);
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int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
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unsigned short value);
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int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
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unsigned char *model, unsigned char *rev);
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int miiphy_reset(const char *devname, unsigned char addr);
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int miiphy_speed(const char *devname, unsigned char addr);
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int miiphy_duplex(const char *devname, unsigned char addr);
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int miiphy_is_1000base_x(const char *devname, unsigned char addr);
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#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
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int miiphy_link(const char *devname, unsigned char addr);
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#endif
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void miiphy_init(void);
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int miiphy_set_current_dev(const char *devname);
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const char *miiphy_get_current_dev(void);
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struct mii_dev *mdio_get_current_dev(void);
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struct mii_dev *miiphy_get_dev_by_name(const char *devname);
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struct phy_device *mdio_phydev_for_ethname(const char *devname);
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void miiphy_listdev(void);
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struct mii_dev *mdio_alloc(void);
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void mdio_free(struct mii_dev *bus);
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int mdio_register(struct mii_dev *bus);
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/**
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* mdio_register_seq - Register mdio bus with sequence number
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* @bus: mii device structure
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* @seq: sequence number
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*
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* Return: 0 if success, negative value if error
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*/
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int mdio_register_seq(struct mii_dev *bus, int seq);
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int mdio_unregister(struct mii_dev *bus);
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void mdio_list_devices(void);
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#ifdef CONFIG_BITBANGMII
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#define BB_MII_DEVNAME "bb_miiphy"
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struct bb_miiphy_bus {
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char name[16];
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int (*init)(struct bb_miiphy_bus *bus);
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int (*mdio_active)(struct bb_miiphy_bus *bus);
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int (*mdio_tristate)(struct bb_miiphy_bus *bus);
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int (*set_mdio)(struct bb_miiphy_bus *bus, int v);
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int (*get_mdio)(struct bb_miiphy_bus *bus, int *v);
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int (*set_mdc)(struct bb_miiphy_bus *bus, int v);
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int (*delay)(struct bb_miiphy_bus *bus);
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#ifdef CONFIG_BITBANGMII_MULTI
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void *priv;
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#endif
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};
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extern struct bb_miiphy_bus bb_miiphy_buses[];
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extern int bb_miiphy_buses_num;
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void bb_miiphy_init(void);
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int bb_miiphy_read(struct mii_dev *miidev, int addr, int devad, int reg);
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int bb_miiphy_write(struct mii_dev *miidev, int addr, int devad, int reg,
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u16 value);
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#endif
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/* phy seed setup */
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#define AUTO 99
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#define _1000BASET 1000
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#define _100BASET 100
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#define _10BASET 10
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#define HALF 22
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#define FULL 44
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/* phy register offsets */
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#define MII_MIPSCR 0x11
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/* MII_LPA */
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#define PHY_ANLPAR_PSB_802_3 0x0001
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#define PHY_ANLPAR_PSB_802_9 0x0002
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/* MII_CTRL1000 masks */
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#define PHY_1000BTCR_1000FD 0x0200
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#define PHY_1000BTCR_1000HD 0x0100
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/* MII_STAT1000 masks */
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#define PHY_1000BTSR_MSCF 0x8000
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#define PHY_1000BTSR_MSCR 0x4000
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#define PHY_1000BTSR_LRS 0x2000
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#define PHY_1000BTSR_RRS 0x1000
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#define PHY_1000BTSR_1000FD 0x0800
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#define PHY_1000BTSR_1000HD 0x0400
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/* phy EXSR */
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#define ESTATUS_1000XF 0x8000
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#define ESTATUS_1000XH 0x4000
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#endif
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