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https://github.com/u-boot/u-boot.git
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0a527fda78
Fixes IDE issues found on the Malta board under Qemu: 1) DMA implied commands were sent to the controller in stead of the PIO variants. The rest of the code is DMA free and written for PIO operation. 2) direct pointer access was used to read and write the registers instead of the inb/inw/outb/outw functions/macros. Registers don't have to be memory mapped and ATA_CURR_BASE() does not have to return an offset from address zero. 3) Endian isues in ide_ident() and reading/writing data in general. Names were corrupted and sizes misreported. Tested malta_defconfig and maltael_defconfig to work again in Qemu. Signed-off-by: Reinoud Zandijk <reinoud@NetBSD.org> Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
214 lines
7.9 KiB
C
214 lines
7.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*/
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/*
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* Most of the following information was derived from the document
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* "Information Technology - AT Attachment-3 Interface (ATA-3)",
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* ANSI X3.298-1997.
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*/
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#ifndef _ATA_H
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#define _ATA_H
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#include <libata.h>
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/* Register addressing depends on the hardware design; for instance,
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* 8-bit (register) and 16-bit (data) accesses might use different
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* address spaces. This is implemented by the following definitions.
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*/
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#ifndef CONFIG_SYS_ATA_STRIDE
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#define CONFIG_SYS_ATA_STRIDE 1
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#endif
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#define ATA_IO_DATA(x) (CONFIG_SYS_ATA_DATA_OFFSET+((x) * CONFIG_SYS_ATA_STRIDE))
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#define ATA_IO_REG(x) (CONFIG_SYS_ATA_REG_OFFSET +((x) * CONFIG_SYS_ATA_STRIDE))
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#define ATA_IO_ALT(x) (CONFIG_SYS_ATA_ALT_OFFSET +((x) * CONFIG_SYS_ATA_STRIDE))
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/*
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* I/O Register Descriptions
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*/
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#define ATA_DATA_REG ATA_IO_DATA(0)
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#define ATA_ERROR_REG ATA_IO_REG(1)
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#define ATA_SECT_CNT ATA_IO_REG(2)
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#define ATA_SECT_NUM ATA_IO_REG(3)
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#define ATA_CYL_LOW ATA_IO_REG(4)
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#define ATA_CYL_HIGH ATA_IO_REG(5)
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#define ATA_DEV_HD ATA_IO_REG(6)
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#define ATA_COMMAND ATA_IO_REG(7)
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#define ATA_DATA_EVEN ATA_IO_REG(8)
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#define ATA_DATA_ODD ATA_IO_REG(9)
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#define ATA_STATUS ATA_COMMAND
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#define ATA_DEV_CTL ATA_IO_ALT(6)
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#define ATA_LBA_LOW ATA_SECT_NUM
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#define ATA_LBA_MID ATA_CYL_LOW
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#define ATA_LBA_HIGH ATA_CYL_HIGH
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#define ATA_LBA_SEL ATA_DEV_CTL
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/*
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* Status register bits
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*/
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#define ATA_STAT_BUSY 0x80 /* Device Busy */
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#define ATA_STAT_READY 0x40 /* Device Ready */
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#define ATA_STAT_FAULT 0x20 /* Device Fault */
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#define ATA_STAT_SEEK 0x10 /* Device Seek Complete */
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#define ATA_STAT_DRQ 0x08 /* Data Request (ready) */
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#define ATA_STAT_CORR 0x04 /* Corrected Data Error */
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#define ATA_STAT_INDEX 0x02 /* Vendor specific */
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#define ATA_STAT_ERR 0x01 /* Error */
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/*
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* Device / Head Register Bits
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*/
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#ifndef ATA_DEVICE
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#define ATA_DEVICE(x) ((x & 1)<<4)
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#endif /* ATA_DEVICE */
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#define ATA_LBA 0xE0
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/*
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* ATAPI Commands
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*/
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#define ATAPI_CMD_INQUIRY 0x12
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#define ATAPI_CMD_REQ_SENSE 0x03
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#define ATAPI_CMD_READ_CAP 0x25
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#define ATAPI_CMD_START_STOP 0x1B
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#define ATAPI_CMD_READ_12 0xA8
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#define ATA_GET_ERR() inb(ATA_STATUS)
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#define ATA_GET_STAT() inb(ATA_STATUS)
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#define ATA_OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
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#define ATA_BAD_R_STAT (ATA_STAT_BUSY | ATA_STAT_ERR)
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#define ATA_BAD_W_STAT (ATA_BAD_R_STAT | ATA_STAT_FAULT)
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#define ATA_BAD_STAT (ATA_BAD_R_STAT | ATA_STAT_DRQ)
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#define ATA_DRIVE_READY (ATA_READY_STAT | ATA_STAT_SEEK)
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#define ATA_DATA_READY (ATA_STAT_DRQ)
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#define ATA_BLOCKSIZE 512 /* bytes */
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#define ATA_BLOCKSHIFT 9 /* 2 ^ ATA_BLOCKSIZESHIFT = 512 */
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#define ATA_SECTORWORDS (512 / sizeof(uint32_t))
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#ifndef ATA_RESET_TIME
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#define ATA_RESET_TIME 60 /* spec allows up to 31 seconds */
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#endif
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/* ------------------------------------------------------------------------- */
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/*
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* structure returned by ATA_CMD_IDENT, as per ANSI ATA2 rev.2f spec
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*/
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typedef struct hd_driveid {
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unsigned short config; /* lots of obsolete bit flags */
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unsigned short cyls; /* "physical" cyls */
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unsigned short reserved2; /* reserved (word 2) */
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unsigned short heads; /* "physical" heads */
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unsigned short track_bytes; /* unformatted bytes per track */
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unsigned short sector_bytes; /* unformatted bytes per sector */
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unsigned short sectors; /* "physical" sectors per track */
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unsigned short vendor0; /* vendor unique */
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unsigned short vendor1; /* vendor unique */
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unsigned short vendor2; /* vendor unique */
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unsigned char serial_no[20]; /* 0 = not_specified */
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unsigned short buf_type;
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unsigned short buf_size; /* 512 byte increments; 0 = not_specified */
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unsigned short ecc_bytes; /* for r/w long cmds; 0 = not_specified */
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unsigned char fw_rev[8]; /* 0 = not_specified */
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unsigned char model[40]; /* 0 = not_specified */
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unsigned char max_multsect; /* 0=not_implemented */
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unsigned char vendor3; /* vendor unique */
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unsigned short dword_io; /* 0=not_implemented; 1=implemented */
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unsigned char vendor4; /* vendor unique */
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unsigned char capability; /* bits 0:DMA 1:LBA 2:IORDYsw 3:IORDYsup*/
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unsigned short reserved50; /* reserved (word 50) */
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unsigned char vendor5; /* vendor unique */
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unsigned char tPIO; /* 0=slow, 1=medium, 2=fast */
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unsigned char vendor6; /* vendor unique */
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unsigned char tDMA; /* 0=slow, 1=medium, 2=fast */
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unsigned short field_valid; /* bits 0:cur_ok 1:eide_ok */
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unsigned short cur_cyls; /* logical cylinders */
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unsigned short cur_heads; /* logical heads */
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unsigned short cur_sectors; /* logical sectors per track */
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unsigned short cur_capacity0; /* logical total sectors on drive */
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unsigned short cur_capacity1; /* (2 words, misaligned int) */
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unsigned char multsect; /* current multiple sector count */
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unsigned char multsect_valid; /* when (bit0==1) multsect is ok */
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unsigned short lba_capacity[2];/* two words containing total number of sectors */
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unsigned short dma_1word; /* single-word dma info */
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unsigned short dma_mword; /* multiple-word dma info */
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unsigned short eide_pio_modes; /* bits 0:mode3 1:mode4 */
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unsigned short eide_dma_min; /* min mword dma cycle time (ns) */
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unsigned short eide_dma_time; /* recommended mword dma cycle time (ns) */
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unsigned short eide_pio; /* min cycle time (ns), no IORDY */
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unsigned short eide_pio_iordy; /* min cycle time (ns), with IORDY */
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unsigned short words69_70[2]; /* reserved words 69-70 */
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unsigned short words71_74[4]; /* reserved words 71-74 */
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unsigned short queue_depth; /* */
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unsigned short words76_79[4]; /* reserved words 76-79 */
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unsigned short major_rev_num; /* */
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unsigned short minor_rev_num; /* */
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unsigned short command_set_1; /* bits 0:Smart 1:Security 2:Removable 3:PM */
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unsigned short command_set_2; /* bits 14:Smart Enabled 13:0 zero 10:lba48 support*/
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unsigned short cfsse; /* command set-feature supported extensions */
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unsigned short cfs_enable_1; /* command set-feature enabled */
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unsigned short cfs_enable_2; /* command set-feature enabled */
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unsigned short csf_default; /* command set-feature default */
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unsigned short dma_ultra; /* */
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unsigned short word89; /* reserved (word 89) */
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unsigned short word90; /* reserved (word 90) */
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unsigned short CurAPMvalues; /* current APM values */
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unsigned short word92; /* reserved (word 92) */
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unsigned short hw_config; /* hardware config */
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unsigned short words94_99[6];/* reserved words 94-99 */
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/*unsigned long long lba48_capacity; /--* 4 16bit values containing lba 48 total number of sectors */
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unsigned short lba48_capacity[4]; /* 4 16bit values containing lba 48 total number of sectors */
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unsigned short words104_125[22];/* reserved words 104-125 */
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unsigned short last_lun; /* reserved (word 126) */
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unsigned short word127; /* reserved (word 127) */
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unsigned short dlf; /* device lock function
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* 15:9 reserved
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* 8 security level 1:max 0:high
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* 7:6 reserved
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* 5 enhanced erase
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* 4 expire
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* 3 frozen
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* 2 locked
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* 1 en/disabled
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* 0 capability
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*/
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unsigned short csfo; /* current set features options
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* 15:4 reserved
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* 3 auto reassign
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* 2 reverting
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* 1 read-look-ahead
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* 0 write cache
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*/
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unsigned short words130_155[26];/* reserved vendor words 130-155 */
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unsigned short word156;
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unsigned short words157_159[3];/* reserved vendor words 157-159 */
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unsigned short words160_162[3];/* reserved words 160-162 */
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unsigned short cf_advanced_caps;
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unsigned short words164_255[92];/* reserved words 164-255 */
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} hd_driveid_t;
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/*
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* PIO Mode Configuration
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*
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* See ATA-3 (AT Attachment-3 Interface) documentation, Figure 14 / Table 21
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*/
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typedef struct {
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unsigned int t_setup; /* Setup Time in [ns] or clocks */
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unsigned int t_length; /* Length Time in [ns] or clocks */
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unsigned int t_hold; /* Hold Time in [ns] or clocks */
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}
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pio_config_t;
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#define IDE_MAX_PIO_MODE 4 /* max suppurted PIO mode */
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/* ------------------------------------------------------------------------- */
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#endif /* _ATA_H */
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