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https://github.com/u-boot/u-boot.git
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0a0b606faa
Update MX31ADS default environment to better match the flash layout and the memory map, support SPI and RTC. Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
201 lines
6.6 KiB
C
201 lines
6.6 KiB
C
/*
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* Copyright (C) 2008, Guennadi Liakhovetski <lg@denx.de>
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*
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* Configuration settings for the MX31ADS Freescale board.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/arch/mx31-regs.h>
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/* High Level Configuration Options */
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#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
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#define CONFIG_MX31 1 /* in a mx31 */
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#define CONFIG_MX31_HCLK_FREQ 26000000 /* RedBoot says 26MHz */
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#define CONFIG_MX31_CLK32 32000
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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/*
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* Disabled for now due to build problems under Debian and a significant increase
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* in the final file size: 144260 vs. 109536 Bytes.
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*/
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#if 0
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#define CONFIG_OF_LIBFDT 1
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#define CONFIG_FIT 1
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#define CONFIG_FIT_VERBOSE 1
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#endif
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#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
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#define CONFIG_SETUP_MEMORY_TAGS 1
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#define CONFIG_INITRD_TAG 1
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/*
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* Size of malloc() pool
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*/
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#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128 * 1024)
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#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
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/*
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* Hardware drivers
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*/
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#define CONFIG_MX31_UART 1
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#define CFG_MX31_UART1 1
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#define CONFIG_HARD_SPI 1
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#define CONFIG_MXC_SPI 1
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#define CONFIG_MXC_SPI_IFACE 1 /* Default SPI interface number */
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#define CONFIG_RTC_MC13783 1
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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#define CFG_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
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/***********************************************************
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* Command definition
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***********************************************************/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_SPI
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#define CONFIG_CMD_DATE
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_IPADDR 192.168.23.168
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#define CONFIG_SERVERIP 192.168.23.2
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#define CONFIG_LOADADDR (CSD0_BASE + 0x800000) /* loadaddr env var */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netdev=eth0\0" \
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"uboot_addr=0xa0000000\0" \
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"uboot=mx31ads/u-boot.bin\0" \
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"kernel=mx31ads/uImage\0" \
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"nfsroot=/opt/eldk/arm\0" \
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"bootargs_base=setenv bootargs console=ttymxc0,115200\0" \
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"bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs " \
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"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
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"bootcmd=run bootcmd_net\0" \
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"bootcmd_net=run bootargs_base bootargs_nfs; " \
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"tftpboot ${loadaddr} ${kernel}; bootm\0" \
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"prg_uboot=tftpboot ${loadaddr} ${uboot}; " \
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"protect off ${uboot_addr} 0xa003ffff; " \
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"erase ${uboot_addr} 0xa003ffff; " \
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"cp.b ${loadaddr} ${uboot_addr} ${filesize}; " \
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"setenv filesize; saveenv\0"
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#define CONFIG_DRIVER_CS8900 1
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#define CS8900_BASE 0xb4020300
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#define CS8900_BUS16 1 /* follow the Linux driver */
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/*
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* The MX31ADS board seems to have a hardware "peculiarity" confirmed under
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* U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the CS8900A
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* controller inverted. The controller is capable of detecting and correcting
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* this, but it needs 4 network packets for that. Which means, at startup, you
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* will not receive answers to the first 4 packest, unless there have been some
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* broadcasts on the network, or your board is on a hub. Reducing the ARP
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* timeout from default 5 seconds to 200ms we speed up the initial TFTP
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* transfer, should the user wish one, significantly.
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*/
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#define CONFIG_ARP_TIMEOUT 200UL
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/*
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* Miscellaneous configurable options
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*/
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#define CFG_LONGHELP /* undef to save memory */
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#define CFG_PROMPT "=> "
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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/* Print Buffer Size */
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#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
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#define CFG_MAXARGS 16 /* max number of command args */
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
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#define CFG_MEMTEST_START 0 /* memtest works on */
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#define CFG_MEMTEST_END 0x10000
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#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
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#define CFG_LOAD_ADDR CONFIG_LOADADDR
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#define CFG_HZ 32000
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#define CONFIG_CMDLINE_EDITING 1
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/*-----------------------------------------------------------------------
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* Stack sizes
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*
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* The stack sizes are set up in start.S using the settings below
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*/
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#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
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/*-----------------------------------------------------------------------
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* Physical Memory Map
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*/
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM_1 CSD0_BASE
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#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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#define CFG_FLASH_BASE CS0_BASE
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#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT 262 /* max number of sectors on one chip */
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#define CFG_MONITOR_BASE CFG_FLASH_BASE /* Monitor at beginning of flash */
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#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256KiB */
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#define CFG_ENV_IS_IN_FLASH 1
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#define CFG_ENV_SECT_SIZE (32 * 1024)
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#define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
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/* Address and size of Redundant Environment Sector */
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#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET + CFG_ENV_SIZE)
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#define CFG_ENV_SIZE_REDUND CFG_ENV_SIZE
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/* S29WS256N NOR flash has 4 32KiB small sectors at the beginning and at the end.
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* The rest of 32MiB is in 128KiB big sectors. U-Boot occupies the low 4 sectors,
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* if we put environment next to it, we will have to occupy 128KiB for it.
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* Putting it at the top of flash we use only 32KiB. */
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#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_ENV_SECT_SIZE)
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/*-----------------------------------------------------------------------
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* CFI FLASH driver setup
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*/
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#define CFG_FLASH_CFI 1 /* Flash memory is CFI compliant */
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#define CFG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
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#define CONFIG_FLASH_SPANSION_S29WS_N 1 /* A non-standard buffered write algorithm */
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#define CFG_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
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#define CFG_FLASH_PROTECTION 1 /* Use hardware sector protection */
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/*
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* JFFS2 partitions
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*/
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#undef CONFIG_JFFS2_CMDLINE
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#define CONFIG_JFFS2_DEV "nor0"
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#endif /* __CONFIG_H */
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