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09b9f649d0
As clk_stm32f driver is able to retrieve HSE frequency from DT, CONFIG_STM32_HSE_HZ becomes useless. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
90 lines
2.2 KiB
C
90 lines
2.2 KiB
C
/*
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* Copyright (C) 2016, STMicroelectronics - All Rights Reserved
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* Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_SYS_FLASH_BASE 0x08000000
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#define CONFIG_SYS_INIT_SP_ADDR 0x20050000
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#ifdef CONFIG_SUPPORT_SPL
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#define CONFIG_SYS_TEXT_BASE 0x08008000
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#define CONFIG_SYS_LOAD_ADDR 0x08008000
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#else
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#define CONFIG_SYS_TEXT_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_LOAD_ADDR 0xC0400000
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#define CONFIG_LOADADDR 0xC0400000
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#endif
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/*
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* Configuration of the external SDRAM memory
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*/
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_SYS_MAX_FLASH_SECT 8
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#define CONFIG_SYS_MAX_FLASH_BANKS 1
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#define CONFIG_ENV_SIZE (8 << 10)
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#define CONFIG_STM32_FLASH
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#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8)
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#define CONFIG_DW_ALTDESCRIPTOR
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#define CONFIG_MII
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#define CONFIG_PHY_SMSC
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#define CONFIG_SYS_CLK_FREQ 200000000 /* 200 MHz */
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#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_REVISION_TAG
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#define CONFIG_SYS_CBSIZE 1024
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#define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
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#define CONFIG_BOOTCOMMAND \
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"run bootcmd_romfs"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \
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"bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \
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"bootm 0x08044000 - 0x08042000\0"
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/*
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* Command line configuration.
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*/
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_CMD_CACHE
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#define CONFIG_BOARD_LATE_INIT
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#define CONFIG_DISPLAY_BOARDINFO
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/* For SPL */
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#ifdef CONFIG_SUPPORT_SPL
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#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_BOARD_INIT
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#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_FLASH_BASE
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#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
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#define CONFIG_SYS_SPL_LEN 0x00008000
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#define CONFIG_SYS_UBOOT_START 0x080083FD
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#define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \
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CONFIG_SYS_SPL_LEN)
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/* DT blob (fdt) address */
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#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
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0x1C0000)
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#endif
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/* For SPL ends */
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#endif /* __CONFIG_H */
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