The TARGET_x_R5_EVM check is already enough to limit these defines to
only the correct builds. Remove the extra outer check.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
The K3 JTAG and SoC ID information is already stored in the K3 arch
hardware file, include that and use its definitions here.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
This belongs in the J721e specific file as it is the only place
this is used. Any board level users should use the SOC driver.
While here, move the J721e and J7200 SoC IDs out of sys_proto.h
and into hardware.h. Use a macro borrowed from Rockchip and add
the rest of the SoC IDs for completeness and later use.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
The MSMC fixup is something we do based on SoC, not based on the board.
So this fixup does not belong in the board files. Move this to the
mach-k3 common file so that it does not have to be done in each board
that uses these SoCs.
We use ft_system_setup() here instead of ft_board_setup() since it is no
longer board level. Enable OF_SYSTEM_SETUP in the configurations that use
this to keep functionality the same.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
This reverts commit 5717294230. This
does not exist in upstream kernel.org and breaks boot on DRA7-EVMs.
Drop the same.
Signed-off-by: Andrew Davis <afd@ti.com>
This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.
Signed-off-by: Andrew Davis <afd@ti.com>
This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.
Signed-off-by: Andrew Davis <afd@ti.com>
This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.
Signed-off-by: Andrew Davis <afd@ti.com>
This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.
Signed-off-by: Andrew Davis <afd@ti.com>
This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.
Signed-off-by: Andrew Davis <afd@ti.com>
Several DTS files have been updated in the Linux kernel with a new
PADCONF macro replacing the IOPAD version. Sync for the same here.
Signed-off-by: Andrew Davis <afd@ti.com>
This member is used in series.MakeCcFile() so should be declared in the
Series class.
Add a declaration to silence the warning.
Signed-off-by: Simon Glass <sjg@chromium.org>
- Add rk3588 evb support;
- Update pinctrl for rk3568 and rk3588;
- Update rk3288 dts;
- Update mmc support for rk3568 and rk3588;
- Add rng support for rk3588;
- Add DSI support for rk3568;
- Some other misc fixes in dts, config, driver;
- watchdog: arm_smc_wdt: add watchdog support (Lionel)
- watchdog: ftwdt010: return a previously deleted driver now ported to
DM (Sergei)
- watchdog: Add a watchdog driver for Raspberry Pi boards (Etienne)
_ Add usb_pgood_delay for ST boards
_ increase malloc size for pre-reloc for stm32mp15
_ Set CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2s for stm32mp15
dts:
_ Add QSPI support on STM32MP13x SoC family
_ Add FMC support on STM32MP13x SoC family
drivers/machine:
_ pinctrl_stm32: Add slew rate support for stm32_pinctrl_get_pin_muxing()
_ spi: stm32_qspi: Remove useless struct stm32_qspi_flash
_ rawnand: stm32_fmc2: remove unsupported EDO mode
_ stm32mp: fix various array bounds checks
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Merge tag 'u-boot-stm32-20230419' of https://source.denx.de/u-boot/custodians/u-boot-stm
configs:
_ Add usb_pgood_delay for ST boards
_ increase malloc size for pre-reloc for stm32mp15
_ Set CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2s for stm32mp15
dts:
_ Add QSPI support on STM32MP13x SoC family
_ Add FMC support on STM32MP13x SoC family
drivers/machine:
_ pinctrl_stm32: Add slew rate support for stm32_pinctrl_get_pin_muxing()
_ spi: stm32_qspi: Remove useless struct stm32_qspi_flash
_ rawnand: stm32_fmc2: remove unsupported EDO mode
_ stm32mp: fix various array bounds checks
Replaces a patch by Linus Walleij merged with pull request
u-boot-nand-20230417, with a newer version that contains fixes for tests
run by Tom Rini.
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Merge tag 'u-boot-nand-20230422' of https://source.denx.de/u-boot/custodians/u-boot-nand-flash
Pull request for u-boot-nand-20230422
Replaces a patch by Linus Walleij merged with pull request
u-boot-nand-20230417, with a newer version that contains fixes for tests
run by Tom Rini.
For BRCMNAND with 1-bit BCH ECC (BCH-1) such as used on the
D-Link DIR-885L and DIR-890L routers, we need to explicitly
select the ECC like this in the device tree:
nand-ecc-algo = "bch";
nand-ecc-strength = <1>;
nand-ecc-step-size = <512>;
This is handled by the Linux kernel but U-Boot core does
not respect this. Fix it up by parsing the algorithm and
preserve the behaviour using this property to select
software BCH as far as possible.
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Tom Rini <trini@konsulko.com> [am335x_evm]
Link: https://lore.kernel.org/all/20230407134008.1939717-3-linus.walleij@linaro.org/
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
It will be replaced by a more recent version which contains fixes for
tests run by Tom Rini.
This reverts commit ff33d3c87c.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
enable commands for i2c/pmic/regulator and relevant configs.
also drop configs for unused regulators.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Using DMA to load TF-A into SRAM fails when booting from eMMC on RK3588.
## Checking hash(es) for Image atf-3 ... sha256 error!
Bad hash value for 'hash' hash node in 'atf-3' image node
spl_load_simple_fit: can't load image loadables index 2 (ret = -1)
mmc_load_image_raw_sector: mmc block read error
Fix this by using PIO mode in SPL and limit the number of blocks used in
a single read command to avoid triggering Data End Bit Error interrupt.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Rockchip emmc devices have a similar issue to Rockchip dwmmc devices,
where performing DMA to SRAM later causes issues with suspend/resume.
Allow us to toggle SDMA in SPL for sdhci similar to ADMA support, so we
can ensure DMA is not used when loading the SRAM code.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
[jonas@kwiboo.se: add Kconfig default value and fix ADMA typo]
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
The device tree sdhci node reference the TMCLK_EMMC clock, add limited
support this clock to rk3588 cru driver. Fixes probe of sdhci driver.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add sdhci node to SPL and u-boot,spl-boot-order. Also add more supported
mmc modes and pinctrl.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for RK3588 to the rockchip sdhci driver.
Use driver data to handle differences between RK3568 and RK3588:
- Set "Receive original clock source is auto gating" for RK3588.
- Set "Receive clock source is no-inverted" only on RK3568 and "Transmit
clock source is invertion of original clock input" for RK3588.
- Use different txclk_tapnum for HS400 modes on RK3588.
- Configure the CMDOUT reg for HS400 modes for RK3588.
This is based on the mainline linux and vendor kernel driver and have
successfully been tested with rock5b-rk3588_defconfig and
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_SPEED_MODE_SET=y
using the following command to switch mode and then read 512 MiB of data
from eMMC into memory,
=> mmc dev 0 0 <mode> && mmc info && mmc read 10000000 2000 10000
for each of the modes below.
0 = MMC legacy
1 = MMC High Speed (26MHz)
3 = MMC High Speed (52MHz)
4 = MMC DDR52 (52MHz)
10 = HS200 (200MHz)
11 = HS400 (200MHz)
12 = HS400ES (200MHz)
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Adjust tap number for transmit clock, tap number and delay number for
strobe input to fix HS400 modes on RK3568.
New values have been picked from vendor kernel and u-boot and have
successfully been tested with rock-3a-rk3568_defconfig and
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_SPEED_MODE_SET=y
using the following command to switch mode and then read 512 MiB of data
from eMMC into memory,
=> mmc dev 0 0 <mode> && mmc info && mmc read 10000000 2000 10000
for each of the modes below.
0 = MMC legacy
1 = MMC High Speed (26MHz)
3 = MMC High Speed (52MHz)
4 = MMC DDR52 (52MHz)
10 = HS200 (200MHz)
11 = HS400 (200MHz)
12 = HS400ES (200MHz)
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This rearrange and remove duplicate defines to make the code cleaner.
There is no need to read vendor area1 and use an offset each time, it is
easier and clearer to just use the reg offset defined in TRM, same as
the other vendor regs.
This also removes use of the misspelled const for the RK3588 CMDOUT reg,
it will be re-added when support for RK3588 is introduced.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Remove empty implementations of get_phy and set_enhanced_strobe ops.
Change driver set_enhanced_strobe to return 0 in order to allow missing
implementation of the ops.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Refactor set_ios_post ops to correctly set UHS Speed Select field values
according to TRM. Also set or unset Enhanced Strobe Enable bit and
eMMC Card present bit in set_ios_post, the Enhanced Strobe Enable bit
was never unset after switching to HS400ES mode.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Check return value from mmc_send_cmd and clear HOST_CONTROL2 when there
is an error. Also skip enable of interrupt signaling and remove a delay,
a delay is already happening in sdhci_send_command.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Change to configure clock and DLL in set_clock and config_dll ops
instead of in the set_ios_post ops.
With this change the output clock is turned off while configuring DLL
parameters, according to the design recommendations.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add support for the set_clock and config_dll sdhci_ops. Use of these ops
will allow configuration of DLL while the output clock is disabled.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Remove the unneeded emmc_phy_init now that the no-inverter flag is
handled correctly after commit 2321a991bb ("rockchip: sdhci: rk3568:
bypass DLL when clk <= 52 MHz").
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The device private data is misused in rockchip_sdhci_of_to_plat and
rockchip_sdhci_execute_tuning.
In these functions dev_get_priv is assigned to struct sdhci_host:
struct sdhci_host *host = dev_get_priv(dev);
Instead, the sdhci host should refer to host in struct rockchip_sdhc:
struct rockchip_sdhc *priv = dev_get_priv(dev);
struct sdhci_host *host = &priv->host;
Because host is the first member in struct rockchip_sdhc this is not a
real problem, lets fix it anyway and also use priv name consistently.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Set correct UHS Mode Select field value for UHS SDR25 (50MHz) mode.
Fixes: d1c0a2200a ("mmc: sdhci: Add support for HOST_CONTROL2 and setting UHS timings")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
