Mark MXS_SPI as DEPRECATED, this so the resulting build shows
warning for broken configuration enabled and associated code
will remove in v2019.07 release.
Cc: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
[trini: Switch to DEPRECATED]
Signed-off-by: Tom Rini <trini@konsulko.com>
- pinctrl: meson-gxbb: add hdmi related pins to fix HDMI on GXBB
- pinctrl: meson: add support for getting pinmux status
- pinctrl: meson-g12a: add support for drive-strength-microamp property
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJdARHoAAoJEHfc29rIyEnRT/oP/1SXqPLazLQapLPr82nFh5f3
Wf/YxmzWscpWFsS3eyOuIpitIY4d461UWRR3i855uY0TFfoJlt1doIsJWyMy5fTm
XLUSoZrSzWPPfdcdXyVfQ3LvA/+r67hfxq0CQjABpCMa/ewn9hV8lPp7Yuz3ZxRm
xZQi52j/9idl6i0z17wPHef2bbgskZW56eYG9BJxmHDNIboJlaEOF0vwNb9SenfL
uWOSPSEL7MbKm3c1EtDo1KPilU2des0MOxrrkM/kLpMyoOnGwML/GQuRdKUzGhFC
CHoP74WCWvoyJtlqDizhYdXHkT15Kg1HZyegbp/vw8u52Ol1R5eSXZxp82VlP7Zm
KPvC2tL6RIbx4+uGD3abwsY3nEAne4IRB9Kj0EaX4nKu/nZpKo44qbzPLBUpGFF8
kD28/vrOlXqunYQIwon/1lQ3yfzceXqe2f60KZz7chv3u5c23xOpiWx1ptGetKHm
kiJtRofb+6HsiGJPRny7DS1/6zPzKLe1gJdWs5ZSOCm2nl0Nd1YMCe0J444lgk1m
iEbT5K9GjEV8g4BpQdFGCWy89pb4whUwFxz8+AYykqfEJSG6xjCW2Wp8N1Sfk1VF
1CKMd93c+39BwxJTDyQlp+2zi4wOZnIuQ080tzk1hMh2CzZ/ZWjiXquidZI12uw+
vRopJDiqYGX30TnHMhCm
=QA+5
-----END PGP SIGNATURE-----
Merge tag 'u-boot-amlogic-20190612' of git://git.denx.de/u-boot-amlogic
- pinctrl: meson-gx: fix GPIO_TEST_N and GPIOCLK_ groups
- pinctrl: meson-gxbb: add hdmi related pins to fix HDMI on GXBB
- pinctrl: meson: add support for getting pinmux status
- pinctrl: meson-g12a: add support for drive-strength-microamp property
The GXBB pinctrl is missing pins related to HDMI, namely hot plug
detection (hpd) and I2C (sda + scl).
This fixes HDMI support for GXBB in u-boot.
Reported-by: Mohammad Rasim <mohammad.rasim96@gmail.com>
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Mohammad Rasim <mohammad.rasim96@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
add drive-strength bank regiter and bit value for G12A SoC
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
drive-strength-microamp is a new feature needed for G12A SoC.
the default DS setting after boot is usually 500uA and it is not enough for
many functions. We need to be able to set the drive strength to reliably
enable things like MMC, I2C, etc ...
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
In order to support the "pinmux status" command, use the common functions
to get the pins count and names, and add the AXG specific function to get
the current function from registers.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
In order to support the "pinmux status" command, use the common functions
to get the pins count and names, and add the GX specific function to get
the current function from registers.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Maxime Jourdan <mjourdan@baylibre.com>
In order to support the "pinmux status" command, add common function
to get pins count and pin name.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The GPIO_TEST_N was in the wrong pmx group table, move it back with the AO
groups, GPIODV_18 was missing, add it back, and finally the GPIOCLK_*
group names were missing.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
- Add saveenv support for STM32MP1
- Add STM32MP1 Avenger96 board support
- Add SPI driver suport for STM32MP1
- Add watchdog support for STM32MP1
- Update power supply check via USB TYPE-C for STM32MP1 discovery board
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJc+TqsAAoJEMrHeC97M/+miKwP/3OouX3slblEfUELRj/9qLlU
ypdUDKDQupGSrTIyhJHFdGbA2ct/ERl4mH/kU8NNeCHVCsdvrrmuw+k4jfVZfIyi
d9gWmU5WanNPzdWwdo0NrVNXjN5LPduxeUCYHdDEggDJuG3YL4LA9pPyrWpL8o8t
tLPr8YMB1u5Ab8Vn/1A9lKvmw98V59LmWVxZh0AtAdOTvWgEZQe1R5Vex+MHacnK
uR/Dm3ry5v7ZlR/kMZ0C+Ip1aw9GU4e+O+LCGlU4Jr0GV2XQOr4ehxWtN02nYubc
sYXbkW7UArR0I0g8YPXPoBI9PToi57bHW/TXKoI8yDIll7vZ9PDjT/FbUJM9rv72
WU6T7+K2DeHflmp4NljiesD2rDnti0XSCbe4o5o/jD+YkzH6YoJbco4nsae7TBSM
R3rgV7/+St7zC1IjFq0TUG+S9qSUmZqA4k66+j5/SS6pLQOW3dYemL0/up2cRX5w
dx00JTQkHyh7Q/GfH8r7yZqIToW9djB9HeT88ovPUCh8rVfDqNn8/WKd2JAfkxda
QiZDs49BMBsnWpK+vPqiq/suoJeSwDB70iMzrGgBg+mTd9eJcD0c5QBURYE0jm2H
GqQ04WNi8sLzULhMqKbBdPZhBMzyNmDXF6MC+y/OcUM5k8z6tY8LDro3wgHXWVpX
DLiFVbkHbLhlUJbeO8dD
=2C9f
-----END PGP SIGNATURE-----
Merge tag 'u-boot-stm32-20190606' of https://github.com/pchotard/u-boot
- Add Ethernet support for STM32MP1
- Add saveenv support for STM32MP1
- Add STM32MP1 Avenger96 board support
- Add SPI driver suport for STM32MP1
- Add watchdog support for STM32MP1
- Update power supply check via USB TYPE-C for STM32MP1 discovery board
This commit is necessary to be able to re-use the pinctrl code in early
SPL to properly configure pins.
The problem is that those "static" structures (without explicit
initialization) are placed in the SDRAM area, which corresponds to
u-boot proper (not even SPL).
Hence, when one wants to configure pins before relocation via DTS/DM,
the board hangs (imx6q SoC powered one) as only OCRAM area is available
(0x009xxxxx).
This commit prevents from this issue by moving the imx6_pinctrl_soc_info
structure to data section (from BSS).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
We should not access reserved register on i.MX8, otherwise met SERROR
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Add DM support and support for probing the iMX PCI driver from DT.
The legacy non-DM support is retained, however shall be removed once
DM PCI is the only option remaining.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Pass the driver private data around the driver as much as possible, instead
of having it as a static global variable. This is done in preparation for
the DM conversion, no functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The driver limits the config space base to 32bit, however it can be
64bit on 64bit iMX hardware too. Remove that limitation. This patch
has no impact on the iMX6, which is the only SoC currently supported
by this driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Pull out hard-coded register base addresses into driver private
structure in preparation for DM conversion. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This fixes the i.MX 8 fuse driver to actually build for i.MX 8QM as
well.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Max Krummenacher <max.krummenacher@toradex.com>
Trying to bring up uSDHC2 the following error message was observed:
MMC: imx8_clk_set_rate(Invalid clk ID #60)
imx8_clk_set_rate(Invalid clk ID #60)
usdhc@5b030000 - probe failed: -22
This commit fixes this by properly setting resp. clocks.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Max Krummenacher <max.krummenacher@toradex.com>
in mxc_spi_probe() plat and mxcs pointer are created:
struct mxc_spi_slave *plat = bus->platdata;
struct mxc_spi_slave *mxcs = dev_get_platdata(bus);
which have the same value. Remove plat pointer.
Signed-off-by: Heiko Schocher <hs@denx.de>
Commit 22191ac353 ("drivers/crypto/fsl: assign job-rings to
non-TrustZone") breaks HABv4 encrypted boot support in the
following i.MX devices:
- i.MX6UL
- i.MX7S
- i.MX7D
- i.MX7ULP
For preparing a HABv4 encrypted boot image it's necessary to
encapsulate the generated DEK in a blob. In devices listed
above the blob generation function takes into consideration
the Job Ring TrustZone ownership configuration (JROWN_NS)
and can be only decapsulated by the same configuration.
The ROM code expects DEK blobs encapsulated by the Secure World
environments which commonly have JROWN_NS = 0.
As U-Boot is running in Secure World we must have JROWN_NS = 0
so the blobs generated by dek_blob tool can be decapsulated
by the ROM code.
Job-rings assignment is now handled in OP-TEE OS, this commit can
be safely reverted.
https://github.com/OP-TEE/optee_os/pull/2986
This reverts commit 22191ac353.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
https://source.codeaurora.org/external/imx/uboot-imx
cherry picked, styled and merged commits:
- MLK-18387 pmic: Add pmic driver for BD71837: e9a3bec2e95a
- MLK-18590 pmic: bd71837: Change to use new fdt API: acdc5c297a96
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The code that sets a regulator by looking up the voltage in a table had
an off by one error. vsel_mask is a bitmask, not the number of table
entries, so a vsel_mask value of 0x7 indicates there are 8, not 7,
entries in the table.
Cc: Peng Fan <Peng.Fan@freescale.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Support DM in the MPC8xxx SPI driver, and remove the legacy SPI
interface.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
The comment before the transmission loop in conjunction with the
definition of SPI_TIMEOUT as 1000 implies that the loop is supposed to
have a timeout value of 1000 ms. But since there is no mdelay(1) or
similar in the loop body, the loop just runs 1000 times, without regard
for the time elapsed.
To correct this, use the standard get_timer functionality to properly
time out the loop after 1000 ms.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Decreasing the bit length and increasing the write data pointer should
be done when there are more than 32 bit of data, not 16 bit.
This did not produce incorrect behavior, because the only time where the
two checks produce different outcomes is the case of 16 < bitlen < 32,
and in this case the subsequent transmission is the last one regardless,
hence the additional bit length decrease and write data pointer increase
has no effect anyway.
Still, the correct check is the check for "bitlen > 32", so correct this
behavior.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Minize the time the adapter is disabled (via SPI_MODE_EN
clearing/setting) to just the character length setting, and only set up
the temporary data writing variable right before we need it, so there is
a more clear distinction between setting up the SPI adapter, and setting
up the data to be written.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Instead of having a table right before the code implementing the length
setting for documentation, have inline comments for the if branches
actually implementing the length setting described table's entries
(which is readable thanks to the set_char_len function).
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
The variable "char_size" holds the number of bits to be transferred in
the current loop iteration. A better name would be "xfer_bitlen", which
we rename this variable to.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Introduce the to_prescale_mod and set_char_len inline functions to make
the code more readable.
Note that the added "if (bitlen > 16)" check does not change the
semantics of the current code, and hence only preserves the current
error (this will be fixed in a later patch in the series).
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
The transmission loop starts with setting some variables, which are only
used inside the loop. Reduce the scope to the loop to make the
declaration and initialization of these variables coincide.
In the case of char_size this also always initializes the variable
immediately with the final value actually used in the loop (instead of
the placeholder value 32).
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
We do nothing in the loop if the "not empty" event was not detected. To
simplify the logic, check if this is the case, and skip the execution of
the loop early to reduce the nesting level and flag checking.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Get rid of the is_read variable, and just keep the state of the "not
empty" and "not full" events in two boolean variables within the loop
body.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Instead of having a nested if block, just have two branches within the
overarching if block to eliminate one nesting level.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Accesses to the register map are currently done by directly reading and
writing the structure.
Switch to the appropriate IO accessors instead.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Replace pre-processor defines with proper enums, and use the BIT macro
where applicable.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Replace the function name with a "%s" format string and the __func__
variable in debug statements (as proposed by checkpatch).
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
There are three variables that have camel-case names, which is not the
preferred naming style.
Give those variables more compliant names instead.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
There are some comments on the same line as the code they document. Put
comments above the code lines they document, so the line length is not
unnecessarily increased.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
The function signatures in the driver are quite long as is. Use short
type names (uint etc.) to make them more readable.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Synopsys GMAC 4.20 is used. And Phy mode for eval and disco is RMII
with PHY Realtek RTL8211 (RGMII)
We also support some other PHY config on stm32mp157c
PHY_MODE (MII,GMII, RMII, RGMII) and in normal,
PHY wo crystal (25Mhz and 50Mhz), No 125Mhz from PHY config
Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
ETHCK_K is the identifier the kernel clock for ETH in kernel
binding, selected by ETHKSELR / gated by ETHCKEN = BIT(7).
U-Boot driver need to use the same identifier, so change ETHCK
to ETHCK_K.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
To make adding new entry easier, sort Kconfig entries in
alphabetical order.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
When ENV_IS_IN_UBI is enable, get_mtdparts is called before relocation.
During first get_mtdparts() call, mtdparts is not available in environment,
it can be retrieved by calling board_mtdparts_default(), but following
env_set() do nothing as we are before relocation. Finally mtdparts is
still not available in environment.
At second get_mtdparts() call, use_defaults is false, but mtdparts is still
not in environment and is NULL.
Remove use_defaults bool, only mtdparts criteria is useful.
Fixes: commit 5ffcd50612 ("mtd: Use default mtdparts/mtids when not defined
in the environment")
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Some boards don't have such a regulator, and don't need one to enable
HDMI display. Make it optional, fixing hdmi display for those boards.
Also surround the regulator code with a config check on DM_REGULATOR.
Reported-by: Mohammad Rasim <mohammad.rasim96@gmail.com>
Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Mohammad Rasim <mohammad.rasim96@gmail.com>
Extend the driver to build with DM_VIDEO enabled. DTS files
must additionally include 'u-boot,dm-pre-reloc' property in
soc and child nodes to enable driver binding to mxsfb device.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Refactor video_hw_init() function, and introduce an independent function
for the common procedure of initialization.
Currently video_hw_init() is only in charge of parsing configuration from
env("videomode") and filling struct GraphicPanel, and new
mxs_probe_common() does hw specific initialization (invocation of
mxs_lcd_init() etc.)
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Provide directly framebuffer address instead of pointer to
GraphicDevice struct, which will let to re-use this function in
DM_VIDEO configurations.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Corrections for boottime services for protocols and for the SetTime()
service are provided.
Error messages for the 'setenv -e' and 'bootefi bootmgr' commands are
added.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEbcT5xx8ppvoGt20zxIHbvCwFGsQFAlzziRQACgkQxIHbvCwF
GsRFwA/9HJejIxx8TjMBAixuV0QRpvNlSqT4UNruDxDn1+UELDLzXAm2hinY07lR
l58ztrzcFx6dUcTWR13P7vVItaGKoIyDTHKfdKbdtUC5OQzApu9/Crb5/+NPf2cS
bxuFVEtrgvdJ9HdtF5SxTevnJK8MXnb8ho8QmYr+rPC5AMAOPWBnMMiWuS330TAW
znxiWN+Hiy1q9+0peAHRcvTl0gheRrEUHqdluKdLOEwdJul3XjQlvOG87QAcuTOx
+Y6VPDl91E6WKIofILDMfCBLVVsEw5ruoW2e1Vo23UxtIkTkDtop0qe46wBAzsJe
blEFtvOXaAPikuL9x2aGO2nwk2q87tRzbS5pEGWspWW/PX72k94Vgw4R9NXj9Wpp
UPpG4BK2Eu1YohomHa/zmaJPdRUYg2cP34N1YAbLrEX9Ro7Nhmf+cBgckbR+GRuF
C95hBCzRNYpPV9BRHZlLG58yiTN/OUcTRSA87dENycA9WFqI8LRlLfkn8BYBwUwO
KhFMLOjUViYvu+t+HcqBSQWwLN7Iw0F8lOfRQkJ1EFym29QNpWH6HjykAKN3SwUn
b+r2ZDBwtwqGxZfUcaJHjc1ZPtzYEF7F3csrnicO5F+nN0oQvd8zBSHylDbvwAzd
L392XREU4gB5Z/qxPjRFZdlVRgRmE36bNc7jcezT/qeD7Cl7z9I=
=A8+f
-----END PGP SIGNATURE-----
Merge tag 'efi-2019-07-rc4' of git://git.denx.de/u-boot-efi
Pull request for UEFI sub-system for v2019.07-rc4
Corrections for boottime services for protocols and for the SetTime()
service are provided.
Error messages for the 'setenv -e' and 'bootefi bootmgr' commands are
added.
At present the link speed change callback is a nop. According to
macb device tree bindings, an optional "tx_clk" is used to clock
the ethernet controller's TX_CLK under different link speed.
In 10/100 MII mode, transmit logic must be clocked from a free
running clock generated by the external PHY. In gigabit GMII mode,
the controller, not the external PHY, must generate the 125 MHz
transmit clock towards the PHY.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Tested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This updates DM version macb_linkspd_cb() signature for future
expansion, eg: adding an implementation for link speed changes.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This adds a clock driver to support the GEMGXL management IP block
found in FU540 SoCs to control GEM TX clock operation mode for
10/100/1000 Mbps.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Tested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
- some fix for rk3399-puma;
- rockchip script make_fit_atf.py cleanup
- Enable TPL for rk3399 orangepi and nanopi4;
- add support for rk3399 boards: Nanopi NEO4, Rockpro64, Rock PI 4;
The G12A PCIE PLL clock was introduced in Linux 5.2-rc1, and is needed
for USB to operate, add basic support for it and associated gates.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This patch adds the rate for UART1 and UART3 the same way
as already implemented for UART0 and UART2.
This is required for boards, which have their console output
on these UARTs.
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
For bcm7445 and bcm7260, this patch enables CONFIG_DM_MMC and updates
the bcmstb SDHCI driver to use the new driver model. This allows
removal of SDHCI configuration handling from bcmstb.c, and eliminates
a board removal compile warning.
Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Reviewed-by: Stefan Roese <sr@denx.de>
- Gen3 PCIe driver + enablement on Salvator-X platforms.
- Gen3 recovery SPL used to reload ATF/OpTee/U-Boot instead of minimon.
- SDHI HS400 fixes ported from latest BSP and datasheet.
Move the main symbol for Freescale Fman Ethernet controller option to
Kconfig. Also migrate the CONFIG_SYS_QE_FMAN_FW_IN_xxx macros and
rename the SPIFLASH one to follow the same format as all of the others.
To do this fully we need to migrate CONFIG_QC, do so.
Signed-off-by: Tom Rini <trini@konsulko.com>
Add a sound driver for tegra devices. This connects the audio hub, I2S
controller and audio codec to allow sound output.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add a driver which supports transmitting digital sound to an audio codec.
This uses fixed parameters as a device-tree binding is not currently
defined.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add a driver for the audio hub. This is modelled as a misc device which
supports writing audio data from I2S.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
- Add STM32MP1 DDR driver update:
These update introduce the DDR interactive mode described in:
https://wiki.st.com/stm32mpu/index.php/U-Boot_SPL:_DDR_interactive_mode
This mode is used by the CubeMX: DDR tuning tool.
https://wiki.st.com/stm32mpu/index.php/STM32CubeMX
The DDR interactive mode is NOT activated by default because
it increase the SPL size and slow down the boot time
(200ms wait added).
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJc5rdIAAoJEMrHeC97M/+mw64P/0jD3C1jvtwkzFQ2DPvnSQEk
iTZHMb91/9GncSY0S2Cgn8a2+m24F7YFLqibKSdduLLr/w98Zfi7kmO+ju/Kn+qE
aG6iomyour8+Pr+1LMPolsKKM8lULSgrd4ALRA5CegNsXijvYEE7N8mPrBpdIQem
BaM4HnQpbtxXU9J/rGHAVagLuHbJmwBvZBQTBAWfQdNR5+vGfplH2sF0cxJF5UTW
06yBXrwjLW6PEVYZbzYiRQ5Gn7BnBe4nXrl4ReDtS5e4ueRKM166TZljvNCd60KI
B49eLxd0wT2Zutsz1rT5c/LChXo3cr8FXM3csJ6J6cIBdfFF3frHbIEDM2jZTxJf
jN7pAHpxbRdYS/GbWS5mSuUyKmxDPt6Kfd7LQUYX9qktqeLG9LfkrmLfGdCSiwkB
64Z15DoHAuDMab+LlV+rz8ns3YAV0ruFryWfZ8udLWuX3G6NDmivafLR3dgNRdNB
otkyCdIlq8GQUm3w+5r9wm7aGvHB3UtNYK870AnYA20vmn/WVuUBZ6yE+lce/QpV
zFS4dgsdbn41EXO/O9TtwMyKT+/s138u2+L7CEegXiNneJmwzbJg3YPeMuaiF8Y2
oYqlUmfVO/ZuoVvr5dwo4TY96nEhRf2Ul36spRdrx8wBZ0YdL+ByDO5Pcc2B9A+P
M80QqlT64BJDJ1CqhW5m
=meeB
-----END PGP SIGNATURE-----
Merge tag 'u-boot-stm32-20190523' of https://github.com/pchotard/u-boot
- Add various STM32MP1 fixes for serial, env, clk, board, i2c ...
- Add STM32MP1 DDR driver update:
These update introduce the DDR interactive mode described in:
https://wiki.st.com/stm32mpu/index.php/U-Boot_SPL:_DDR_interactive_mode
This mode is used by the CubeMX: DDR tuning tool.
https://wiki.st.com/stm32mpu/index.php/STM32CubeMX
The DDR interactive mode is NOT activated by default because
it increase the SPL size and slow down the boot time
(200ms wait added).
This patch adds devicetree support to the mcfuart.c driver
and removes non DM code.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
commit 1b898ffc04 ("gpio: dwapb_gpio: convert to livetree") introduced
a bug in that dev->node of the gpio chip was accidentally set to the
of_node of its bank subnode.
What it meant to do was assign subdev->node, not dev->node.
While this doesn't affect too many use cases, iterating over the gpio
chip's properties doesn't work any more after that, so fix this.
Fixes: commit 1b898ffc04 ("gpio: dwapb_gpio: convert to livetree")
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
This patch is to support Freescale sata driver with dts initialized.
Also resolved the following problems.
===================== WARNING ======================
This board does not use CONFIG_DM_SCSI. Please update
the storage controller to use CONFIG_DM_SCSI before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
adopt 32 bit addr in fsl_esdhc for CONFIG_PPC.
So adopt 32 bit address for CONFIG_PPC.
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add command tuning for DDR interactive mode, used during
board bring-up or with CubeMX DDR tools to execute software
tuning for the DDR configuration:
- software read DQS Gating (replace the built-in one)
- Bit de-skew
- Eye Training or DQS training
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add command tests for DDR interactive mode, used during
board bring-up or with CubeMX DDR tools to verify the
DDR configuration.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This debug mode is used by CubeMX DDR tuning tools
or manualy for tests during board bring-up.
It is simple console used to change DDR parameters and check
initialization.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Manage power supply configuration for board using stpmic1
with LPDDR2 or with LPDDR3:
+ VDD_DDR1 = 1.8V with BUCK3 (bypass if possible)
+ VDD_DDR2 = 1.2V with BUCK2
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Force alignment of the size of parameters array with
the expected value in the binding, that allows compilation
error when the array size change.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Component Notification DDR controller errata (3.00a):9001313030
Synchronization Time Waited After De-assertion of presetn is
128 pclk Cycles.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
For STM32MP, the watchdog is based on DM and the function watchod_reset
call the function uclass_get_device(UCLASS_WDT) to found the driver
associated IWDG2.
As this reset is not mandatory in debug putc (the uart fifo will be
empty after some us), we can simplify the code by removing this call.
And this patch avoid issue when putc is called before initialization
of DM core, before the parsing of the device tree parsing and each
node bound to driver; that also avoid memory leak.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This avoids useless loops inside the I2C timing algorithm.
Actually, we support only one possible solution per prescaler value.
So after finding a solution with a prescaler, the algorithm can
switch directly to the next prescaler value.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
It conforms with Reference Manual I2C timing section.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
PowerPC supports 32 bit address.
So adopt 32 bit addr in fsl_esdhc for CONFIG_PPC.
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
sp805 is watchdog on some NXP layerscape SoCs, adding
it's driver. Configs CONFIG_WDT_SP805, CONFIG_WDT, CONFIG_CMD_WDT
needs to be enabled to use it.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Distinguish the ecc val by chassis version and move the ecc addr to dts.
Add ls1028a soc support.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add the infrastructure for Layerscape SoCs PCIe Gen4 controller
to update device tree nodes to convey SMMU stream IDs in the
device tree.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add PCIe Gen4 driver for the NXP Layerscape SoCs. This PCIe
controller is based on the Mobiveil IP, which is compatible
with the PCI Express™ Base Specification, Revision 4.0.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Bao Xiaowei <Xiaowei.Bao@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
