Commit Graph

22345 Commits

Author SHA1 Message Date
Heinrich Schuchardt
f027222ad8 efi_loader: Uart device path
When uploading an EFI binary via the UART we need to assign a device path.

* Provide devicepath node to text conversion for Uart() node.
* Provide function to create Uart() device path.
* Add UART support to efi_dp_from_name().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-25 20:09:17 +01:00
Fabien Parent
e96bedf146 board: Add MT8183 pumpkin board support
Add the MT8183 pumpkin board support.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-03-20 16:24:27 -04:00
Fabien Parent
21f593214b configs: mt8516: use bootcmd from config_distro_bootcmd.h
Instead of redefining our own way to boot, let's just use
config_distro_bootcmd.h.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-03-20 16:24:27 -04:00
Fabien Parent
86e07d59ee board: mediatek: rename pumpkin board into mt8516
More than one pumpkin board has been made with different MediaTek SoCs.
Rename the pumpkin board to follow the naming convention of all
other MediaTek boards and also to not be confusing when other pumpkin
boards will be added in follow-up commits.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-03-20 16:24:26 -04:00
Lad Prabhakar
07148c1899 arm: rmobile: Add Silicon Linux EK874 board support
The EK874 development kit from Silicon Linux is made of CAT874 (the main
board) and CAT875 (the sub board that goes on top of CAT874).

This patch adds the required board support to boot Si-Linux EK874 board
based on R8A774C0 SoC.

DTS files apart from r8a774c0-ek874-u-boot.dts and r8a774c0-u-boot.dtsi
have been imported from Linux kernel 5.11 commit f40ddce88593
("Linux 5.11").

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16 20:09:29 +01:00
Biju Das
b650c83825 arm: rmobile: Add HopeRun HiHope RZ/G2M board support
The HiHope RZ/G2M board from HopeRun consists of main board
(HopeRun HiHope RZ/G2M main board) and sub board(HopeRun
HiHope RZ/G2M sub board). The HiHope RZ/G2M sub board sits
below the HiHope RZ/G2M main board.

This patch adds the required board support to boot HopeRun HiHope
RZ/G2M board.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-03-16 20:09:29 +01:00
Tom Rini
22fc991daf Prepare v2021.04-rc4
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Merge tag 'v2021.04-rc4' into next

Prepare v2021.04-rc4
2021-03-15 12:15:38 -04:00
Tom Rini
23986be8ca Merge tag 'ti-v2021.04-rc4' of https://source.denx.de/u-boot/custodians/u-boot-ti
- Fix boot for da850-evm and omap3_logic
- Optimize SPL size for am65x boards
2021-03-15 08:43:29 -04:00
Tom Rini
e8a10a02bd - Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver
- stm32mp1_trusted_defconfig rely on SCMI support
 - Remove the nand MTD configuration for NOR boot in stm32mp1 board
 - STM32programmer update
 - Bsec: manage clock when present in device tree
 - stm32mp15: move bootdelay configuration in defconfig
 - Update for stm32 dsi and dw_mipi_dsi
 - STM32 MCU's cleanup
 - Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags
 - Update stm32mp1 doc
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Merge tag 'u-boot-stm32-20210312' of https://source.denx.de/u-boot/custodians/u-boot-stm

- Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver
- stm32mp1_trusted_defconfig rely on SCMI support
- Remove the nand MTD configuration for NOR boot in stm32mp1 board
- STM32programmer update
- Bsec: manage clock when present in device tree
- stm32mp15: move bootdelay configuration in defconfig
- Update for stm32 dsi and dw_mipi_dsi
- STM32 MCU's cleanup
- Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags
- Update stm32mp1 doc
2021-03-15 08:43:19 -04:00
Lokesh Vutla
003d10ba64 include: configs: am65x_evm: Optimize size of SPL BSS
Current BSS allocation of SPL is as below:
$ size spl/u-boot-spl
   text	   data	    bss	    dec	    hex	filename
 132369	   7852	   1496	 141717	  22995	spl/u-boot-spl

But 20KB is allocated currently for BSS. Reduce it to 3KB and save some
space for stack.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-03-15 12:13:44 +05:30
Adam Ford
a69c48959b ARM: da850-evm: Fix boot issues from missing SPL_PAD_TO
In a previous attempt to unify config options and remove items
from the whitelist file, SPL items were moved into a section
enabled with CONFIG_SPL_BUILD.  Unfortunately, SPL_PAD_TO
is referenced at the head Makefile and uses this define
to create padding of the output file.  When it was moved
to CONFIG_SPL_BUILD, it caused boot errors with devices
that are not booting from NOR.  Fix the boot issues by moving
SPL_PAD_TO out so it's always.

Fixes: 7bb33e4684 ("ARM: da850-evm: Unify config options with Kconfig")
Signed-off-by: Adam Ford <aford173@gmail.com>
2021-03-15 11:11:20 +05:30
Jorge Ramirez-Ortiz
166363f2ed common: SCP03 control (enable and provision of keys)
This Trusted Application allows enabling SCP03 as well as provisioning
the keys on TEE controlled secure element (ie, NXP SE050).

All the information flowing on buses (ie I2C) between the processor
and the secure element must be encrypted. Secure elements are
pre-provisioned with a set of keys known to the user so that the
secure channel protocol (encryption) can be enforced on the first
boot. This situation is however unsafe since the keys are publically
available.

For example, in the case of the NXP SE050, these keys would be
available in the OP-TEE source tree [2] and of course in the
documentation corresponding to the part.

To address that, users are required to rotate/provision those keys
(ie, generate new keys and write them in the secure element's
persistent memory).

For information on SCP03, check the Global Platform HomePage and
google for that term [1]
[1] globalplatform.org
[2] https://github.com/OP-TEE/optee_os/
    check:
    core/drivers/crypto/se050/adaptors/utils/scp_config.c

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-13 13:14:52 -05:00
Simon Glass
7bd06587de log: Add return-checking macros for 0 being success
The existing log_ret() and log_msg_ret() macros consider an error to be
less than zero. But some function may return a positive number to indicate
a different kind of failure. Add macros to check for that also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 17:41:35 -05:00
Simon Glass
9ad7a6c25c log: Handle line continuation
When multiple log() calls are used which don't end in newline, the
log prefix is prepended multiple times in the same line. This makes the
output look strange.

Fix this by detecting when the previous log record did not end in newline.
In that case, setting a flag.

Drop the unused BUFFSIZE in the test while we are here.

As an example implementation, update log_console to check the flag and
produce the expected output.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 17:41:35 -05:00
Simon Glass
79d5983b61 log: Set up a flag byte for log records
At present only a single flag (force_debug) is used in log records. Before
adding more, convert this into a bitfield, so more can be added without
using more space.

To avoid expanding the log_record struct itself (which some drivers may
wish to store in memory) reduce the line-number field to 16 bits. This
provides for up to 64K lines which should be enough for anyone.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 17:41:35 -05:00
Simon Glass
2e059e4a6e spl: test: Add a test for spl_load_simple_fit()
As an example of an SPL test, add a new test for loading a FIT within
SPL. This runs on sandbox_spl. For this to work, the text base is adjusted
so that there is plenty of space available.

While we are here, document struct spl_load_info properly, since this is
currently ambiguous.

This test only verifies the logic path. It does not actually check that
the image is loaded correctly. It is not possible for sandbox's SPL to
actually run u-boot.img since it currently includes u-boot.bin rather than
u-boot. Further work could expand the test in that direction.

The need for this was noted at:

   http://patchwork.ozlabs.org/project/uboot/patch/20201216000944.2832585-3-mr.nuke.me@gmail.com/

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:31 -05:00
Simon Glass
01ad9f75c5 sandbox: Update os_find_u_boot() to find the .img file
At present this function can only locate the u-boot ELF file. For SPL it
is handy to be able to locate u-boot.img since this is what would normally
be loaded by SPL.

Add another argument to allow this to be selected.

While we are here, update the function to load SPL when running in TPL,
since that is the next stage.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:31 -05:00
Simon Glass
8482356f48 test: Allow SPL to run any available test
At present SPL only runs driver model tests. Update it to run all
available tests, i.e. in any test suite.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:31 -05:00
Simon Glass
2a2814d5f2 test: Rename all linker lists to have a ut_ prefix
At present each test suite has its own portion of the linker_list section
of the image, but other lists are interspersed. This makes it hard to
enumerate all the available tests without knowing the suites that each one
is in.

Place all tests together in a single contiguous list by giving them
common prefix not used elsewhere in U-Boot. This makes it possible to find
the start and end of all tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:30 -05:00
Simon Glass
a7a98755b8 test: Add a macros for finding tests in linker_lists
At present we use the linker list directly. This is not very friendly, so
add a helpful macro instead. This will also allow us to change the naming
later without updating this code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:30 -05:00
Simon Glass
f97f85e661 test: Run driver-model tests using ut_run_list()
Use this function instead of implementing it separately for driver model.

Make ut_run_tests() private since it is only used in test-main.c

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:30 -05:00
Simon Glass
fe806861a9 test: Use a local variable for test state
At present we use a global test state for all driver-model tests. Make use
of a local struct like we do with the other tests.

To make this work, add functions to get and set this state. When a test
starts, the state is set (so it can be used in the test). When a test
finishes, the state is unset, so it cannot be used by mistake.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:30 -05:00
Simon Glass
d2281bb09b test: Add ut_run_test_live_flat() to run tests twice
Driver model tests are generally run twice, once with livetree enable and
again with it disabled. Add a function to handle this and call it from the
driver model test runner.

Make ut_run_test() private since it is not used outside test-main.c now.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:30 -05:00
Simon Glass
ca44ca0556 test: Use ut_run_test() to run driver model tests
Instead of having a separate function for running driver model tests, use
the common one. Make the pre/post-run functions private since we don't
need these outside of test-main.c

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:30 -05:00
Simon Glass
99a88fe1bd test: Move test running into a separate function
Add a function to handle the preparation for running a test and the
post-test clean-up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:30 -05:00
Simon Glass
c79705ea93 test: Move dm_test_init() into test-main.c
Move this function into test-main so that all the init is in one place.
Rename it so that its purpose is clearer.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:30 -05:00
Simon Glass
4a467c6de6 test: Drop struct dm_test_state
Driver model is a core part of U-Boot. We don't really need to have a
separate test structure for the driver model tests and it makes it harder
to write a test if you have to think about which type of test it is.

Subsume the fields from struct dm_test_state into struct unit_test_state
and delete the former.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:30 -05:00
Simon Glass
72b524cf42 test: Handle driver model reinit in test_pre_run()
For driver model tests we want to reinit the data structures so that
everything is in a known state before the test runs. This avoids one test
changing something that breaks a subsequent tests.

Move the call for this into test_pre_run().

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:30 -05:00
Simon Glass
47ec3ede4e test: Move delay skipping to test_pre_run()
This allows delays to be skipped in sandbox tests. Move it to the
common pre-init function.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:30 -05:00
Simon Glass
30a0d2064d test: Call test_pre/post_run() from driver model tests
Ultimately we want to get rid of the special driver model test init and
use test_pre_run() and test_post_run() for all tests. As a first step,
use those function to handle console recording.

For now we need a special case for setting uts->start, but that wil go
away once all init is in one place.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:29 -05:00
Simon Glass
d002a27644 test: Create pre/post-run functions
Split out the test preparation into a separation function before
expanding it. Add a post-run function as well, currently empty.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:29 -05:00
Simon Glass
1c7217511c test: Add an overall test runner
Add a new test runner that will eventually be able to run any test. For
now, have it run the 'command' unit tests, so that the functionality in
cmd_ut_category() moves into it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:29 -05:00
Simon Glass
409f4a2a72 test: Rename test-main.c to test-dm.c
This is the main test function for driver model but not for other tests.
Rename the file and the function so this is clear.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:29 -05:00
Simon Glass
4bc639ee11 test: Mark all driver model tests with a flag
Add a flag for driver model tests, so we can do special processing for
them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12 09:57:29 -05:00
Patrick Delaunay
e9470fcd27 configs: stm32mp15: move bootdelay configuration in defconfig
The STM32MP15 boards have no reason to configure bootdelay in stm32mp1.h
as it is already done with CONFIG_BOOTDELAY (default = 2) and in
include/env_default.h.

This patch allows configuration for customers which reuse stm32mp1.h
and reduce the size of the default environment.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-03-11 17:54:39 +01:00
Tom Rini
472c5484bc - button: adc: fix treshold typo
- configs: meson64: add fdtoverlay_addr_r
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Merge tag 'u-boot-amlogic-20210308' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- button: adc: fix treshold typo
- configs: meson64: add fdtoverlay_addr_r
2021-03-08 07:41:50 -05:00
Tom Rini
b0a75dda7e Merge branch 'v2021.04-rc4' of https://github.com/lftan/u-boot
- Add VAB support
2021-03-08 07:41:40 -05:00
Neil Armstrong
266637db88 configs: meson64: add fdtoverlay_addr_r
In order to support loading FTD Overlays when booting with the pxe
command (or extlinux.conf), supported with [1], add the missing
fdtoverlay_addr_r used to load the overlay before applying it to
the FDT loaded at fdt_addr_r.

[1] https://patchwork.ozlabs.org/project/uboot/patch/20210120085453.2783678-1-narmstrong@baylibre.com/

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-03-08 10:32:35 +01:00
Dalon Westergreen
9773ebcfbc Makefile: socfpga: Add target to generate hex output for combined spl and dtb
Add target to Makefile to generate "u-boot-spl-dtb.hex" for Intel
SOCFPGA SOC64 devices (Stratix 10 and Agilex). "u-boot-spl-dtb.hex"
is hex formatted spl with and offset of CONFIG_SPL_TEXT_BASE. It
combines the spl image and dtb. "u-boot-spl-dtb.hex" is needed to
generate the final configuration bitstream for Intel SOCFPGA SOC64
devices.

Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-03-08 10:59:12 +08:00
Siew Chin Lim
6bf1249a92 configs: socfpga: soc64: Move CONFIG_BOOTCOMMAND to defconfig
CONFIG_BOOTCOMMAND have been moved to Kconfig.boot. This patch
move the CONFIG_BOOTCOMMAND macro from socfpga_soc64_common.h to
*_defconfig file for both Stratix 10 and Agilex.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-03-08 10:59:11 +08:00
Heinrich Schuchardt
e91789e2f6 lib/charset: UTF-8 stream conversion
Provide functions to convert an UTF-8 stream to code page 437 or UTF-32.

Add unit tests.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-07 17:37:13 +01:00
Heinrich Schuchardt
73bb90cabc efi_loader: carve out utf_to_cp()
Carve out a function to translate a Unicode code point to an 8bit codepage.

Provide a unit test for the new function.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-07 17:37:13 +01:00
Heinrich Schuchardt
70616a1ed8 efi_loader: move codepage 437 table
Move the Unicode to codepage 437 table to charset.c

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-07 17:37:12 +01:00
Bin Meng
b516dd5af7 ppc: qemu: Drop a custom env variable 'fdt_addr_r'
Now that we have switched to CONFIG_OF_CONTROL, and we can use the
env variable 'fdtcontroladdr' directly instead of creating one that
is duplicated.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05 10:25:44 +05:30
Bin Meng
9a39f76c7a ppc: qemu: Enable RTC support via I2C
The QEMU ppce500 target integrates a Freescale I2C controller and
has a Pericom pt7c4338 RTC connected to it. Enable corresponding
DM drivers so that 'date' command is actually useful.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05 10:25:43 +05:30
Bin Meng
8ee401670a ppc: qemu: Switch over to use DM ETH and PCI
At present the board supports non-DM version PCI and E1000 drivers.
Switch over to use DM ETH and PCI by:

- Rewrite the PCI address map functions using DM APIs
- Enable CONFIG_MISC_INIT_R to do the PCI initialization and
  address map
- Drop unnecessary ad-hoc config macros
- Remove board_eth_init() in the board codes

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05 10:25:43 +05:30
Bin Meng
2e91e8b332 ppc: qemu: Switch over to use DM serial
The QEMU ppce500 target integrates 2 NS16550 serial ports. Switch
over to use the DM version of the driver by:

- drop unnecessary ad-hoc config macros
- add get_serial_clock() in the board codes

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05 10:25:43 +05:30
Bin Meng
ea309212fe test: cmd: Add a basic test for 'addrmap' command
This adds a basic test for the newly introduced 'addrmap' command.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[Rebase]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05 10:25:43 +05:30
Bin Meng
b561563316 lib: addr_map: Move address_map[] type to the header file
At present address_map[] is static and its type is unknown to external
modules. In preparation to create a command to list its contents, this
patch moves its type definition and declaration to the header file.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05 10:25:43 +05:30
Bin Meng
c40131acc0 include: Remove extern from addr_map.h
Remove the extern of the header because they are useless.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05 10:25:42 +05:30