Commit Graph

13303 Commits

Author SHA1 Message Date
Andrew F. Davis
5fbed8f2c6 ARM: Kconfig: Move TI_SECURE_DEVICE to a common area
TI_SECURE_DEVICE is used by both OMAP2+ and Keystone2 family devices,
and so when ARCH_OMAP2PLUS was used to gate off the OMAP2+ Kconfig
Keystone2 family devices lost this config option.

Move this option out of mach-omap2 Kconfig to a spot accessible by both
families. We picked arch/arm/Kconfig over the TI specific board/ti/
location as this option is not specific to our boards but rather our
architecture.

Plus at some point this option can be changed to just
SECURE_DEVICE, as having secure parts is not exclusive to TI and
so other vendors can interpret this option as needed by their device
configurations.

Fixes: a93fbf4a78 ("ARM: omap2+: rename config to ARCH_OMAP2PLUS and consolidate Kconfig")
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-02-23 10:21:41 -05:00
Max Filippov
10117a2985 xtensa: clean up CONFIG_SYS_TEXT_ADDR
Drop CONFIG_SYS_MEMORY_TOP. Rename CONFIG_SYS_TEXT_ADDR to
XTENSA_SYS_TEXT_ADDR.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-02-23 10:21:41 -05:00
Tom Rini
7b1cfec317 Merge git://git.denx.de/u-boot-mmc 2018-02-19 23:01:05 -05:00
Tom Rini
d884c58f0c Merge git://git.denx.de/u-boot-dm 2018-02-19 11:39:39 -05:00
Jean-Jacques Hiblot
e74adafb04 dts: am57xx-idk: disable HS200 support
HS200 cannot be supported on mmc2, because the IO lines of mmc2 are
connected to 3.3v.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
4db25fe7fa dts: am57xx-beagle-x15: disable UHS and HS200 support
The UHS modes are not supported in beagle-x15 because it's not possible to
switch the IO lines supply voltage to 1.8v.
Also HS200 cannot be supported on mmc2, because the IO lines of mmc2 are
connected to 3.3v.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
2adee41db9 ARM: dts: dra7: Add supported MMC/SD modes in MMC dt nodes
On DRA7 family SoCs, MMC1 controller supports SDR104,
SDR50, DDR50, SDR25 and SDR12 UHS modes.

MMC2 controller supports HS200 and DDR modes.

MMC3 controller supports SDR12, SDR25 and SDR50 modes.

MMC4 controller supports SDR12 and SDR25 modes.

Add these supported modes in device-tree file.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
6ba41e5dc3 ARM: dts: DRA7: use new dra7-specific compatible string
Use the new compatible string "ti,dra7-hsmmc" that was specifically
added for dra7 and dra72. This is required since for dra7 and dra72
processors iodelay values has to be set unlike other processors.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
2022270c7d ARM: OMAP5: set mmc clock frequency to 192MHz
Now that omap_hsmmc has support for hs200 mode, change the clock
frequency to 192MHz. Also change the REFERENCE CLOCK frequency to
192MHz based on which the internal mmc clock divider is calculated.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
04f9f8be83 mmc: omap_hsmmc: add signal voltage selection support
I/O data lines of UHS SD card operates at 1.8V when in UHS speed
mode (same is true for eMMC in DDR and HS200 modes). Add support
to switch signal voltage to 1.8V in order to support
UHS cards and eMMC HS200 and DDR modes.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
2d28eeda33 mmc: omap_hsmmc: Add support to get pinctrl values and max frequency for different hw revisions
AM572x SR1.1 requires different IODelay values to be used than that used
in AM572x SR2.0. These values are populated in device tree. Add
capability in omap_hsmmc driver to extract IOdelay values for different
silicon revision. The maximum frequency is also reduced when using a ES1.1.
To keep the ability to boot both revsions with the same dtb, those values
can be provided by the platform code.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
6a27333ba3 ARM: OMAP5/DRA7: Enable iodelay recalibration to be done from uboot
Add a new API to perform iodelay recalibration without isolate
io to be used in uboot.

The data manual of J6/J6 Eco recommends to set different IODELAY values
depending on the mode in which the MMC/SD is enumerated in order to
ensure IO timings are met. The MMC driver can use the new API to
set the IO delay values depending on the MMC mode.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
2faa1a302b mmc: omap_hsmmc: Workaround for errata id i802
According to errata i802, DCRC error interrupts
(MMCHS_STAT[21] DCRC=0x1) can occur during the tuning procedure.

The DCRC interrupt, occurs when the last tuning block fails
(the last ratio tested). The delay from CRC check until the
interrupt is asserted is bigger than the delay until assertion
of the tuning end flag. Assertion of tuning end flag is what
masks the interrupts. Because of this race, an erroneous DCRC
interrupt occurs.

The suggested  workaround is to disable DCRC interrupts during
the tuning procedure which is implemented here.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
14761caeee mmc: omap_hsmmc: Add tuning support
HS200/SDR104 requires tuning command to be sent to the card. Use
the mmc_send_tuning library function to send the tuning
command and configure the internal DLL.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Kishon Vijay Abraham I
9b3fc21837 mmc: omap_hsmmc: Enable DDR mode support
In order to enable DDR mode, Dual Data Rate mode bit has to be set in
MMCHS_CON register. Set it here.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
8fc238bfad mmc: omap_hsmmc: set MMC mode in the UHSMS bit field
Use the timing parameter set in the MMC core to set the
mode in UHSMS  bit field. This is in preparation for
adding HS200 support in omap hsmmc driver.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Kishon Vijay Abraham I
b594481709 mmc: omap_hsmmc: add support to set default io voltage
"ti,dual-volt" is used in linux kernel to set the voltage capabilities.
For host controller dt nodes that doesn't have "ti,dual-volt",
it's assumed 1.8v is the io voltage. This is not always true (like in
the case of beagle-x15 where the io lines are connected to 3.3v).
Hence if "no-1-8-v" property is set, io voltage will be set to 3v.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
5baf543e52 mmc: omap_hsmmc: cleanup clock configuration
Add a separate function for starting the clock, stopping the clock and
setting the clock. Starting the clock and stopping the clock can
be used irrespective of setting the clock (For example during iodelay
recalibration).
Also set the clock only if there is a change in frequency.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Mario Six
c6b89f3180 sandbox: Add 64-bit sandbox
To debug device tree issues involving 32- and 64-bit platforms, it is useful to
have a generic 64-bit platform available.

Add a version of the sandbox that uses 64-bit integers for its physical
addresses as well as a modified device tree.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-18 15:53:48 -07:00
Simon Glass
995b60b593 sandbox: Rename 'num-gpios' property to avoid dtc warning
At present dtc produces these warnings when compiling sandbox:

arch/sandbox/dts/test.dtb: Warning (gpios_property):
	Could not get phandle node for /base-gpios:num-gpios(cell 0)
arch/sandbox/dts/test.dtb: Warning (gpios_property):
	Missing property '#gpio-cells' in node /reset-ctl or bad phandle
	(referred from /extra-gpios:num-gpios[0])

Both are due to it assuming that the 'num-gpios' property holds a phandle
pointing to a GPIO node.

To avoid these warnings, rename the sandbox property so that it does not
include the string 'gpios'.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-18 15:53:32 -07:00
Simon Glass
7e87816caa sandbox: Correct dtc warning in /chosen node
At present dtc produces these warnings when compiling sandbox:

arch/sandbox/dts/test.dtb: Warning (reg_format): "reg" property in /chosen/chosen-test has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1)
arch/sandbox/dts/test.dtb: Warning (avoid_default_addr_size): Relying on default #address-cells value for /chosen/chosen-test
arch/sandbox/dts/test.dtb: Warning (avoid_default_addr_size): Relying on default #size-cells value for /chosen/chosen-test

Add the missing properties to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: f200680 (dm: core: parse chosen node)
2018-02-18 12:53:38 -07:00
Alexey Brodkin
4280342adb fdt: Implement weak arch_fixup_fdt()
Only ARM and in some configs MIPS really implement arch_fixup_fdt().
Others just use the same boilerplate which is not good by itself,
but what's worse if we try to build with disabled CONFIG_CMD_BOOTM
and enabled CONFIG_OF_LIBFDT we'll hit an unknown symbol which was
apparently implemented in arch/xxx/lib/bootm.c.

Now with weak arch_fixup_fdt() right in image-fdt.c where it is
used we get both items highlighted above fixed.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-02-18 12:53:38 -07:00
Marek Vasut
88306dbb5a ARM: dts: rmobile: Enable I2C6 on Porter
Enable I2C6 bus on Porter to access the PMIC , ie. to reset the board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 21:59:22 +01:00
Marek Vasut
8a41f68870 ARM: dts: rmobile: Move the u-boot,dm-pre-reloc into u-boot DTS on porter
Fix ommission where the u-boot,dm-pre-reloc DT bit was pulled into the
common DT, not the U-Boot specific DT part. Move it to U-Boot DT part.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 21:59:20 +01:00
Tom Rini
bd650cd404 Merge git://git.denx.de/u-boot-sh 2018-02-16 13:56:02 -05:00
Tom Rini
7961b9f6db Merge git://git.denx.de/u-boot-socfpga 2018-02-16 13:55:51 -05:00
Marek Vasut
7ee37d0e0c ARM: rmobile: Convert Porter to SPL
Due to size limitations of the MERAM, switch U-Boot to SPL.
The SPL is loaded by the SPI_LOADER into MERAM and then loads
U-Boot proper into DRAM. This way U-Boot can freely grow in
size in DRAM, as there is plenty of it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
NOTE: To update U-Boot, first install u-boot.img to 0x140000 in SPI NOR,
      then use the Minimon to flash u-boot-spl.srec using ls,2,e6304000.
      To generate u-boot-spl.srec, use objcopy:
        arm-linux-gnueabi-objcopy -O srec spl/u-boot-spl u-boot-spl.srec
2018-02-16 16:43:11 +01:00
Marek Vasut
8a8d300005 ARM: dts: rmobile: Make PFC and RST available before reloc
Those two nodes are needed to configure pinmux before relocation
and to configure clock before relocation, since CPG/MSSR needs
access to RST node. This is not noticable on Gen3, but on Gen2
this causes problems in SPL if they are not available early.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:11 +01:00
Marek Vasut
ccb947f2ce ARM: dts: rmobile: Make scif0 available before reloc on Porter
Make the SCIF available before relocation and in SPL on R8A7791 Porter.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:11 +01:00
Simon Goldschmidt
fef4a545b6 arm: socfpga: use imply instead of select where applicable
Kconfig should only 'select' features that are required for an arch.
Standard features that can be disabled without breaking board support
should use 'imply' instead, to allow users to disable it.

These options are changed for mach-socfpga:
- DM_SPI & DM_SPI_FLASH: only required with QSPI support enabled
- SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION: the boot rom supports a
  partitionless mode also, where SPL is located at address 0
- HW_WATCHDOG: while all mainline board defconfigs use it, U-Boot
  should still work without it.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-15 13:45:16 +01:00
Lukasz Majewski
21a9f435f3 Convert socfpga: select CONFIG_HW_WATCHDOG support for ARCH_SOCFPGA
All Socfpga boards from ./include/configs/socfpga_* define
CONFIG_HW_WATCHDOG.
To ease CONFIG_HW_WATCHDOG conversion to Kconfig select it in
config ARCH_SOCFPGA (arch/arm/Kconfig) section.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-15 13:45:16 +01:00
Simon Goldschmidt
a6fbf94550 arm: socfpga: fix qspi flash compatible (add "spi-flash")
This patch adds "spi-flash" to the compatible list of the qspi flash
chip for all socfpga boards. This is required to make qspi work on
these boards on top of the recent fixes. Without the "spi-flash"
compatible string for the flash chip, the speed cannot be read and a
speed of 0Hz is used (which results in a divide-by-zero on these
boards).

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-15 13:45:15 +01:00
Alexey Brodkin
d53b128df4 arc: Fix final linkage with Elf32 tools
ARC Elf32 tools by default enable usage of so-called "small data"
section or in ARC PRM parlance "GP-relative addressing".

The idea is to put up to 2kB of frequently used data into a separate
location and use indirect addressing via dedicated core register (GP).
Where GP is used as a base for offset calculation.

And so if "-msdata" toggle is passed to the compiler either explicitly
or implicitly (that's Elf32 tools case) it will try to put some data
in that "small data" area and then to calculate real offset from GP
to be encoded in instructions we need to know the base value which
liker gets from __SDATA_BEGIN__ symbol in hte linker script.

In U-Boot we don't use that feature and linker script doesn't define
__SDATA_BEGIN__ which gives us the following linkage error if we use
Elf32 tools:
------------------------->8-------------------
  LD      u-boot
.../bin/arc-elf32-ld.bfd: Error: Linker symbol __SDATA_BEGIN__ not found
.../bin/arc-elf32-ld.bfd: final link failed: Bad value
------------------------->8-------------------

Note if uClibc or glibc tools are used that problem doesn't happen
because usage of "small data section" is disabled by default as not very
useful for bigger executables. Moreover GP is just another name of r26
so we're loosing 1 core register which is not used by the compiler as a
generic register with "-msdata".

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-02-15 15:44:47 +03:00
Andre Heider
678382c73a arm/PSCI: support PSCI versions greater than 1.0
ATF recently began announcing PSCI v1.1. Since that version is unknown
to u-boot, the PSCI device nodes were not updated.

Switch from the case statement to a greater/less-than comparison so that
v1.1, as well as future versions, get at least the compatible nodes of
known versions.

PSCI v1.1 doesn't seem to have introduced a new corresponding compatible.

Signed-off-by: Andre Heider <a.heider@gmail.com>
2018-02-14 12:14:15 -05:00
Simon Goldschmidt
7d531e8a4f arm: update Kconfig help for ENABLE_ARM_SOC_BOOT0_HOOK
When this config is enabled, <asm/arch/boot0.h> is included,
but the Kconfig help says this should be a define
(ARM_SOC_BOOT0_HOOK).

The code for this in arch/arm/lib/vectors.s was changed on
01/02/2017 with commit ce62e57fc5 ("ARM: boot0 hook: remove macro,
include whole header file").

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-13 23:24:22 -05:00
Masahiro Yamada
6becd9de6b ARM: image: indent with tab instead of 4 spaces
Commit 6808ef9ac2 ("move booti_setup to arch/arm/lig/image.c")
not only moved the code, but also replaced a tab with 4 spaces
to break the Linux coding style.

Restore tab indentation.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Chen <bin.chen@linaro.org>
2018-02-13 23:24:22 -05:00
Simon Goldschmidt
9095d5b894 fix spelling of 'functions' in 2 places (was 'funtcions')
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-13 23:24:22 -05:00
Tom Rini
34a5c4257a SystemACE: Remove
This driver is no longer used on any supported platform in U-Boot and
there is no interest in maintaining it further from people that have
used it historically.

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
c: Alexey Brodkin <alexey.brodkin@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2018-02-13 23:24:22 -05:00
Tuomas Tynkkynen
4a942f49b8 spi: Migrate CONFIG_KIRKWOOD_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:01:44 -05:00
Bin Meng
244ce78a04 microblaze: bootm: Fix compiler warning
Fix build warning in arch/microblaze/lib/bootm.c with gcc 7.3.0:

  warning: this 'if' clause does not guard... [-Wmisleading-indentation]

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2018-02-13 20:34:07 -05:00
Bin Meng
d679a529a4 arm: omap2: Fix compiler warning
Fix build warning in arch/arm/mach-omap2/emif-common.c and
arch/arm/mach-omap2/omap4/emif.c with gcc 7.3.0:

  warning: duplicate 'const' declaration specifier [-Wduplicate-decl-specifier]

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-13 20:34:07 -05:00
Tom Rini
f3177d02f3 Merge git://git.denx.de/u-boot-fsl-qoriq 2018-02-12 12:08:32 -05:00
Tom Rini
278b90ce78 configs: Migrate CONFIG_SYS_TEXT_BASE
On the NIOS2 and Xtensa architectures, we do not have
CONFIG_SYS_TEXT_BASE set.  This is a strict migration of the current
values into the defconfig and removing them from the headers.

I did not attempt to add more default values in and for now will leave
that to maintainers.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-11 09:30:09 -05:00
Heinrich Schuchardt
268ec6e00e efi_loader: fix building crt0 on arm
Before the patch an undefined constant EFI_SUBSYSTEM was used in the
crt0 code. The current version of binutils does not swallow the error.

https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=888403

The necessary constant IMAGE_SUBSYSTEM_EFI_APPLICATION is already
defined in pe.h. So let's factor out asm-generic/pe.h for the
image subsystem constants and use it in our assembler code.

IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER does not exist in the specification
let's use IMAGE_SUBSYSTEM_EFI_ROM instead.

The include pe.h is only used in code maintained by Alex so let him be the
maintainer here too.

Reported-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-10 00:24:00 +01:00
Zhao Qiang
990d06b0bc PowerPC: phy: enable all phylib drivers when use phylib and tsec enet
config_phylib_all_drivers.h should be included when CONFIG_PHYLIB and
CONFIG_TSEC_ENET are defined.

Fixes: 3146f0c017 ("Move PHYLIB to Kconfig")
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-02-09 08:35:59 -08:00
Sriram Dash
30cf7f818d armv8: Remove dependency of SERDES for LSCH2 and LSCH3
Remove dependency of SYS_HAS_SERDES for Layerscape Chasis 2 and
Layerscape Chasis 3.

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-02-09 08:33:21 -08:00
Adam Ford
1811a928c6 Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig
config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options.  Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-08 19:09:03 -05:00
Stefan Agner
ac4605ae64 spl: use ARCH_MX23/28 to specify SPL_LDSCRIPT
Simplify SPL_LDSCRIPT config by using the new arch Kconfig
configurations ARCH_MX23 and ARCH_MX28.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-02-08 10:17:17 -05:00
Stefan Agner
25c5b4e1bf arm: imx: mx28: Move MX28 selection to Kconfig
The motivation for moving MX28 selection to Kconfig is to be able
to better handle NAND MXS selection through Kconfig.

This selection method also aligns with the way other i.MX SoCs are
selected in U-Boot.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-02-08 10:17:17 -05:00
Stefan Agner
c5343d4e11 arm: imx: mx23: Move MX23 selection to Kconfig
The motivation for moving MX23 selection to Kconfig is to be able
to better handle NAND MXS selection through Kconfig.

This selection method also aligns with the way other i.MX SoCs are
selected in U-Boot.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-02-08 10:17:16 -05:00