Add new Toradex MAC OUI (8c:06:cb), to the config block. With this change
we extend the possible serial-numbers as follows:
For serial-numbers 00000000-16777215 OUI 00:14:2d is taken
For serial-numbers 16777216-33554431 OUI 8c:06:cb is taken
Lower 24-bit of the serial number are used in the NIC part of the
MAC address, the complete serial number can be calculated using the OUI.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Do 1 byte address checks first prior to doing 2 byte address checks.
When performing 2 byte addressing on 1 byte addressing eeprom, the
second byte is taken in as a write operation and ends up erasing the
eeprom region we want to preserve.
While we could have theoretically handled this by ensuring the write
protect of the eeproms are properly managed, this is not true in case
where board are updated with 1 byte eeproms to handle supply status.
Flipping the checks by checking for 1 byte addressing prior to 2 byte
addressing check prevents this problem at the minor cost of additional
overhead for boards with 2 byte addressing eeproms.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Due to supply chain issues, we are starting to see a mixture of eeprom
usage including the smaller 7-bit addressing eeproms such as 24c04
used for eeproms.
These eeproms don't respond well to 2 byte addressing and fail the
read operation. We do have a check to ensure that we are reading the
alternate addressing size, however the valid failure prevents us
from checking at 1 byte anymore.
Rectify the same by falling through and depend on header data comparison
to ensure that we have valid data.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The eeprom data area is much bigger than the data we intend to store,
however, with bad programming, we might end up reading bad records over
and over till we run out of eeprom space. instead just exit when 10
consecutive records are read.
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Call into k3-ddrss driver to fixup device tree and resize
the available amount of DDR if ECC is enabled.
A second fixup is required from A53 SPL to take the fixup
as done from R5 SPL and apply it to DT passed to A53 U-boot,
which in turn passes this to the OS.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Use the appropriate fdtdec_setup_mem_size_base() call in
dram_init() and fdtdec_setup_bank_size() in dram_bank_init()
to pull these values from DT, where they are already available,
instead of hardcoding them.
Signed-off-by: Georgi Vlaev <g-vlaev@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
There are two decimal digits reserved to encode the module version and
revision. This code so far implemented A-Z which used 0-25 of this
range.
This commit extends the range to make use of all 99 numbers. After
capital letters the form with a hashtag and number (e.g. #26) is used.
Examples:
If the assembly version is between zero and 25 the numbering is as follows,
as it also has been before this commit:
0: V0.0A
1: V0.0B
...
25: V0.0Z
New numbering of assembly version:
If the number is between 26 and 99 the new assembly version name is:
26: V0.0#26
27: V0.0#27
...
99: V0.0#99
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
With those defines the length can be reused and is in one place
extendable.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Prevent memory issues that could appear with sprintf. Replace all
sprintf occurences with snprintf.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
While configuring SerDes, errors could be encountered, in these cases,
return instead of going ahead. This is will help in booting even if
configuration of SerDes fails.
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
These CONFIG options are only used on this board, in the board file
itself. Remove these from the CONFIG namespace and define in the board
file.
Signed-off-by: Tom Rini <trini@konsulko.com>
The symbol CONFIG_PCI_CLK_FREQ is local to this board. Provide equal
clarity in the code by referencing the numeric value directly and move
the explanatory comment to the code, just prior to use.
Signed-off-by: Tom Rini <trini@konsulko.com>
As things stand currently, there is only one PowerPC platform that
enables the options for CHAIN_OF_TRUST. From the board header files,
remove a number of never-set options. Remove board specific values from
arch/powerpc/include/asm/fsl_secure_boot.h as well. Rework
include/config_fsl_chain_trust.h to not abuse the CONFIG namespace for
constructing CHAIN_BOOT_CMD. Migrate all of the configurable addresses
to Kconfig.
If any platforms are re-introduced with secure boot support, everything
required should still be here, but now in Kconfig, or requires migration
of an option to Kconfig.
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Move setting of SPL_UBOOT_KEY_HASH to a non-NULL value to Kconfig. As
part of this, change fsl_secboot_validate(...) to check that it is
passed a non-empty string, rather than non-NULL.
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Kshitiz Varshney <kshitiz.varshney@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Make all of the CHAIN_OF_TRUST options be under a single menu and add a
comment for the rest, so the resulting config file reads more clearly.
Remove duplicate CHAIN_OF_TRUST options from
board/congatec/common/Kconfig. Remove duplicate NXP_ESBC config
questions and move to arch/Kconfig.nxp.
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that board/freescale/common/Kconfig is safe to be included once,
globally, rename this to arch/Kconfig.nxp to better reflect that it
contains options that are valid on multiple architectures and SoC
families, and not specific to NXP reference platforms either.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The way that we use this file currently means that we have to guard it
in every platform Kconfig. But it is also required in all NXP
platforms, including non-reference platforms. Make all options in it
have appropriate dependencies so that we can include it a single time
under arch/Kconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
We rename the S5P specific "CONFIG_PWM" to CONFIG_PWM_S5P and move it to
Kconfig. Given the usage of CONFIG_PWM_NX, we have that select this new
symbol.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
From whole P1/P2 family of RDB boards is TDM-PMC card (PCI Mezzanine Card,
Freescale PQ-MDS-T1) available only on P1021RDB and P1025RDB boards.
So address mapping for TDM-PMC card on LBC should not be enabled on any
other P1/P2 RDB board as there is no device at that TDM-PMC address.
Support for P1021RDB and P1025RDB boards was already removed from mainline
U-Boot in commits 6d1dd76afe ("board/freescale: Remove P1021RDB board
support") and d521cece5a ("board/freescale: Remove P1025RDB board
support").
So do not enable TDM-PMC address mapping on remaining P1/P2 RDB boards and
remove all macros related to TDM-PMC address mappings.
Signed-off-by: Pali Rohár <pali@kernel.org>
-----BEGIN PGP SIGNATURE-----
iQFQBAABCgA6FiEEqxhEmNJ6d7ZdeFLIHrMeAg6sL8gFAmK9nEUcHGV1Z2VuLmhy
aXN0ZXZAbWljcm9jaGlwLmNvbQAKCRAesx4CDqwvyEu0B/4v1EQOMBL+VXns8Ipo
Xeq+RDUX/24XcB5s6sTcNlWzvYuX6Z7DCGJ0loK5JxelrOy+YNkRbTRMom1eW9Kn
9dmKa0bcO7auJEww3Nln1IFyx+FXQFGR1V3g1U4535l8b7urTioIK0MUSrG/GLpe
Rlbh31GAYtrGvl06W1F7mwhg7/0AT8IhUFaY9G7s7gKA5muGQQ7ED4nKVoZPeTAl
lrQ/Ecym1ND7aOhd/vuEBtgoGxDWzwf8piT8qykJluJKzBV1Hic0RXCNBmtrTORz
b1GOOpRUgcnTv9U8j4PRyYGKDnmS2OmV2AwL8+V9UJfJgQrkcRlbgpCysIPmMBzo
YPRt
=D79P
-----END PGP SIGNATURE-----
Merge tag 'u-boot-at91-2022.10-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2022.10 cycle:
This feature set includes mostly fixes and alignments: DT alignment with
Linux for sama7g5, removal of invalid eeprom compatibles, removal of
extra debug_uart_init calls for all at91 boards, support for pio4 driver
pioE bank, and other minor fixes and enhancements for sam9x60 and
sama5d2_icp boards.
Move the environment text over from being set via
CONFIG_EXTRA_ENV_SETTINGS in include/configs/gw_ventana.h and over
to plain text in board/gateworks/gw_ventana/gw_ventana.env. This lets
us drop CONFIG_EXTRA_ENV_SETTINGS_COMMON as everything resides in a
single environment file now.
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Move the environment text over from being set via
CONFIG_EXTRA_ENV_SETTINGS in include/configs/opos6uldev.h and over to
plain text in board/armadeus/opos6uldev/opos6uldev.env. This lets us
manage env_version without a CONFIG variable.
Cc: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
With the exception of distro_boot support, we can move all of the rest
of the environment changes to come from CONFIG_EXTRA_ENV_TEXT and in
turn remove CONFIG_ENV_REFLASH.
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This define is only currently used in a single board, and always set to
one. Define this within the board code and remove other references.
Signed-off-by: Tom Rini <trini@konsulko.com>
Introduce board/siemens/common/Kconfig and have it hold FACTORYSET to
start with. Use select for this on the boards that need it.
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
- In a number of cases, use CONFIG_ARCH_EXYNOS[45] rather than
CONFIG_EXYNOS[45]
- In other cases, test for CONFIG_ARCH_EXYNOS or CONFIG_ARCH_S5PC1XX
- Migrate specific SoC CONFIG values to Kconfig
- Use CONFIG_TARGET_x rather than CONFIG_x
- Migrate other CONFIG_EXYNOS_x symbols to Kconfig
- Reference CONFIG_EXYNOS_RELOCATE_CODE_BASE directly as EXYNOS_RELOCATE_CODE_BASE
- Rename CONFIG_S5P_PA_SYSRAM to CONFIG_SMP_PEN_ADDR to match the rest
of U-Boot usage.
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Since bb5930d5c9 ("exynos: video: Convert several boards to driver
model for video") there have been no callers of any of the exynos_lcd_*
family of functions. Remove these from the boards, and then remove
unused logo and related code as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
The only platform currently that defines an ide_preinit function has an
empty one that immediately returns. Remove this hook.
Signed-off-by: Tom Rini <trini@konsulko.com>
We want to keep all of the default values for SPL_LDSCRIPT in the same
place both for overall clarity as well as not polluting unrelated config
files.
Signed-off-by: Tom Rini <trini@konsulko.com>
Since 0dba45864b ("arm: Init the debug UART") ,
the debug_uart_init is now called from crt.S
It's no longer required to call it from the board file.
With the current code, the banned <debug_uart> is printed twice:
<debug_uart>
<debug_uart>
U-Boot 2022.07-rc4-00089-gee3d158fa8 (Jun 08 2022 - 17:39:29 +0300)
Remove all calls from board_early_init_f .
Suggested-by: Balamanikandan Gunasundar <Balamanikandan.Gunasundar@microchip.com>
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
cpu:
- Add driver for microblaze cpu
net:
- Add support for DM_ETH_PHY to AXI emac and emaclite
xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS
zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize
versal:
- Enable loading app at EL1
serial:
- Setup default address and clock rates for DEBUG uarts
pinctrl:
- Add support for tri state and output enable properties
relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze
microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support
timer:
- Extract axi timer driver from Microblaze to generic location
-----BEGIN PGP SIGNATURE-----
iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCYrlYngAKCRDKSWXLKUoM
ITgbAJ9S9xO2QqxtuodWAYMtJfvZ14c7mgCeKnyFTrrBnJkC0wPsGqE71oNJ49o=
=3gGm
-----END PGP SIGNATURE-----
Merge tag 'xilinx-for-v2022.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2022.10
cpu:
- Add driver for microblaze cpu
net:
- Add support for DM_ETH_PHY to AXI emac and emaclite
xilinx:
- Switch platforms to DM_ETH_PHY
- DT chagnes in ZynqMP and Zynq
- Enable support for SquashFS
zynqmp:
- Add support for KR260 boards
- Move BSS from address 0
- Move platform identification from board code to soc driver
- Improve zynqmp_psu_init_minimize
versal:
- Enable loading app at EL1
serial:
- Setup default address and clock rates for DEBUG uarts
pinctrl:
- Add support for tri state and output enable properties
relocate-rela:
- Clean relocate-rela implementation for ARM64
- Add support for Microblaze
microblaze:
- Add support for runtime relocation
- Rework cache handling (wiring, Kconfig) based on cpuinfo
- Remove interrupt support
timer:
- Extract axi timer driver from Microblaze to generic location
The set_dfu_alt_info function use the CONFIG_SYS_SPI_U_BOOT_OFFS define
to set the dfu_alt_info environment variable for qspi boot mode. Guard
the usage of CONFIG_SYS_SPI_U_BOOT_OFFS to make spi flash support
optional.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-11-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add machine identification support based on the
zynqmp_get_silicon_idcode_name function and use the soc_get_machine
function of the soc uclass to get silicon idcode name for the fpga init.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Link: https://lore.kernel.org/r/20220620163650.18756-8-stefan.herbrechtsmeier-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add helper code for PVR (Processor Version Register) data handling. It
will be used by the UCLASS_CPU driver to populate cpuinfo fields at
runtime.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Provide a static Kconfig value for the target FPGA archtitecture, as it is
done in Linux. The cpu-uclass driver will cross-check it with the value
read from PVR10 register.
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for
instruction and data caches sizes, respectively:
CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE
CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE
Also, get rid of the hardcoded value in icache_disable().
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com
Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
