Commit Graph

58960 Commits

Author SHA1 Message Date
Bartosz Golaszewski
95cffd9906 davinci: da850-evm: enable driver model for NAND
Enable the driver-model on da850-evm. We need to add a dummy nand node
to the device tree, as the real nand node is a sub-node of the aemif
device.

On linux the aemif driver populates all its child nodes, but we can't do
it in u-boot currently.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
2019-07-29 17:58:52 -04:00
Bartosz Golaszewski
f5a47554e0 davinci: omapl138-lcdk: enable driver model for NAND
Enable the driver-model on da850-lcdk. We need to add a dummy nand node
to the device tree, as the real nand node is a sub-node of the aemif
device.

On linux the aemif driver populates all its child nodes, but we can't do
it in u-boot currently.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-07-29 17:58:52 -04:00
Bartosz Golaszewski
29d8eb3345 nand: davinci: add support for driver model
Extend the davinci NAND driver to support the driver model. For now this
doesn't add any device-tree parsing due to the fact that we can't access
the actual nand node on the device-tree - it's a subnode of the aemif
device and we don't have an aemif driver on davinci at the moment.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-07-29 17:58:52 -04:00
Bartosz Golaszewski
7bf9972643 nand: davinci: make davinci_nand_init() static
This function is only used within the driver itself. No need
to export it.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-07-29 17:58:52 -04:00
Bartosz Golaszewski
3d25b33ad6 omapl138_lcdk_defconfig: don't build support for SPI
The following warning is emited when building u-boot for da850-lcdk:

===================== WARNING ======================
This board does not use CONFIG_DM_SPI. Please update
the board before v2019.04 for no dm conversion
and v2019.07 for partially dm converted drivers.
Failure to update can lead to driver/board removal
See doc/driver-model/MIGRATION.txt for more info.
====================================================
===================== WARNING ======================
This board does not use CONFIG_DM_SPI_FLASH. Please update
the board to use CONFIG_SPI_FLASH before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================

While we could fix it by selecting CONFIG_DM_SPI, there's no need to
build it at all as SPI is disabled on da850-lcdk. Remove all unneeded
options from the defconfig.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Acked-by: Heiko Schocher <hs@denx.de>
2019-07-29 17:58:52 -04:00
Bartosz Golaszewski
e31148247a i2c: remove i2c driver-model compatibility layer
There are no more users of the compatibility layer for i2c. Remove the
driver and all references to it.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Acked-by: Heiko Schocher <hs@denx.de>
2019-07-29 17:58:52 -04:00
Bartosz Golaszewski
3ec7fc45e5 sandbox: remove CONFIG_DM_I2C_COMPAT from defconfigs
There are no more "real" users of CONFIG_DM_I2C_COMPAT and we'll soon
remove it altogether. Stop building it in sandbox mode.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Acked-by: Heiko Schocher <hs@denx.de>
2019-07-29 17:58:52 -04:00
Bartosz Golaszewski
ea4cc39c9e davinci: remove CONFIG_DM_I2C_COMPAT from defconfigs
This option is no longer used on any davinci board but still selected
in defconfigs which causes the following warning:

===================== WARNING ======================
This board uses CONFIG_DM_I2C_COMPAT. Please remove
(possibly in a subsequent patch in your series)
before sending patches to the mailing list.
====================================================

Remove all references to CONFIG_DM_I2C_COMPAT from davinci.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Acked-by: Heiko Schocher <hs@denx.de>
2019-07-29 17:58:52 -04:00
Adam Ford
8dd75d3a8d ARM: da850_am18xxevm: Remove config and references
This board has been abandonded for a while.  I do not have this hardware
and nobody has appeared to notice and/or care that it's orphaned.
Since much of this code is inserted into the da850evm code base, removing
it from support will make da850evm support easier going forward.
This patch removes the da850_am18xxevm_defconfig, README references to this
board and the reference to this board from the MAINTAINERS list.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-29 17:58:47 -04:00
Tom Rini
75551c8bfc Merge branch '2019-07-26-ti-imports'
- Bring in the rest of the J271E platform
- Various OMAP3/AM3517, DA850 fixes
2019-07-27 19:50:52 -04:00
Sam Protsenko
adc097e133 env: ti: boot: Use ttyS2 instead of ttyO2
ttyO2 console enables legacy CONFIG_SERIAL_OMAP driver in kernel.
Nowadays it's preferred to use the generic CONFIG_SERIAL_8250_OMAP
driver, which being enabled via ttyS2 console. Both drivers are enabled
in multi_v7_defconfig and in omap2plus_defconfig, for compatibility
reasons. Let's switch to ttyS2 console, to be sure that standard 8250
serial driver is used.

Similar behavior can be also achieved by enabling
CONFIG_SERIAL_8250_OMAP_TTYO_FIXUP option in kernel, but it's better not
to rely on that, as it can be disabled or removed after transitional
period.

Right now on DRA7/AM57x platforms the 8250-omap driver is being probed
first, and omap-serial driver is only probed if the first one failed.
It can be seen from uart3 definition in arch/arm/boot/dts/dra7-l4.dtsi:

    compatible = "ti,dra742-uart", "ti,omap4-uart";

So the kernel already uses 8250 driver. This change basically allows
kernel developers to throw away the omap-serial driver and associated
compatibility options. Similar discussions [1,2] have started several
years ago, so it should be safe to do that now.

[1] https://patchwork.kernel.org/patch/6198471/
[2] http://processors.wiki.ti.com/index.php/Sitara_Linux_UART_-_Switching_to_8250_Driver

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Andrew F. Davis <afd@ti.com>
[trini: Update omap5_uevm]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-07-27 13:36:54 -04:00
Sam Protsenko
d2c9a9a3d7 arm: am57xx: Allow bootm to load larger kernels
linux-mainline with multi_v7_defconfig + Android configs takes more
space than regular TI Android kernel and bootm will fail to load it.
Let's increase max kernel size up to 64 MiB to make it possible to run
such kernel.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-27 13:36:54 -04:00
Adam Ford
3851f9be6b ARM: da850-evm: Remove dead/unneeded code
The DA8850-evm supports DM_I2C and boots with SPL_DM, so we can
drop some of the code which disables DM_I2C in SPL.  This
patch removes some #undef's now rendered obsolete.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-27 13:36:53 -04:00
Adam Ford
0d54e3bd47 ARM: omap3/omap35_logic: Fix broken Logic PD Torpedo booting
The SOM-LV and Torpedo boards are very similar, but something
happened growing SPL enough to break the Torpedo.  The SOM-LV
board were not doing alias sequencing during SPL and they
continue to work while something broke the Torpedo.  This
patch disables SPL_DM_SEQ_ALIAS allowing it to boot again.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-27 13:36:53 -04:00
Adam Ford
f3996aef8c ARM: dts: Logic PD SOM-LV and Torpedo Boards: Resync DTS
Re-sync all Logic PD OMAP35 and AM/DM37 boards with Kernel
5.2.1

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-27 13:36:53 -04:00
Adam Ford
7f89cb29ef ARM: da850evm: Remove legacy OHCI referencs and unify platform
OHCI was added with DM_USB support, so there are a few unneeded
items in the header file that can be removed.  This also
unifies da850evm with NOR and NAND booting options so all have
OHCI support.

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Migrate da850_am18xxevm]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-07-27 13:36:53 -04:00
Adam Ford
02acbb9472 ARM: am3517_evm: Fix pin muxing to enable EHCI Host in the future
This patch enables the pinmuxing to support gpio_57 for phy reset
and fixes the pinmuxing for the ECHI tranceiver.  The clocks
don't appear to by fully enabled yet, so OMAP-EHCI on am3517 is
still not yet working, but we're one step closer.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-27 13:36:52 -04:00
Adam Ford
c94703483c ARM: omap3_logic & omap35_logic: Disable OMAP EHCI for Torpedo
The OMAP35 and AM/DM37 Torpedo boards do not have a USB
tranceiver connected to the USB host port, so this patch
removes it from the defconfig files.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-27 13:36:52 -04:00
Adam Ford
25e4ff45b1 ARM: omap3_logic: Enable OMAP EHCI support for SOM-LV Boards
The SOM-LV boards support the OMAP EHCI driver using port 2.
With the driver updated to support device tree, this patch sets
the corresponding pin muxing for the tranceiver as well as the
reset pin.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-27 13:36:52 -04:00
Tom Rini
df9a7a195b u-boot-imx-20190719
- CCF for i.MX6
 - nandbcb command to write SPL into NAND
 - Switch to DM (i.MX28)
 - Boards: Toradex, engicam, DH
 - Fixes for i.MX8
 - Fixes for i.MX7ULP
 
 Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/561147504
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Merge tag 'u-boot-imx-20190719' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20190719

- CCF for i.MX6
- nandbcb command to write SPL into NAND
- Switch to DM (i.MX28)
- Boards: Toradex, engicam, DH
- Fixes for i.MX8
- Fixes for i.MX7ULP

Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/561147504
2019-07-27 09:35:05 -04:00
Tom Rini
222701e157 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spi
- fix for fsl_qspi read timeout (Thomas)
- spi-mem read data size fix (Ye Li)
- SiFive SPI driver, mmc_spi flags (Bhargav, Anup)
- Micron spi-nor parts (Ashish)
- MT7629 spi-mem driver(Weijie)
2019-07-27 09:34:07 -04:00
Adam Ford
67a4df9daf ARM: am3517-evm: Remove non-DM legacy code
With both SPL and U-Boot now supporting DM, we can start removing
legacy code.  This patch removes the legacy MMC initalization and
legacy I2C initialization since both are now available via DM and
device tree.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-26 22:24:13 -04:00
Adam Ford
9eed1ca15b ARM: am3517-evm: Migrate to SPL_OF_CONTROL
Like the other Logic PD OMAP35/DM37 boards, this board has device
tree enabled for U-Boot.  This patch converts the board to enable
SPL_OF_CONTROL and further shrinks the device tree in SPL to limit
it to UART3 (console), MMC1, i2c1, and GPIO4 (for mmc1 CD and WP).

There appears to be a bug in minicom so users may need to
switch the minicom terminal emulation to ANSI from VT102 due
to the junk that gets pushed out of the UART on startup.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-26 22:24:12 -04:00
Adam Ford
e054be5bab ARM: da850-evm: Remove repeated pinmuxing calls
arch_cpu_init() initializes the pinmuxing which is called fairly
early in the start sequences, so the board_init function doesn't
need to do it again.  This patch removes the call from board_init.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-26 22:24:12 -04:00
Adam Ford
938359c570 ARM: da850-evm: Remove duplicate UART initialization
The Low Level init functions start the UART, so it doesn't need
to happen during board_init.  This patch removes it from
board_init.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-26 22:24:12 -04:00
Adam Ford
9de4695f75 ARM: am3517-evm: Remove manual ethernet reset code
The reset line going to the ethernet controller is controlled
by a global reset controlling multiple peripherals.  There
is no need to manually invoke the reset.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-26 22:24:11 -04:00
Adam Ford
2448e42d73 ARM: am3517-evm: Enable DM_PMIC and DM_REGULATOR functions
The PBIAS regulator is available on OMAP3's, and it's shared on
the AM35, so this patch enables that in U-Boot along with GPIO
based regulators.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-07-26 22:24:11 -04:00
Faiz Abbas
637fc2c991 ARM: dts: dra76x: Update MMC2_HS200_MANUAL1 iodelay values
Update the MMC2_HS200_MANUAL1 iodelay values to match with the latest
dra76x data manual[1].

Also this particular pinctrl-array is using spaces instead of tabs for
spacing between the values and the comments. Fix this as well.

[1] http://www.ti.com/lit/ds/symlink/dra76p.pdf

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-07-26 22:24:11 -04:00
Faiz Abbas
6b66d2ee47 ARM: dts: am57xx: Disable voltage switching for SD card
If UHS speed modes are enabled, a compatible SD card switches down to 1.8V
during enumeration. If after this a software reboot/crash takes place and
on-chip ROM tries to enumerate the SD card, the difference in
IO voltages (host @ 3.3V and card @ 1.8V) may end up damaging the card.

The fix for this is to have support for power cycling the card in
hardware (with a PORz/soft-reset line causing a power cycle of the card).
Because the beaglebone X15 (rev A,B and C), am57xx-evms and am57xx-idks don't
have this capability, disable voltage switching for these boards.

The major effect of this is that the maximum supported speed mode is now
high speed(50 MHz) down from SDR104(200 MHz).

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-07-26 22:24:11 -04:00
Faiz Abbas
684af0be94 ARM: dts: am574x-idk: Add pinmuxes for mmc1 and mmc2
Sync with kernel dts by adding pinmuxes for mmc1 and mmc2. This fixes an
issue where mmc2 (eMMC) was coming up in HS52 mode instead of the
highest DDR52 mode.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-07-26 22:24:10 -04:00
Faiz Abbas
461918d7df ARM: dts: dra7-mmc-iodelay: Add a new pinctrl group for clk line without pullup
During a short period when the bus voltage is switched from 3.3v to 1.8v,
(to enumerate UHS mode), the mmc module is disabled and the mmc IO lines
are kept in a state according to the programmed pad mux pull type.

According to 4.2.4.2 Timing to Switch Signal Voltage in "SD Specifications
Part 1 Physical Layer Specification Version 5.00 February 22, 2016", the
host should hold CLK low for at least 5ms.

In order to keep the card line low during voltage switch, the pad mux of
mmc1_clk line should be configured to pull down.

Add a new pinctrl group for clock line without pullup to be used in boards
where mmc1_clk line is not connected to an external pullup.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-07-26 22:24:10 -04:00
Lokesh Vutla
697a689d76 configs: j721e_evm_a72: Add initial support
Add initial defconfig support for J721e that runs on A72.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Add MAINTAINERS entry]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-07-26 22:24:00 -04:00
Lokesh Vutla
f9fe3412c6 configs: j721e_evm_r5: Add initial support
Add initial defconfig support for J721e that runs on R5.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Add MAINTAINERS file]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-07-26 22:22:14 -04:00
Lokesh Vutla
aebb2a499e arm: dts: k3-j721e: Add r5 specific dt support
Add initial support for dt that runs on r5.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-26 21:49:29 -04:00
Lokesh Vutla
9a5e553cb4 arm: dts: k3-j721e: Add initial support for common processor board
Common Processor board is the baseboard that has most of the actual connectors,
power supply etc. A SOM (System on Module) is plugged on to the common
processor board and this contains the SoC, PMIC, DDR and basic highspeed
components necessary for functionality. Add initial dt support for this
common processor board.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26 21:49:29 -04:00
Lokesh Vutla
eeb2e8b6eb arm: dts: ti: Add Support for J721E SoC
Add initial SoC definition for J721E SoC.
Kernel dts posted here:
https://lore.kernel.org/lkml/20190522161921.20750-1-nm@ti.com/

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26 21:49:28 -04:00
Lokesh Vutla
382f1dda97 dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721E
Add pinctrl macros for J721E SoC. These macro definitions are
similar to that of AM6, but adding new definitions to avoid
any naming confusions in the soc dts files.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-26 21:49:28 -04:00
Faiz Abbas
794453f91d mmc: am654_sdhci: Separate J721E compatible into 8bit and 4bit versions
The j721e 4 bit instances don't have a hard DLL and therefore don't need
any DLL related configurations. Split the compatibles into an 8 bit and a
4 bit one. Add a private flags field which can be used to check if the
DLL is present and don't register the set_ios_post callback for the 4 bit
compatible instances.

Also update the compatibles in k3-j721e-main.dtsi to avoid breaking boot
with the new compatibles.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26 21:49:28 -04:00
Suman Anna
d146af5b0e board: ti: j721e: Enable fixing up msmc sram node
Create a ft_board_setup() api that gets called as part of
DT fixup before jumping to kernel. In this ft_board_setup()
call fdt_fixup_msmc_ram that update msmc sram node.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26 21:49:28 -04:00
Lokesh Vutla
f81850322a board: ti: j721e: Add board support for j721e evm
Add board specific initialization for j721e evm

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-26 21:49:27 -04:00
Suman Anna
5bc22e3277 armv8: K3: j721e: Add custom MMU support
The A72 U-Boot code loads and boots a number of remote processors
including the C71x DSP, both the C66_0 and C66_1 DSPs, and the various
Main R5FSS Cores. Change the memory attributes for the DDR regions used
by the remote processors so that the cores can see and execute the
proper code.

A separate table based on the current AM65x table is added for J721E SoCs,
since the number of remote processors and their DDR usage will be different
between the two SoC families.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26 21:49:27 -04:00
Andreas Dannenberg
9d1303b38b armv7R: K3: j721e: Load SYSFW binary and config from boot media
Use the System Firmware (SYSFW) loader framework to load and start
the SYSFW as part of the J721E early initialization sequence. While
at it also initialize the MCU_UART0 pinmux as it is used by SYSFW
to print diagnostic messages.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26 21:49:27 -04:00
Lokesh Vutla
9c0ff866b3 armv7R: K3: j721e: Shut down R5 core after ATF startup on A72
Populate the release_resources_for_core_shutdown() api with
shutting down r5 cores so that it will by called just after
jumping to ATF.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26 21:49:26 -04:00
Andreas Dannenberg
f94a07c8a1 armv7R: K3: j721e: Store boot index from ROM
Obtain the boot index as left behind by the device boot ROM and store
it in scratch pad SRAM for later use before it may get overwritten.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-26 21:49:26 -04:00
Andreas Dannenberg
b73fcbced9 armv7R: K3: j721e: Unlock all applicable control MMR registers
To access various control MMR functionality the registers need to
be unlocked. Do that for all control MMR regions in the MCU and MAIN
domains. We may want to go back later and limit the unlocking that's
being done.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-26 21:49:26 -04:00
Lokesh Vutla
0a704924f3 armv7R: K3: j721e: Add support for boot device detection
J721E allows for booting from primary or backup boot media.
Both media can be chosen individually based on switch settings.
ROM looks for a valid image in primary boot media, if not found
then looks in backup boot media. In order to pass this boot media
information to boot loader, ROM stores a value at a particular
address. Add support for reading this information and determining
the boot media correctly.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-07-26 21:49:26 -04:00
Lokesh Vutla
c2562d7c9e arm: K3: j721e: Add basic support for J721E SoC definition
The J721E SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration to enable lower system costs
of automotive applications such as infotainment, cluster, premium
Audio, Gateway, industrial and a range of broad market applications.
This SoC is designed around reducing the system cost by eliminating
the need of an external system MCU and is targeted towards ASIL-B/C
certification/requirements in addition to allowing complex software
and system use-cases.

Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, three clusters of lockstep
  capable dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA),
  C7x floating point Vector DSP, Two C66x floating point DSPs.
* 3D GPU PowerVR Rogue 8XE GE8430
* Vision Processing Accelerator (VPAC) with image signal processor and Depth
  and Motion Processing Accelerator (DMPAC)
* Two Gigabit Industrial Communication Subsystems (ICSSG), each with dual
  PRUs and dual RTUs
* Two CSI2.0 4L RX plus one CSI2.0 4L TX, one eDP/DP, One DSI Tx, and
  up to two DPI interfaces.
* Integrated Ethernet switch supporting up to a total of 8 external ports in
  addition to legacy Ethernet switch of up to 2 ports.
* System MMU (SMMU) Version 3.0 and advanced virtualisation
  capabilities.
* Upto 4 PCIe-GEN3 controllers, 2 USB3.0 Dual-role device subsystems,
  16 MCANs, 12 McASP, eMMC and SD, UFS, OSPI/HyperBus memory controller, QSPI,
  I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals.
* Two hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
  management.
* Configurable L3 Cache and IO-coherent architecture with high data throughput
  capable distributed DMA architecture under NAVSS
* Centralized System Controller for Security, Power, and Resource
  Management (DMSC)

See J721E Technical Reference Manual (SPRUIL1, May 2019)
for further details: http://www.ti.com/lit/pdf/spruil1

Add base support for J721E SoC

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2019-07-26 21:49:25 -04:00
Lokesh Vutla
54e4311fa1 remoteproc: k3_rproc: Rename to ti_k3_arm64_rproc
k3_rproc driver is specifically meant for controlling an arm64
core using TISCI protocol. So rename the driver, Kconfig symbol,
compatible and functions accordingly.

While at it drop this remoteproc selection for a53 defconfig.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26 21:49:25 -04:00
Lokesh Vutla
44de37a00e remoteproc: k3_rproc: Update the driver to use ti_sci_proc helpers
Update the k3_rproc driver to use the generic ti_sci_proc helper
apis which simplifies the driver a bit.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26 21:49:25 -04:00
Lokesh Vutla
4fa23ebe73 remoteproc: tisci: add TI-SCI processor control helper functions
Texas Instruments' K3 generation SoCs has specific modules/register
spaces used for configuring the various aspects of a remote processor.
These include power, reset, boot vector and other configuration features
specific to each compute processor present on the SoC. These registers
are managed by the System Controller such as DMSC on K3 AM65x SoCs.

The Texas Instrument's System Control Interface (TI-SCI) Message Protocol
is used to communicate to the System Controller from various compute
processors to invoke specific services provided by the firmware running
on the System Controller.

Add a common processor control interface header file that can be used by
multiple remoteproc drivers. The helper functions within this header file
abstract the various TI SCI protocol ops for the remoteproc drivers, and
allow them to request the System Controller to be able to program and
manage various remote processors on the SoC. The common macros required
by the R5 remoteproc driver were also added. The remoteproc drivers are
expected to manage the life-cycle of their ti_sci_proc_dev local
structures.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
2019-07-26 21:49:24 -04:00