Commit Graph

45200 Commits

Author SHA1 Message Date
Santan Kumar
ec8a7d7743 soc/fsl-layerscape: Update SVR number for LS2081A and LS2041A
Update SVR as per the SOC document.
 -LS2081A: 0x870919 -> 0x870918
 -LS2041A: 0x870915 -> 0x870914

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-01 08:28:56 -07:00
Santan Kumar
e478307918 fsl/usb: enable errata-a010151 for ls2088a and ls2081a
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-01 08:28:56 -07:00
Santan Kumar
0f4e1ace27 board/ls2080aqds, SD-boot: Update env offset
As per new memory layout, Update env offset
from 0x200000 to 0x300000

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-01 08:28:56 -07:00
Alison Wang
020b3ce8ae armv8: Remove duplicate definition for IH_ARCH_ARM and IH_ARCH_ARM64
The duplicate definitions for IH_ARCH_ARM and IH_ARCH_ARM64 are removed.
The definitions in <image.h> are used.

According to this modification, the comparison between os arch and cpu
arch is done in C programming instead of ASM programming.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-01 08:28:56 -07:00
Alexander Stein
4df24f2c40 spi: fsl_qspi: Pet watchdog even more
Pet the watchdog once upon each command call (qspi_xfer) and during
each loop iteration in several commands.

This fixes a watchdog reset especially during erase command.

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-01 08:28:56 -07:00
Alison Wang
a65d740821 arm: ls1021atwr: Add distro boot support
This patch includes common config_distro_defaults.h and
config_distro_bootcmd.h for u-boot enviroments to support distro boot
which automatically scan boot.scr from storage devices(e.g.
SD/USB/SATA/SCSI disk) and execute autoboot script on LS1021ATWR board.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-01 08:28:55 -07:00
Bin Meng
24357dfd2a x86: Switch all boards to use DM SCSI
After MMC is converted to DM, convert to use DM SCSI as well for all
x86 boards and imply BLK for both MMC and SCSI drivers.

CONFIG_SCSI_DEV_LIST is no longer used. Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Simon Glass
b7c6baef28 x86: Convert MMC to driver model
Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove DM_MMC from edison_defconfig]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-01 20:17:02 +08:00
Bin Meng
52a1c2c68b block: ide: Fix build error when CONFIG_BLK is on
Add missing #ifndef CONFIG_BLK to wrap dev_desc->block_read.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
a5c680fe10 dm: scsi: Add a generic PCI-based AHCI driver
This adds support for PCI-based AHCI controller based on DM SCSI.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
xypron.glpk@gmx.de
6461f45b71 x86: ivybridge: remove unused uma_memory_size
The value of uma_memory_size depends on an undefined value
from the stack. The value of uma_memory_size is changed but
never used.

So simply remove this superfluous code.

The problem was indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
724368928c x86: Convert INTEL_ICH6_GPIO to Kconfig
This converts Intel ICH6 GPIO driver to Kconfig, and add it to the
imply list of platform drivers.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
b9342b2cc6 x86: kconfig: Move USB to platform Kconfig
Like other peripheral drivers, move USB related drivers to platform
Kconfig as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
1df7f0b6a0 x86: kconfig: Let board select SPI flash
Only a specific type of SPI flash exists on a board, having board
Kconfig to select the SPI flash seems to make more sense. Other
flash types are not necessary except coreboot, which implies all
available flash drivers there.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
31ba86e8d0 x86: qemu: Remove SPI flash from defconfigs
QEMU does not support ICH SPI controller yet. It's meaningless to
include SPI flash support.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
97e12b06af x86: qemu: kconfig: Imply platform specific drivers
Imply Qemu-specific drivers in the platform Kconfig.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
b0e3adf669 x86: quark: kconfig: Imply platform specific drivers
Imply Quark-specific drivers in the platform Kconfig.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
71305b4478 x86: tangier: kconfig: Imply platform specific drivers
Imply Tangier-specific drivers in the platform Kconfig.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
a65ae28618 x86: queensbay: kconfig: Imply platform specific drivers
Imply drivers that work with Intel Queensbay platform.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
08fb85b2a4 x86: coreboot: kconfig: Imply drivers that are useful
U-Boot as coreboot payload can run on any x86 hardware ideally.
Let's imply some common drivers that are useful.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
1b15ef9cd2 x86: broadwell: kconfig: Imply platform specific drivers
Imply Broadwell-specific drivers in the platform Kconfig.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
a5b212942b x86: ivybridge: kconfig: Imply platform specific drivers
Imply drivers that are working with Ivybridge platform in the
platform Kconfig.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
e88e1ef550 x86: baytrail: kconfig: Imply platform specific drivers
BayTrail integrates lots of peripherals that have U-Boot drivers.
Imply those in the platform Kconfig.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
4f0faacb42 x86: kconfig: Imply DM uclass drivers
Now that all x86 boards have been converted to use DM, we can imply
these uclass drivers (DM_ETH, DM_RTC, DM_USB, DM_VIDEO) from the
top level.

Previously DM_GPIO, DM_KEYBOARD, DM_SERIAL, DM_SPI, DM_SPI_FLASH
are selected. Change to use 'imply' to allow them to be removed.

Note with this change, chromebook_link64 build fails:

common/built-in.o:(.data.env_htab+0xc): undefined reference to 'env_flags_validate'
lib/built-in.o: In function `hsearch_r':
lib/hashtable.c:380: undefined reference to 'env_callback_init'
lib/hashtable.c:382: undefined reference to 'env_flags_init'
make[1]: *** [spl/u-boot-spl] Error 1

CONFIG_SPL_ENV_SUPPORT is required for chromebook_link64 to build
again. This is just a workaround as it is not needed at all. See
commit bda40d5 "x86: qemu: Add a config for 64-bit U-Boot" for
the same issue seen on QEMU 64-bit target.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
263252c762 x86: kconfig: Select OF_CONTROL
This is a must have for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
67f99f970f x86: kconfig: Imply ENABLE_MRC_CACHE in the platform Kconfig
Platform knows whether MRC cache is implemented, but using it can
be a choice of a specific board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
5d89b37f71 x86: kconfig: Select ARCH_EARLY_INIT_R in the platform Kconfig
This is architecture-dependent early initialization hence should
be put in the platform Kconfig.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
3612b1efeb x86: kconfig: Select ARCH_MISC_INIT in the platform Kconfig
arch_misc_init() is intended to do architecture-dependent stuff.
This is required by each platform.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
30b1ecd265 x86: kconfig: Let board select BOARD_EARLY_INIT_F
CONFIG_BOARD_EARLY_INIT_F literally indicates board-specific codes
and should be not 'default y' for all x86 boards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
1e452b4686 x86: kconfig: Imply HAVE_INTEL_ME in the platform Kconfig
Intel Management Engine is required by the platform, however it's
not a must have when building a U-Boot image. For example, during
development normally programming ME firmware is a one-time effort.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
6bf89de7e1 x86: kconfig: Select PCI and DM_PCI
PCI is the de facto interconnect bus in an x86 system.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
e28497bf4a x86: kconfig: Select USE_PRIVATE_LIBGCC
x86 is using the built-in libgcc implementation and this cannot be
turned off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
0ce9c57620 x86: kconfig: Select TIMER and X86_TSC_TIMER
Without a timer, U-Boot just doesn't boot. This is not something
we can turn off.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Andy Shevchenko
c3df28f6e2 x86: Make table address selectable
Some firmwares might have another window for generated tables.

So, introduce two configuration options to select start address and
maximum length for the generated tables.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-01 20:17:02 +08:00
Bin Meng
167a40166b x86: tsc: Rename try_msr_calibrate_tsc() to cpu_mhz_from_msr()
Rename try_msr_calibrate_tsc() to cpu_mhz_from_msr(), as that
better describes what the routine does.

This keeps in sync with Linux kernel commit:
  02c0cd2: x86/tsc_msr: Remove irqoff around MSR-based TSC enumeration

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
f5757154bb x86: tsc: Correct Silvermont reference clock values
Atom processors use a 19.2 MHz crystal oscillator.

Early processors generate 100 MHz via 19.2 MHz * 26 / 5 = 99.84 MHz.

Later processors generate 100 MHz via 19.2 MHz * 125 / 24 = 100 MHz.

Update the Silvermont-based tables accordingly, matching the Software
Developers Manual.

Also, correct a 166 MHz entry that should have been 116 MHz, and add
a missing 80 MHz entry for VLV2.

This keeps in sync with Linux kernel commit:
  05680e7: x86/tsc_msr: Correct Silvermont reference clock values

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
c636774848 x86: tsc: Update comments and expand definitions in freq_desc_tables[]
Some processor abbreviations in the comments of freq_desc_tables[]
are obscure. This updates part of these to mention processors
that are known to us. Also expand frequency definitions.

This keeps in sync with Linux kernel commit:
  9e0cae9: x86/tsc_msr: Update comments, expand definitions

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
fde1801eaa x86: tsc: Remove the fail handling in try_msr_calibrate_tsc()
If either ratio or freq is zero, the return value is zero. There
is no need to create a fail branch and return zero there.

This keeps in sync with Linux kernel commit:
  14bb4e3: x86/tsc_msr: Remove debugging messages

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
0b992e4932 x86: tsc: Identify Intel-specific code
try_msr_calibrate_tsc() is currently Intel-specific, and should not
execute on any other vendor's parts.

This keeps in sync with Linux kernel commit:
  ba82683: x86/tsc_msr: Identify Intel-specific code

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
d92e9c8d31 x86: tsc: Read all ratio bits from MSR_PLATFORM_INFO
Currently we read the tsc radio like this:

	ratio = (MSR_PLATFORM_INFO >> 8) & 0x1f;

Thus we get bit 8-12 of MSR_PLATFORM_INFO, however according to the
Intel manual, the ratio bits are bit 8-15.

Fix this problem by masking 0xff instead.

This keeps in sync with Linux kernel commit:
  886123f: x86/tsc: Read all ratio bits from MSR_PLATFORM_INFO

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
e719b6b0f8 x86: Enforce toolchain to generate 64-bit codes for 64-bit U-Boot
64-bit U-Boot image is a combination of 32-bit U-Boot (SPL) plus
64-bit U-Boot (proper). For the U-Boot proper, it has be compiled
to 64-bit object codes. Attempting to use a toolchain to compile
64-bit U-Boot for qemu-x86_64, like kernel.org 4.9 i386-linux-gcc,
fails with the following errors:

  arch/x86/cpu/intel_common/microcode.c:79:2: error: PIC register
  clobbered by 'ebx' in 'asm'

The issue is because toolchain is preconfigured to generate code
for the 32-bit architecture (i386), and currently '-m64' is missing
in the makefile fragment. Using kernel.org 4.9 x86_64-linux-gcc
works out of the box, since it is preconfigured to generate 64-bit
codes.

When compiling U-Boot SPL, '-m32' is passed to the toolchain, no
mater 32-bit (i386-linux-) or 64-bit (x86_64-linux) the toolchain
is preconfigured to generate.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Bin Meng
9a95f51ffe x86: Use default stack boundary alignment
At present U-Boot x86 build is using -mpreferred-stack-boundary=2
which is 4 bytes stack boundary alignment. With 64-bit U-Boot, the
minimal required stack boundary alignment is 16 bytes.

If -mpreferred-stack-boundary is not specified, the default is 4
(16 bytes). Switch to use the default one.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-01 20:17:02 +08:00
Jean-Jacques Hiblot
5c970013a6 regulator: palmas: disable bypass when the LDO is enabled
Some LDOs have a bypass capability. Make sure that the bypass is disabled
when is the LDO is enabled (otherwise the voltage can't be changed).

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-01 11:58:01 +09:00
Kishon Vijay Abraham I
9554a14df2 regulator: palmas: Add support for LDO1 regulator to provide 1.8V
Modify palmas_mmc1_poweron_ldo() API to set the voltage based on the
voltage parameter passed as argument instead of always setting it to
3.0V. This allows MMC1 to set the LDO1 regulator voltage to 3.3V or 1.8V.
1.8V is required to add support for UHS mode.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2017-08-01 11:58:01 +09:00
Simon Glass
3936514b82 dm: sunxi: Move Linksprite_pcDuino3 to use DM for MMC, SATA
Move this board over to driver model for MMC and SATA. This means that it
uses CONFIG_BLK as well. In SPL these options remain turned off since it
increases the code size. One option would be to use CONFIG_SPL_OF_PLATDATA
to avoid device-tree overhead.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-01 11:58:01 +09:00
Simon Glass
cf7b2e10c9 dm: sata: sunxi: Add support for driver model
Adjust SATA setup to support driver model.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01 11:58:01 +09:00
Simon Glass
74daf94a23 dm: sunxi: sata: Don't build sata support into SPL
This is not used in SPL so we do not need to compile it. Make this change
before adding driver-model support to the driver, to avoid build errors.
With driver model we define a U_BOOT_DRIVER() which would otherwise be
present in SPL and not be garbage-collected when building.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01 11:58:01 +09:00
Simon Glass
8620f38409 dm: sunxi: Linksprite_pcDuino3: Correct polarity of MMC card detect
This is shown as active high in the schematics[1], so fix it.

[1] https://patchwork.ozlabs.org/patch/777890/

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01 11:58:01 +09:00
Simon Glass
dd27918c22 dm: mmc: sunxi: Add support for driver model
Add a driver-model version of this driver which mostly uses the existing
code. The old code can be removed once all boards are switched over.

Signed-off-by: Simon Glass <sjg@chromium.org>
2017-08-01 11:58:01 +09:00
Simon Glass
ec73d96090 dm: mmc: sunxi: Drop mmc_clk_io_on()
This function has #ifdefs in it which we want to avoid for driver model.
Instead we should use different compatible strings and the .data field.
It also uses the MMC device number which is not available in driver
model except through aliases.

Move the function's into its caller so that the driver-model version can
do things its own way.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-08-01 11:58:01 +09:00