Commit Graph

45200 Commits

Author SHA1 Message Date
Tom Rini
7f513e8196 Merge git://git.denx.de/u-boot-fsl-qoriq 2017-08-11 07:10:18 -04:00
Tom Rini
b24065c4ef Merge git://git.denx.de/u-boot-i2c 2017-08-10 07:22:59 -04:00
Tom Rini
4edc31c593 Merge git://www.denx.de/git/u-boot-marvell 2017-08-10 07:22:56 -04:00
Marek Vasut
014e47f028 i2c: designware: Allow sending restart conditions
Allow sending restart conditions upon direction change as this is
required by some chips.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denxx.de>
2017-08-10 12:02:50 +02:00
Adam Ford
daa0f0500f Convert CONFIG_SYS_I2C_OMAP24XX to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_I2C_OMAP24XX

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2017-08-10 12:02:32 +02:00
Stefan Chulski
ceec6c48a4 net: mvpp2x: Set BM poll size once during priv probe
Set BM poll size once during priv probe and do not
overwrite it during port probe procedure. Pool is common for
all CP ports.

Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10 08:33:02 +02:00
Stefan Chulski
a25962c417 net: mvpp2x: remove TX drain from transmit routine
TX drain in transmit procedure could cause issues due
to race between drain procedure and transmition of descriptor
between AGGR TXQ and physical TXQ.
TXQ will be cleared before moving to Linux by stop procedure.

Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10 08:33:02 +02:00
Stefan Chulski
783e78562d net: mvpp2x: Set BM pool high address
MVPP22 driver support 64 Bit arch and require BM pool
high address configuration.

Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10 08:33:02 +02:00
Stefan Chulski
16f18d2a4d net: mvpp2x: Remove IRQ configuration from U-Boot
Remove IRQ configuration from U-Boot PP driver.
U-Boot don't use interrupts and configuration of IRQ in U-Boot
caused crashes in Linux shared interrupt mode.
Also interrupt use is redundant in RX routine since a single RX
queue is used.

Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10 08:33:02 +02:00
Stefan Chulski
d4b0e00829 net: mvpp2x: remove MBUS configurations from MvPP22 driver
MBUS driver were replaced by AXI in PPv22 and relevant
only for PPv21.

Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10 08:33:02 +02:00
Stefan Chulski
f0e970fd2a net: mvpp2x: decrease size of AGGR_TXQ and CPU_DESC_CHUNK
U-boot use single physical tx queue with size 16 descriptors.
So aggregated tx queue size should be equal to physical tx queue
and cpu descriptor chunk(number of descriptors delivered from
physical tx queue to aggregated tx queue by one chunk) shouldn't be
larger than physical tx queue.

Fix:
Set AGGR_TXQ and CPU_DESC_CHUNK to be 16 descriptors, same as
physical TXQ.

Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10 08:33:02 +02:00
Stefan Chulski
bb915c843f net: mvpp2x: fix BM configuration overrun issue
Issue:
BM counters were overrun by probe that called per Network interface and
caused release of wrong number of buffers during remove procedure.

Fix:
Use probe_done and num_ports to call init and remove procedure
once per communication controller.

Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10 08:33:02 +02:00
Stefan Chulski
73f592fb72 net: mvpp2x: Enable GoP packet padding in TX
This patch enables padding of packets shorter than 64B in TX(set by default).
Disabling of padding causes crashes on MACCIATO board.

Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10 08:33:02 +02:00
Stefan Chulski
377883f16d net: mvpp2x: fix phy connected to wrong mdio issue
A8K marvell SoC has two South Bridge communication controllers(CP0 and CP1).
Each communication controller has packet processor ports and MDIO.
On MACHIATOBin board ports from CP1 are connected to mdio on CP0.

Issue:
Wrong base address is assigned to MDIO interface during probe.

Fix:
Get MDIO address from PHY handler parent base address.

This should be refined in the future when MDIO driver is implemented.

Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10 08:33:02 +02:00
Stefan Chulski
4189373a3d net: mvpp2x: Add GPIO configuration support
This patch add GPIO configuration support in mvpp2x driver.
Driver will handle 10G SFP gpio reset and SFP TX disable. GPIO pins should
be set in device tree.

Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-10 08:33:02 +02:00
Santan Kumar
1c83df6f3f armv8: ls2080a: Increase env sector size for qspi boot
Increase env sector size from 64kb to 256kb for qspi boot.

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09 09:57:33 -07:00
Hou Zhiqiang
acb90e8338 fsl-lsch2: csu: correct the workaround A-010315
The implementation of function set_pcie_ns_access() uses a wrong
argument. The structure array ns_dev has a member 'ind' which is
initialized by CSU_CSLX_*. It should use the 'ind' directly to
address the PCIe's CSL register (CSL_base + CSU_CSLX_PCIE*).

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[YS: Revise commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09 09:57:33 -07:00
Santan Kumar
06651b9456 driver: net: fsl-mc: fsl_mc_ldpaa_exit exit earlier if dpl applied
In fsl_mc_ldpaa_exit(), in case of mc is booted and dpl is applied,
it should return earlier without executing dpbp_exit().

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Acked-by: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09 09:57:33 -07:00
Santan Kumar
7794d9ab29 board: ls2080ardb: Add fsl_fdt_fixup_flash
IFC and QSPI are muxed on board. Add fsl_fdt_fixup_flash() to disable
IFC node in dts if QSPI is enabled, or disable QSPI node in dts if
otherwise.

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
[YS: Revise commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09 09:57:32 -07:00
Rajesh Bhagat
a8ecb39e9e config: ls1012aqds: Enable USB EHCI support for ls1012aqds
Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: yinbo.zhu <yinbo.zhu@nxp.com>
[YS: Revise subject, remove commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09 09:57:32 -07:00
Yang Li
590e87d1a6 mmc: fsl_esdhc: not always setting esdhc fdt status to okay
We shouldn't always change the status to okay.  There could be
situations that the esdhc is intentionally disabled in the device
tree.

Signed-off-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09 09:57:32 -07:00
Hou Zhiqiang
89d8e1313f PCI: layerscape: Fix assigning wrong address to LS2088A pcie cfg1 space
This bug is brought by the commit 3d8553f0a3 (pci: layerscape: add
LS2088A series SoC pcie support), which only updated cfg_res.start
and did not update the .end field. This causes fdt_resource_size()
getting wrong value when calculate the cfg1 space address.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[YS: Revise subject and commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09 09:57:32 -07:00
Alison Wang
563ac65a1a dm: arm: ls1021a: Move to driver model for USB
This patch enables driver model for USB in defconfigs for LS1021A
platforms.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09 09:57:32 -07:00
Hou Zhiqiang
e4b5143eb6 fsl-lsch2: csu: remove multiple calling function
Function enable_layerscape_ns_access() is alreayd called soc-wide.
Remove duplicated calling from individual boards.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
[YS: Add commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09 09:57:32 -07:00
Hou Zhiqiang
bf7aecce04 armv8/fsl-lsch2: correct the config description of DSPI clock divider
It is derived from Platform clock instead of Platform PLL frequency.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09 09:57:32 -07:00
Santan Kumar
263536a693 board:ls2080ardb: Update execution of config_board_mux
Function config_board_mux() reads env variable 'hwconfig' which is
only available after relocation for QSPI boot. Move calling
config_board_mux() to misc_init_r().

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
[YS: Revise commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09 09:55:02 -07:00
Santan Kumar
6cc914efd2 board/ls2080ardb: Disable SD-related GPIO programming
Smart voltage translator is removed from LS2080ARDB/LS2088ARDB
RevF boards. It is only used on LS2081ARDB. Programming GPIO
is only required for LS2081ARDB.

Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
[YS: Revise commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09 09:54:43 -07:00
Qianyu Gong
3016084b38 armv8: ls1046ardb: update core frequency to 1800MHZ
Update the default core frequency to 1800MHZ for best performance under
SD boot and eMMC boot.

Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2017-08-09 09:11:34 -07:00
York Sun
9bb272e90a driver: mmc: fsl_esdhc: Fix compiling warning
Commit 4483b7eb added variable vqmmc_dev but only uses it under
CONFIG_DM_REGULATOR. Add the same macro to variable declaration to
get rid of compiling warning.

Signed-off-by: York Sun <york.sun@nxp.com>
2017-08-09 09:11:29 -07:00
Adam Ford
94d50bed65 Configs: Migrate CONFIG_SYS_I2C_OMAP34XX to CONFIG_SYS_I2C_OMAP24XX
The driver is for all boards 24XX and up, so let's eliminate the
extra option called CONFIG_SYS_I2C_OMAP34XX since the driver checks
for CONFIG_OMAP34XX we don't need CONFIG_SYS_I2C_OMAP34XX.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2017-08-09 06:14:13 +02:00
Wenyou.Yang@microchip.com
0bc8f640a4 i2c: at91: Add missing probe function to device driver
Add missing probe function to the device driver to active a device.

Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2017-08-09 06:13:53 +02:00
Tom Rini
d529124fdc Merge git://git.denx.de/u-boot-x86 2017-08-08 17:06:19 -04:00
Tom Rini
f0ca30fa19 Merge git://www.denx.de/git/u-boot-cfi-flash 2017-08-08 17:05:47 -04:00
Tom Rini
1f032ce23a Merge git://www.denx.de/git/u-boot-marvell 2017-08-08 17:05:33 -04:00
Tom Rini
1989374b21 configs: Finish migration of PHY_GIGE
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2017-08-08 17:02:31 -04:00
Stefan Roese
6a5691e297 x86: Add defconfig for theadorable-x86-conga with PCIe x4 blobs
This defconfig uses the PCIe x4 binary blobs from the congatec BIOS.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-08 21:13:07 +08:00
Stefan Roese
2efd877b0c x86: conga: theadorable-x86-conga-qa3-e3845_defconfig: Misc defconfig updates
- Disable debug UART
- Enable more partition support

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-08 21:13:07 +08:00
Stefan Roese
3038d5c656 x86: conga: conga-qeval20-qa3-e3845_defconfig: Misc defconfig updates
- Enable ACPI resume support
- Disable debug UART
- Enable Spansion and Winbond SPI flash support
- Move VGA BIOS binary address to enable bigger U-Boot images

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-08 21:13:06 +08:00
Stefan Roese
489b51da68 x86: theadorable-x86: Add header file for common defines and env
This patch adds the common header include file theadorable-x86-common.h
for the theadorable-x86 targets to define all common options and the
default environment.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-08 21:13:06 +08:00
Stefan Roese
14a937ffb9 x86: conga: Add option to select different config headers for baseboards
This patch adds the infrastructure to define different config headers
with different configurations and default environment for the baseboards
that can now be selected via Kconfig. The new configuration for the
theadorable-x86-conga-qa3-e3845 is also added. Also the new defconfig
file for this new target is added.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-08 21:13:06 +08:00
Stefan Roese
6b08679328 x86: dfi: Add option to select different config headers for baseboards
This patch adds the infrastructure to define different config headers
with different configurations and default environment for the baseboards
that can now be selected via Kconfig. The new configuration for the
theadorable-x86-dfi-bt700 is also added.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-08-08 21:13:06 +08:00
Bin Meng
323a6d6910 x86: acpi: Fix build error with certain configuration
When CONFIG_EFI_PARTITION is not set, the following build error is
seen in arch/x86/lib/acpi_s3.c:

  error: expected declaration specifiers or '...' before '*' token
  static void asmlinkage (*acpi_do_wakeup)(void *vector) = (void*)WAKEUP_BASE;

This is actually caused by missing asmlinkage declaration, but with
CONFIG_EFI_PARTITION on, the declaration comes from part.h which
is included from common.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2017-08-08 21:13:05 +08:00
Marek Vasut
bd2d489e24 mtd: cfi: Zap CFI_FLASH_SHIFT_WIDTH redefinition
This is defined twice in the same file, with the same value, likely
because of some patch merge issue. Pick the uglier one and nuke it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-08 14:29:48 +02:00
Marek Behún
8daa3468b5 mvebu: turris_omnia: Fix PEX vs SATA detection for board topology
The I2C reading in the PEX vs SATA detection code often fails on the
first try. Try three times, as the code for EEPROM reading does.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
2017-08-08 14:20:26 +02:00
Bin Meng
091e51d20f x86: Remove dead ISA related codes
Neither new design uses ISA bus, nor does any U-Boot codes use these
codes. Remove them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2017-08-08 16:46:32 +08:00
Tom Rini
6e7adf7037 Merge branch 'master' of git://git.denx.de/u-boot-net 2017-08-07 17:37:56 -04:00
Alexandru Gagniuc
da3b9e7fd6 Move PHY_MICREL and PHY_MICREL_KSZ90X1 to Kconfig
Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-07 15:22:29 -05:00
Alexandru Gagniuc
3146f0c017 Move PHYLIB to Kconfig
Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-07 15:22:28 -05:00
Sebastien Bourdelin
ef1f61aa03 net: phy: micrel: add an option to disable gigabit for the KSZ9031
The environment variable "disable_giga" can now be used to disable
1000baseTx on the Micrel's KSZ9031.

Signed-off-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-07 15:18:31 -05:00
Denis Pynkin
704f3acfcf net: Use packed structures for networking
PXE boot is broken with GCC 7.1 due option '-fstore-merging' enabled
by default for '-O2':

BOOTP broadcast 1
data abort
pc : [<8ff8bb30>]          lr : [<00004f1f>]
reloc pc : [<17832b30>]    lr : [<878abf1f>]
sp : 8f558bc0  ip : 00000000     fp : 8ffef5a4
r10: 8ffed248  r9 : 8f558ee0     r8 : 8ffef594
r7 : 0000000e  r6 : 8ffed700     r5 : 00000000  r4 : 8ffed74e
r3 : 00060101  r2 : 8ffed230     r1 : 8ffed706  r0 : 00000ddd
Flags: nzcv  IRQs off  FIQs off  Mode SVC_32
Resetting CPU ...

Core reason is usage of structures for network headers without packed
attribute.

Reviewed-by: Yauheni Kaliuta <yauheni.kaliuta@redhat.com>
Signed-off-by: Denis Pynkin <denis.pynkin@collabora.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2017-08-07 15:18:31 -05:00