There are missing Kconfig dependencies in the code which is using
firmware interface.
The commit 71efd45a5f ("arm64: zynqmp: Change firmware dependency")
add option to also disable ZYNQMP_FIRMWARE. But not all Kconfig
dependencies were properly described and also sdhci and gem drivers
didn't protect the code properly.
So, add the missing ZYNQMP_FIRMWARE dependencies.
Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230201095553.11219-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
The conditions in this code do not align when doing an SPL build with
split config. Use __maybe_unused to avoid needing to be so explicit.
Of course a better solution would be to refactor all of this to avoid
using #ifdef.
Signed-off-by: Simon Glass <sjg@chromium.org>
This causes a build failure on mx6cuboxi with split config, since CMD_SATA
shows up as enabled in SPl (because there is no SPL_CMD_SATA).
The condition is wrong anyway, so change it to use SATA instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_PG_WCOM_UBOOT_UPDATE_SUPPORTED defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
Configure PMIC voltages for early stages using updated
early i2c write.
Tested-by: Thierry Reding <treding@nvidia.com> # Beaver T30
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom <twarren@nvidia.com>
Move the environment to an easily editable text file in the boot
partition
Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The current ae350-related defconfigs could also
support newer Andes CPU IP, so modify the names of CPU
from ax25 to andesv5, and board name from ax25-ae350 to ae350.
Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
The L2-cache is not enabled currently, the enbale_caches() will call
the v5l2_enable() callback to enable it in SPL.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Synology DS116 is a NAS based on Marvell Armada 385 SoC.
Board Specification:
- Marvel MV88F6820 Dual Core at 1.8GHz
- 1 GiB DDR3 RAM
- 8MB Macronix mx25l6405d SPI flash
- I2C
- 2x USB 3.0
- 1x GBE LAN port (PHY: Marvell 88E1510)
- 1x SATA (6 Gbps)
- 3x LED
- PIC16F1829 (connected to uart1)
- GPIO fan
- serial console
Note that this patch depends on the add-support for Thecus N2350 patch:
https://patchwork.ozlabs.org/project/uboot/patch/20230201231306.7010-1-mibodhi@gmail.com/
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Currently, only the 1st SATA port is powered up (by GPIO1 12).
Add GPIO1 13 in board initialization to power up the 2nd SATA port.
Note that this patch depends on the initial add-support patch:
https://patchwork.ozlabs.org/project/uboot/patch/20230201231306.7010-1-mibodhi@gmail.com/
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
- A fix for a long standing bug that has been exposed by commit
50128aeb0f ("cyclic: get rid of cyclic_init()") preventing 8xx boards
from booting since u-boot 2023.01
- A GPIO driver for powerpc 8xx chip
- Fixup for powerpc 8xx SPI driver
- A new powerpc 8xx board
- The two devices having that board.
This adds support for the MIAE and VGoIP devices.
Those devices have the same CPU board that the MCR3000_2G board.
The devices are very modular, they are provided with
interchangeable front and back panels.
Linux kernel is shipped with a device tree which contains all
possible setups, and U-boot eliminates unrelated nodes based on
detected hardware.
This patch was originally written by Charles Frey who's
email address is not valid anymore as he left the company.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: FRANJOU Stephane <stephane.franjou@csgroup.eu>
This adds a new board from CS GROUP. The board is called
MCR3000_2G, and has a CPU board called CMPC885.
That CPU board is shared with another equipment that will
be added in a later patch.
That board stores Ethernet MAC addresses in an EEPROM which
is accessed using SPI bus.
This patch was originally written by Charles Frey who's
email address is not valid anymore as he left the company.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: FRANJOU Stephane <stephane.franjou@csgroup.eu>
e1-wan device-tree node doesn't exist. Remove related update
to avoid following warning at startup:
Loading Device Tree to 007fa000, end 007ff951 ... OK
Unable to update property /localbus/e1-wan:data-rate, err=FDT_ERR_NOTFOUND
Unable to update property /localbus/e1-wan:channel-phase, err=FDT_ERR_NOTFOUND
Unable to update property /localbus/e1-wan:rising-edge-sync-pulse, err=FDT_ERR_NOTFOUND
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: FRANJOU Stephane <stephane.franjou@csgroup.eu>
Both U-boot and Linux kernel have grown over the last releases
and don't fit anymore in the 2M EPROM of the board.
So, rework the setup to allow storing the Linux kernel image
on the UBIFS NAND Flash.
Also add support to FIT images as this is what the Linux kernel
look like nowadays.
Also increase CFG_SYS_BOOTMAPSZ to 32Mbytes and define
CONFIG_SYS_BOOTM_LEN with the same value, otherwise it defaults
to 8M which is not sufficient anymore with nowadays Linux kernels.
And set the netmask to 255.255.255.0 as a class C address is used.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Reviewed-by: FRANJOU Stephane <stephane.franjou@csgroup.eu>
We can move all of the environment changes to come
from CONFIG_EXTRA_ENV_TEXT.
Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
This converts 4 usages of this option to the non-SPL form, since there is
no SPL_FEC_MXC defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 3 usages of this option to the non-SPL form, since there is
no SPL_FASTBOOT defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_WATCHDOG_AUTOSTART defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_TEN64_CONTROLLER defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_TARGET_PG_WCOM_SELI8 defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_TARGET_PG_WCOM_EXPU1 defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
This converts 3 usages of this option to the non-SPL form, since there is
no SPL_TARGET_LX2160ARDB defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_SYS_MEM_RSVD_FOR_MMU defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_SL28_SPL_LOADS_OPTEE_BL32 defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_SL28CPLD defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_SIFIVE_OTP defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_RESV_RAM defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_PG_WCOM_UBOOT_UPDATE defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_PG_WCOM_UBOOT_BOOTPACKAGE defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_MICROBLAZE defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_FSL_MC_ENET defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_FSL_CAAM defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_FDT_SIMPLEFB defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 4 usages of this option to the non-SPL form, since there is
no SPL_ENV_VARS_UBOOT_RUNTIME_CONFIG defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_ENV_IS_IN_UBI defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 13 usages of this option to the non-SPL form, since there is
no SPL_EFI_HAVE_CAPSULE_SUPPORT defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 3 usages of this option to the non-SPL form, since there is
no SPL_DWC_ETH_QOS defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 2 usages of this option to the non-SPL form, since there is
no SPL_DTB_RESELECT defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_CMD_STM32PROG defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_CMD_STBOARD defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_CMD_FRU defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_BNXT_ETH defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_ARCH_ZYNQ defined in Kconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
