Commit Graph

1074 Commits

Author SHA1 Message Date
Kim Phillips
e56143e54f powerpc/mpc85xx: sparse fixes
fsl_corenet_serdes.c:485:6: warning: symbol '__soc_serdes_init' was not declared. Should it be static?
cpu_init.c:185:6: warning: symbol 'invalidate_cpc' was not declared. Should it be static?
bcsr.c:28:27: warning: non-ANSI function declaration of function 'enable_8568mds_duart'
bcsr.c:39:33: warning: non-ANSI function declaration of function 'enable_8568mds_flash_write'
bcsr.c:46:34: warning: non-ANSI function declaration of function 'disable_8568mds_flash_write'
bcsr.c:53:29: warning: non-ANSI function declaration of function 'enable_8568mds_qe_mdio'
bcsr.c:28:33: warning: non-ANSI function declaration of function 'enable_8569mds_flash_write'
bcsr.c:33:34: warning: non-ANSI function declaration of function 'disable_8569mds_flash_write'
bcsr.c:38:28: warning: non-ANSI function declaration of function 'enable_8569mds_qe_uec'
bcsr.c:63:47: warning: non-ANSI function declaration of function 'disable_8569mds_brd_eeprom_write_protect'
ngpixis.c:245:1: error: directive in argument list
ngpixis.c:247:1: error: directive in argument list

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-11-04 11:00:36 -07:00
Jason Jin
f9a2d79337 ColdFire: Update the lds file for M54418TWR board.
The M54418TWR lds file  need to update since commit:

8b493a5236

common: Discard the __u_boot_cmd section

The command declaration now uses the new LG-array method to generate
list of commands. Thus the __u_boot_cmd section is now superseded and
redundant and therefore can be removed. Also, remove externed symbols
associated with this section from include/command.h .

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-10-29 22:08:09 +08:00
Albert ARIBAUD
f04821a8ca Merge remote-tracking branch 'u-boot-imx/master' 2012-10-27 11:43:17 +02:00
Fabio Estevam
e00c89df06 mx25pdk: Add Ethernet support
mx25pdk has a Ethernet port that is connected to its internal FEC controller.

In order to power up the Ethernet PHY (DP83640) it is necessary to communicate
with the MC34704 PMIC via I2C.

Make the FEC ethernet port functional

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-26 16:28:08 +02:00
Fabio Estevam
af2a4093cb mx25pdk: Add esdhc support
mx25pdk has a SD/MMC slot connected to esdhc1.

Add support for it and allow the environment variables to be saved into SD/MMC.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-26 16:28:07 +02:00
Stefano Babic
b736e4b929 ARM: Fix start.S when used with SPL in arm1136
This patch modifies start.S for the arm1136 to make it
conform to start.S  in armv7 architecture, to make it
usable if the SPL framework is used.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-10-26 16:27:58 +02:00
Alison Wang
186fc4db26 ColdFire: Add Freescale MCF54418TWR ColdFire development board support
Add Freescale MCF54418TWR ColdFire development board support.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Alison Wang <b18965@freescale.com>
2012-10-24 22:27:46 +08:00
Tom Rini
c7656bab41 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx 2012-10-22 16:54:38 -07:00
York Sun
ee52b188ca powerpc/t4qds: Add T4QDS board
The T4240QDS is a high-performance computing evaluation, development and
test platform supporting the T4240 QorIQ Power Architecture™ processor.

SERDES Connections
  32 lanes grouped into four 8-lane banks
  Two “front side” banks dedicated to Ethernet
  Two “back side” banks dedicated to other protocols
DDR Controllers
  Three independant 64-bit DDR3 controllers
  Supports rates up to 2133 MHz data-rate
  Supports two DDR3/DDR3LP UDIMM/RDIMMs per controller
QIXIS System Logic FPGA

Each DDR controller has two DIMM slots. The first slot of each controller
has up to 4 chip selects to support single-, dual- and quad-rank DIMMs.
The second slot has only 2 chip selects to support single- and dual-rank
DIMMs. At any given time, up to total 4 chip selects can be used.

Detail information can be found in doc/README.t4qds

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 15:52:46 -05:00
Shaveta Leekha
aa42cb71fa board/freescale/common: VSC3316/VSC3308 initialization code
Add code for configuring VSC3316/3308 crosspoint switches
Add README to understand the APIs

   - VSC 3316/3308 is a low-power, low-cost asynchronous crosspoint switch
     capable of data rates upto 11.5Gbps. VSC3316 has 16 input and 16
     output ports whereas VSC3308 has 8 input and 8 output ports.
     Programming of these devices are performed by two-wire or four-wire
     serial interface.

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:21 -05:00
Shengzhou Liu
e4de13e38a powerpc/board: add present2 register definition for QIXIS
According to new QIXIS system definition, update QIXIS registers set
to add present2 register instead of obsolete ctl_sys2.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 14:31:14 -05:00
Marek Vasut
8b493a5236 common: Discard the __u_boot_cmd section
The command declaration now uses the new LG-array method to generate
list of commands. Thus the __u_boot_cmd section is now superseded and
redundant and therefore can be removed. Also, remove externed symbols
associated with this section from include/command.h .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-22 08:29:42 -07:00
Marek Vasut
556751427b common: Add .u_boot_list into all linker files
Add section for the linker-generated lists into all possible linker
files, so that everyone can easily use these lists. This is mostly
a mechanical adjustment.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2012-10-22 08:29:42 -07:00
Prabhakar Kushwaha
9f26fd7947 board/freescale/common:QIXIS:Fix magic number usage
QIXIS FPGA layout defines the  address of registers but The actual register bit
implementation is board-specific,

So avoid use of magic numbers as it may vary across different boards's QIXIS
FPGA implementation.
Also, Avoid board specific defines in common/qixis.h

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-10-22 03:04:28 -05:00
Jason Jin
87c9b18687 ColdFire: Fix the build error for Freescale m5282evb board.
Clean up the lds file and fix the environment build error.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2012-10-19 23:52:09 +08:00
Eric Nelson
e58010b554 i.MX6: mx6qsabrelite: Add splash screen support
Adds support for HDMI, two LVDS panels and one RGB panel to
the SABRE-Lite board.

Displays supported:
         HDMI		- 1024 x 768 for maximum compatibility
         Hannstar-XGA   - 1024 x 768 LVDS (Freescale part number MCIMX-LVDS1)
         wsvga-lvds     - 1024 x 600 LVDS (Boundary p/n Nit6X_1024x600)
         wvga-rgb       - 800 x 480 RGB (Boundary p/n Nit6X_800x480)

Since the ipuv3_fb display driver currently supports only a single display,
this code auto-detects panel by probing the HDMI Phy for Hot Plug Detect
or the I2C touch controller of the LVDS and RGB displays in the priority
listed above.

Setting 'panel' environment variable to one of the names above will
override auto-detection.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-16 12:35:12 +02:00
Eric Nelson
08fd6a3580 i.MX: ipufb: add const to fb_videomode declarations
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-16 12:35:11 +02:00
Eric Nelson
6e14232010 i.MX: declare iomux_v3_cfg_t arrays as const
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-10-16 12:35:11 +02:00
Fabio Estevam
dce67bd548 mx6qsabreauto: Pass the board revision to the kernel
The kernel from Freescale expects that the bootloader passes the board revision.

Read the board revision and pass it via get_board_rev().

Without passing the board revision the kernel does not operate properly as the
initialization of peripherals are different in revA versus revB boards.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-16 12:35:11 +02:00
Benoît Thébaudeau
a2ac1b3a7d mxc: Fix SDHC multi-instance clock
On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not
suitable for the multi-instance use case (initialization made directly with
fsl_esdhc_initialize()).

This patch fixes this issue by adding a configuration field for the SDHC input
clock frequency.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Jason Liu <r64343@freescale.com>
Cc: Matt Sealey <matt@genesi-usa.com>
Cc: Andy Fleming <afleming@gmail.com>
2012-10-16 12:35:10 +02:00
Benoît Thébaudeau
151d63cb91 mx35: Clean up lowlevel_init
Clean up mx35 lowlevel_init:
 - Indent with tabs.
 - Fix comments.
 - Use defined values instead of literal constants.
 - Use defined macros instead of duplicating code.
 - Use macro parameters with default values instead of #define'd configs.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-16 12:35:10 +02:00
Fabio Estevam
fe5ebe97fa mx6qsabreauto: Add Ethernet support
mx6qsabreauto has a AR8031 Gigabit PHY.

Add support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-15 11:54:14 -07:00
Benoît Thébaudeau
9e0081d573 mx31: Fix PDR0_CSI_PODF
The CSI PODF bit-field used by the previous code for the i.MX31 CCM PDR0
register is actually composed of two bit-fields: one pre-divider and one
post-divider. This patch fixes the CCM access macros and the code using them
accordingly.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
2012-10-15 11:54:14 -07:00
Benoît Thébaudeau
833b6435de mx5/6: Define default SoC input clock frequencies
Define default SoC input clock frequencies for i.MX5/6 in order to get rid of
duplicated definitions.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jason Liu <r64343@freescale.com>
Cc: Matt Sealey <matt@genesi-usa.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-15 11:54:10 -07:00
Fabio Estevam
7dd6545da7 mx6q: Add basic support for mx6qsabreauto
mx6qsabreauto is a board based on mx6q SoC with the following features:
- 2GB of DDR3
- 2 USB ports
- 1 HDMI output port
- SPI NOR
- 2 LVDS LCD ports
- Gigabit Ethernet
- Camera
- eMMC and SD card slot
- Multichannel Audio
- CAN
- SATA
- NAND
- PCIE
- Video Input

Add very basic support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-15 11:54:09 -07:00
Fabio Estevam
e72d617860 mx6qsabresd: Add 8-bit USDHC support
USDHC3 has 8 pins wired in mx6qsabresd. Configure the extra pins.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-15 11:54:08 -07:00
Fabio Estevam
a0d21fc01a mx6qsabresd: Add Ethernet support
mx6qsabresd has a AR8031 Gigabit PHY.

Add support for it.

Also increase CONFIG_SYS_MALLOC_LEN so that FEC buffer allocation does not fail.

Tested on 1Gbp and 100Mbps networks.

Suggested-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2012-10-15 11:54:08 -07:00
Fabio Estevam
7891e258d4 mx6: Add basic support for mx6qsabresd board.
mx6qsabresd is a board based on mx6q SoC with the following features:
- 1GB of DDR3
- 1 USB OTG port
- 1 HDMI output port
- SPI NOR
- LVDS panel
- Gigabit Ethernet
- Camera Connector
- eMMC and SD card slot
- Audio

Add very basic support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-15 11:54:08 -07:00
Fabio Estevam
af7ec0b058 mx6q: Factor out common DDR3 init code
Factor out common DDR3 initialization code, allowing easier maintainance of such
scripts.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-10-15 11:54:08 -07:00
Albert ARIBAUD
1c27059a2f Merge remote-tracking branch 'u-boot/master' 2012-09-30 23:49:17 +02:00
Tom Rini
5675b50916 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2012-09-25 12:23:55 -07:00
Fabio Estevam
5436eaeab9 mx28evk: Remove fecmxc_mii_postcall()
fecmxc_mii_postcall() is specific to the KSZ9021 PHY on m28evk and
should not be used on mx28evk, which has LAN8270 instead.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-09-24 10:45:41 +02:00
Benoît Thébaudeau
362635bd50 mx51evk: Add CONFIG_REVISION_TAG
FSL 2.6.35 kernel assumes that the bootloader passes the CONFIG_REVISION_TAG
information.

If this data is not present, the kernel misconfigures the TZIC, which results in
the timer interrupt handler never being called, so the kernel deadlocks while
calibrating its delay.

Suggested-by: Greg Topmiller <Greg.Topmiller@jdsu.com>
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-09-23 19:55:06 +02:00
Tom Rini
495dbd72dd Merge branch 'master' of git://git.denx.de/u-boot-arm 2012-09-21 14:53:13 -07:00
Alison Wang
198cafbf2c ColdFire: Clean up checkpatch warnings for MCF54451 and MCF54455
Signed-off-by: Alison Wang <b18965@freescale.com>
2012-09-20 20:39:27 +08:00
Alison Wang
a4110eecf2 ColdFire: Clean up checkpatch warnings for MCF547x and MCF548x
Signed-off-by: Alison Wang <b18965@freescale.com>
2012-09-20 20:39:27 +08:00
Alison Wang
c6d8863015 ColdFire: Clean up checkpatch warnings for MCF523x
Signed-off-by: Alison Wang <b18965@freescale.com>
2012-09-20 20:39:27 +08:00
Alison Wang
aa0d99fc28 ColdFire: Clean up checkpatch warnings for MCF532x/MCF537x/MCF5301x
Signed-off-by: Alison Wang <b18965@freescale.com>
2012-09-20 20:39:27 +08:00
Alison Wang
32dbaafa5a ColdFire: Clean up checkpatch warnings for MCF52x2
Signed-off-by: Alison Wang <b18965@freescale.com>
2012-09-20 20:39:26 +08:00
Alison Wang
849fc42471 ColdFire: Clean up checkpatch warnings for MCF5227x
Signed-off-by: Alison Wang <b18965@freescale.com>
2012-09-20 20:39:26 +08:00
Ira W. Snyder
db1fc7d28e mpc8308rdb: add support for eSDHC MMC controller
Add support for the onboard eSDHC MMC controller. The hardware on the
MPC8308RDB has the following errata:

- ESDHC111: manual asynchronous CMD12 is broken
- DMA is broken (PIO works)

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>

[added include fsl_esdhc header to prevent implicit declarations of
fsl_esdhc_mmc_init() and fdt_fixup_esdhc()]

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-09-18 16:16:45 -05:00
Ira W. Snyder
ea1ea54e35 mpc8308rdb: add support for Spansion SPI flash on header J8
The SPI pins are routed to header J8 for testing SPI functionality. A
Spansion flash has been wired up and tested on this header.

This patch breaks support for the second TSEC interface, since the GPIO
pin used as a chip select is pinmuxed with some of the TSEC pins.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-09-18 16:16:44 -05:00
Fabio Estevam
1d9b033269 mx35pdk: README: Remove NAND references
Booting from NAND is currently not supported, so remove its references.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-09-17 13:17:17 +02:00
Stefano Babic
3292539e7d MX35: mx35pdk: add support for MMC
Add support for SD card and change the default
environment due to increased u-boot size.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-09-10 14:32:47 +02:00
Ashok Kumar Reddy
5d20881eec mx6qsabrelite:Use IMX_GPIO_NR Macro
Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
2012-09-10 14:25:38 +02:00
Fabio Estevam
ddfcc810d3 mx28evk: Convert to mxs_adjust_memory_params()
Recent conversion from mx28_adjust_memory_params to mxs_adjust_memory_params
missed to update mx28evk, which caused the board not to boot.

Apply the conversion so that the board can boot again.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-09-04 11:57:56 +02:00
Otavio Salvador
4f434e3d6d MX28: mx28evk: Align SSP clock speed
Align the SSP clock speed with oscilator to achieve higher transfer
stability.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Marek Vasut <marex@denx.de>
2012-09-04 11:57:56 +02:00
Benoît Thébaudeau
16e43f354d fsl_esdhc: Remove cache snooping for i.MX
The cache snooping feature of Freescale's eSDHC IP is not available on i.MX, so
disable it globally for this architecture. This avoids setting no_snoop for all
i.MX boards, and it prevents setting a reserved bit of a reserved register if
fsl_esdhc_mmc_init() is used on i.MX, like in
arch/arm/cpu/armv7/imx-common/cpu.c/cpu_mmc_init().

Since no_snoop was only used on i.MX, get rid of it BTW.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
2012-09-01 14:58:30 +02:00
Ashok Kumar Reddy
925507088b mx5:Use IMX_GPIO_NR macro
Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
2012-09-01 14:58:30 +02:00
Ashok Kumar Reddy
acbdea2ece mx6qarm2:Use IMX_GPIO_NR macro
Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:29 +02:00
Otavio Salvador
72f8ebf17e mxs: Rename 'mx28_dram_init' to 'mxs_dram_init'
The DRAM initialization, after SPL has complete, is exactly the same
for all mxs SoCs so we should name it accordinly.

The following boards has been changed:

 * apx4devkit
 * m28evk
 * mx28evk
 * sc_sps_1

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com>
2012-09-01 14:58:28 +02:00
Fabio Estevam
5c8d14dfd9 mx53ard: Use IMX_GPIO_NR macro
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-09-01 14:58:28 +02:00
Fabio Estevam
5179a26848 mx51evk: Use IMX_GPIO_NR macro
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-09-01 14:58:28 +02:00
Fabio Estevam
3ef0a312c0 mx53loco: Use IMX_GPIO_NR macro
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-09-01 14:58:28 +02:00
Stefano Babic
5fecb36ca0 MX: Set a common gpio.h for all i.MX
Each i.MX has its own gpio.h, defining the same structure.
The internal GPIO controller has the same layout
(at least for the register used by u-boot) and can be shared.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Tested-by: Matt Sealey <matt@genesi-usa.com>
2012-09-01 14:58:27 +02:00
Troy Kisky
0aff384b14 mx53evk: add boot_mode support
This allows a watchdog reset to start the ROM's
usb/serial downloader, or boot from an sdcard.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-09-01 14:58:26 +02:00
Troy Kisky
bb05b40b06 mx6qsabrelite: add boot_mode support
This allows a watchdog reset to start the ROM's
usb downloader, or boot from an sdcard.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-09-01 14:58:26 +02:00
Troy Kisky
d1c679a46d iomux: move IOMUX_GPR13_xxx defines
Move mx6 specific defines to arch-mx6 directory.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:26 +02:00
Benoît Thébaudeau
34a31bf52b mx35: Fix typo on EDIO
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:26 +02:00
Marek Vasut
7fb1ed0eab MX28: Move the u-boot.bd info CPUDIR/SOCDIR
This gets us rid of duplication of the same file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01 14:58:18 +02:00
Fabio Estevam
1e080988d0 mx51evk: do not overwrite the console
On this board, the console is always set to the serial line.
Do not allow to overwrite it when video is enabled.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-09-01 14:58:18 +02:00
Stefano Babic
3e0773708d MX5: mx53loco: do not overwrite the console
On this board, the console is always set to the serial line.
Do not allow to overwrite it when video is enabled.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-09-01 14:58:18 +02:00
Otavio Salvador
1e0cf5c34b mxs: Reowork SPL to use 'mxs' prefix for methods
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:17 +02:00
Otavio Salvador
9c471142bc mxs: prefix register structs with 'mxs' prefix
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01 14:58:17 +02:00
Scott Wood
d69dba367a powerpc/mpc85xx/p1_p2_rdb: add all LAWs during SPL
LAW init is skipped in the SPL payload because it's assumed that the SPL
has taken care of it -- so make sure the SPL loads all the LAWs as is
done on other boards.

This bug was introduced by:

  commit 4589728e21
  Author: Kumar Gala <galak@kernel.crashing.org>
  Date:   Fri Nov 11 08:14:53 2011 -0600

    powerpc/85xx: Fix builds of P1020/P2020RDB-PC_36BIT_NAND

    Size grew a bit so nand-spl didn't fit in 4k, reduce done by removing
    LAW entries not needed during SPL phase.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2012-08-23 12:49:48 -05:00
Timur Tabi
055ce08004 powerpc/85xx: remove support for the Freescale P3060
The P3060 was cancelled before it went into production, so there's no point
in supporting it.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 12:16:53 -05:00
Timur Tabi
61fc52b660 powerpc/85xx: get rid of enum board_slots in P4080 MDIO driver
enum board_slots contained six values, where SLOT1 == 1, SLOT2 == 2, and
so on.  This is pointless, so remove it.  Also move the lane_to_slot[]
array to the top of the file so that it can be used by other functions.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:19 -05:00
Timur Tabi
45b092d301 powerpc/85xx: introduce function serdes_device_from_fm_port()
In order to figure out which SerDes lane a given Fman port is connected
to, we need a function that maps the fm_port namespace to the srds_prtcl
namespace.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:18 -05:00
Paul Gortmaker
a2af6a7a84 mpc85xx: use LCRR_DBYP define instead of raw constant
Using the raw value of 0x80000000 directly in the code can
lead to "count the zeros" bugs like that fixed in commit
718e9d13b98 ("MPC85xxCDS: Fix missing LCRR_DBYP bits for
66-133MHz LBC")

Change all existing raw values to use the symbolic value of
LCRR_DBYP instead.

Cc: Kumar Gala <galak@kernel.crashing.org>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:18 -05:00
Matthew McClintock
c8f9802a72 p1010rdb: fix ddr values for p1014rdb (setting bus width to 16bit)
There was an extra 0 in front of the value we were using to mask,
remove it to improve the code.

Also fix the value written to ddr_sdram_cfg to set the bus width
properly to 16 bits

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:16 -05:00
Shaohui Xie
5d898a00f3 powerpc/CoreNet: add tool to support pbl image build.
Provides a tool to build boot Image for PBL(Pre boot loader) which is
used on Freescale CoreNet SoCs, PBL can be used to load some instructions
and/or data for pre-initialization. The default output image is u-boot.pbl,
for more details please refer to doc/README.pblimage.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:16 -05:00
Liu Gang
461632bd71 powerpc/corenet_ds: Slave module for boot from PCIE
When boot from PCIE, slave's core should be in holdoff after powered on for
some specific requirements. Master will release the slave's core at the
right time by PCIE interface.

Slave's ucode and ENV can be stored in master's memory space, then slave
can fetch them through PCIE interface. For the corenet platform, ucode is
for Fman.

NOTE: Because the slave can not erase, write master's NOR flash by
	  PCIE interface, so it can not modify the ENV parameters stored
	  in master's NOR flash using "saveenv" or other commands.

environment and requirement:

master:
	1. NOR flash for its own u-boot image, ucode and ENV space.
	2. Slave's u-boot image is in master NOR flash.
	3. Put the slave's ucode and ENV into it's own memory space.
	4. Normally boot from local NOR flash.
	5. Configure PCIE system if needed.
slave:
	1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
	2. Boot location should be set to one PCIE interface by RCW.
	3. RCW should configure the SerDes, PCIE interfaces correctly.
	4. Must set all the cores in holdoff by RCW.
	5. Must be powered on before master's boot.

For the slave module, need to finish these processes:
	1. Set the boot location to one PCIE interface by RCW.
    2. Set a specific TLB entry for the boot process.
	3. Set a LAW entry with the TargetID of one PCIE for the boot.
	4. Set a specific TLB entry in order to fetch ucode and ENV from
	   master.
	5. Set a LAW entry with the TargetID one of the PCIE ports for
	   ucode and ENV.
	6. Slave's u-boot image should be generated specifically by
	   make xxxx_SRIO_PCIE_BOOT_config.
	   This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.

In addition, the processes are very similar between boot from SRIO and
boot from PCIE. Some configurations like the address spaces can be set to
the same. So the module of boot from PCIE was added based on the existing
module of boot from SRIO, and the following changes were needed:
	1. Updated the README.srio-boot-corenet to add descriptions about
	   boot from PCIE, and change the name to
	   README.srio-pcie-boot-corenet.
	2. Changed the compile config "xxxx_SRIOBOOT_SLAVE" to
	   "xxxx_SRIO_PCIE_BOOT", and the image builded with
	   "xxxx_SRIO_PCIE_BOOT" can support both the boot from SRIO and
	   from PCIE.
	3. Updated other macros and documents if needed to add information
	   about boot from PCIE.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:15 -05:00
Liu Gang
81fa73bab0 powerpc/corenet_ds: Get rid of the CONFIG_SRIOBOOT_SLAVE_PORTx macro
When compile the slave image for boot from SRIO, no longer need to
specify which SRIO port it will boot from. The code will get this
information from RCW and then finishes corresponding configurations.

This has the following advantages:
	1. No longer need to rebuild an image when change the SRIO port for
	   boot from SRIO, just rewrite the new RCW with selected port,
	   then the code will get the port information by reading new RCW.
	2. It will be easier to support other boot location options, for
	   example, boot from PCIE.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-23 10:24:14 -05:00
Hongtao Jia
308bc61db7 powerpc/sgmii: To support PHY link state auto detect in SGMII mode
PHYs on SGMII riser card are used in SGMII mode with different external
IRQs from eTSEC. This means in SGMII mode phy-handle and phy-connection-type
under ethernet node should be updated. Otherwise the PHY interrupt can not
be handled therefor PHY link state change can not be auto detected.

For we have seperate SGMII PHY nodes, ethernet PHY reg fixup is not needed
but it's still be kept to guarantee the sgmii mode could work with old
device tree.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-08 18:32:15 -05:00
Shaohui Xie
145dbc0250 powerpc/p2041: configure the CPLD lane_mux according to RCW
Lane muxing on p2041 is controlled by a reg in CPLD, offset of this reg
is 0xc, CPLD supports SATA by default, we should re-configure the lane
muxing according to RCW, which indicates what SerDes protocol it is running.

Default lane muxing map is as below:
Lane G on bank1 routes to SGMII, controlled by bit 1 of the reg;
Lane A on bank2 routes to AURORA, controlled by bit 0 of the reg;
Lane C/D on bank2 routes to SATA0 and SATA1, controlled by bit 2
and bit 3 respectively.

Default value of these bits for lane muxing is '1', we should set or clear
these bits accoring to RCW.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-08 17:13:39 -05:00
Timur Tabi
7a946961c7 powerpc/p1022ds: fix DIU/LBC switching with NAND enabled
In order for indirect mode on the PIXIS to work properly, both chip selects
need to be set to GPCM mode, otherwise writes to the chip select base
addresses will not actually post to the local bus -- they'll go to the
NAND controller instead.  Therefore, we need to set BR0 and BR1 to GPCM
mode before switching to indirect mode.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-08 17:13:37 -05:00
Matthew McClintock
af2536088e powerpc/p1022ds: add support for SPI and SD boot
Add TLB mappings, board target options, and configuration items
need for SPI/SD boot.

Since P1022DS RevB board, the NOR flash have been changed to 16 bit/28bit
address flash, therefore, when SDHC/ESPI booting and access to eLBC,
the PMUXCR[0~1] must be set to 10b, and PMUXCR[9~10] must be set to
00b for them.

Configure the PX_BRDCFG0[0~1] to 10b which is connected to
SPI devices as SPI_CS(0:3)_B.

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Jiang Yutang <b14898@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-08-08 17:13:37 -05:00
Troy Kisky
9c06782863 mx6qsabrelite: add i2c multi-bus support
This includes bus recovery support.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Jason Liu <r64343@freescale.com>
2012-07-31 08:01:09 +02:00
Troy Kisky
af2a35fb1f i.mx: iomux-v3.h: move to imx-common include directory
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-07-31 08:00:19 +02:00
Wolfgang Denk
b98b611502 Merge branch 'next' of git://git.denx.de/u-boot
* 'next' of git://git.denx.de/u-boot:
  MPC8xx: Fixup warning in arch/powerpc/cpu/mpc8xx/cpu.c
  doc: cleanup - move board READMEs into respective board directories
  net: sh_eth: add support for SH7757's GETHER
  net: sh_eth: modify the definitions of regsiter
  net: sh_eth: add SH_ETH_TYPE_ condition
  net: sh_eth: clean up for the SH7757's code
  net: fec_mxc: Fix MDC for xMII
  net: fec_mxc: Fix setting of RCR for xMII
  net: nfs: make NFS_TIMEOUT configurable
  net: Inline the new eth_setenv_enetaddr_by_index function
  net: allow setting env enetaddr from net device setting
  net/designware: Consecutive writes to the same register to be avoided
  CACHE: net: asix: Fix asix driver to work with data cache on
  net: phy: micrel: make ksz9021 phy accessible
  net: abort network initialization if the PHY driver fails
  phylib: phy_startup() should return an error code on failure
  net: tftp: fix type of block arg to store_block

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-30 20:39:52 +02:00
Wolfgang Denk
702e6014f1 doc: cleanup - move board READMEs into respective board directories
Also drop a few files referring to no longer / not yet supported
boards.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
Cc: Andy Fleming <afleming@gmail.com>
Cc: Jason Jin <jason.jin@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2012-07-29 15:42:02 +02:00
Wolfgang Denk
00c60f9131 Minor Coding Style Cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-22 21:58:26 +02:00
Fabio Estevam
175a7d2778 mx28evk: Add I2C support
Add I2C support.

Tested by placing a 24LC16 EEPROM into the U50 slot which comes empty from factory.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-07-11 10:54:53 +02:00
Troy Kisky
3174689be2 mx6qsabrelite: add i2c support
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-07-11 10:54:52 +02:00
Wolfgang Denk
3fe63839f3 Minor Coding Style cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-10 09:18:33 +02:00
Wolfgang Denk
50cd93b250 Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: (212 commits)
  ARM: cache: Move the cp15 CR register read before flushing the cache.
  ARM: introduce arch_early_init_r()
  PXA: Enable CONFIG_PREBOOT on zipitz2
  ARM: mx28: Remove CONFIG_ARCH_CPU_INIT
  No need to define CONFIG_ARCH_CPU_INIT.
  add new board vl_ma2sc
  MTD: SPEAr SMI: Add write support for length < 4 bytes
  i2c: designware_i2c.c: Add support for the "i2c probe" command
  rtc/m41t62: Add support for M41T82 with HT (Halt Update)
  SPL: ARM: spear: Add SPL support for SPEAr600 platform
  Makefile: Add u-boot.spr build target (SPEAr)
  SPL: ARM: spear: Remove some objects from SPL build
  SPL: lib/Makefile: Add crc32.c to SPL build
  SPL: common/Makefile: Add image.c to SPL build
  arm: Don't use printf() in SPL builds
  GPIO: Add SPEAr GPIO driver
  net: Multiple updates/enhancements to designware.c
  cleanup/SPEAr: Define configuration flags more elegantly
  cleanup/SPEAr: Remove unnecessary parenthesis
  SPEAr: Correct SoC ID offset in misc configuration space
  SPEAr: explicitly select clk src for UART
  SPEAr: Remove CONFIG_MTD_NAND_VERIFY_WRITE to speed up NAND access
  SPEAr: Enable ONFI nand flash detection for spear3xx and 6xx and evb
  SPEAr: Enable CONFIG_SYS_FLASH_EMPTY_INFO macro
  SPEAr: Correct the definition of CONFIG_SYS_MONITOR_BASE
  SPEAr: Enable CONFIG_SYS_FLASH_PROTECTION
  SPEAr: Enable dcache for fast file transfer
  SPEAr: Enable autoneg for ethernet
  SPEAr: Enable udc and usb-console support only for usbtty configuration
  SPEAr: Enable usb device high speed support
  SPEAr: Initialize SNOR in early_board_init_f
  SPEAr: Change the default environment variables
  SPEAr: Remove unused flag (CONFIG_SYS_HZ_CLOCK)
  SPEAr: Add configuration options for spear3xx and spear6xx boards
  SPEAr: Add basic arch related support for SPEAr SoCs
  SPEAr: Add interface information in initialization
  SPEAr: Add macb driver support for spear310 and spear320
  SPEAr: Configure network support for spear SoCs
  SPEAr: Place ethaddr write and read within CONFIG_CMD_NET
  SPEAr: Eliminate dependency on Xloader table
  SPEAr: Fix ARM relocation support
  st_smi: Fixed page size for Winbond W25Q128FV flash
  st_smi: Change timeout loop implementation
  st_smi: Fix bug in flash_print_info()
  st_smi: Change the flash probing method
  st_smi: Removed no needed dependency on ST_M25Pxx_ID
  st_smi: Fix smi read status
  st_smi: Move status register read before modifying ctrl register
  st_smi: Read status until timeout happens
  st_smi: Enhance the error handling
  st_smi: Change SMI timeout values
  st_smi: Return error in case TFF is not set
  st_smi: Add support for SPEAr SMI driver
  mtd/NAND: Remove obsolete SPEAr specific NAND drivers
  SPEAr: Configure FSMC driver for NAND interface
  mtd/NAND: Add FSMC driver support
  arm/km: remove calls to kw_gpio_* in board_early_init_f
  arm/km: add implementation for read_dip_switch
  arm/km: support the 2 PCIe fpga resets
  arm/km: skip FPGA config when already configured
  arm/km: redefine piggy 4 reg names to avoid conflicts
  arm/km: cleanup km_kirkwood boards
  arm/km: enable BOCO2 FPGA download support
  arm/km: remove portl2.h and use km_kirkwood instead
  arm/km: convert mgcoge3un target to km_kirkwood
  arm/km: add kmcoge5un board support
  arm/km: add kmnusa board support
  arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0
  cm-t35: fix incorrect NAND_ECC layout selection
  ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls.
  ARM: OMAP4/5: Move USB pads to essential list.
  ARM: OMAP4/5: Move USB clocks to essential group.
  ARM: OMAP4/5: Move gpmc clocks to essential group.
  ARM: OMAP4+: Move external phy initialisations to arch specific place.
  omap4: Use a smaller M,N couple for IVA DPLL
  da850/omap-l138: Enable auto negotiation in RMII mode
  omap: am33xx: accomodate input clocks other than 24 Mhz
  omap: emif: fix bug in manufacturer code test
  omap: emif: deal with rams that return duplicate mr data on all byte lanes
  OMAP4+: Force DDR in self-refresh after warm reset
  OMAP4+: Handle sdram init after warm reset
  ARM: OMAP3+: Detect reset type
  arm: bugfix: Move vector table before jumping relocated code
  Kirkwood: Add support for Ka-Ro TK71
  arm/km: use spi claim bus to switch between SPI and NAND
  arm/kirkwood: protect the ENV_SPI #defines
  ARM: don't probe PHY address for LaCie boards
  lacie_kw: fix CONFIG_SYS_KWD_CONFIG for inetspace_v2
  lacie_kw: fix SDRAM banks number for net2big_v2
  Kirkwood: add lschlv2 and lsxhl board support
  net: add helper to generate random mac address
  net: use common rand()/srand() functions
  lib: add rand() function
  kwboot: boot kirkwood SoCs over a serial link
  kw_spi: add weak functions board_spi_claim/release_bus
  kw_spi: support spi_claim/release_bus functions
  kw_spi: backup and reset the MPP of the chosen CS pin
  kirkwood: fix calls to kirkwood_mpp_conf
  kirkwood: add save functionality kirkwood_mpp_conf function
  km_arm: use filesize for erase in update command
  arm/km: enable mii cmd
  arm/km: remove CONFIG_RESET_PHY_R
  arm/km: change maintainer for mgcoge3un
  arm/km: fix wrong comment in SDRAM config for mgcoge3un
  arm/km: use ARRAY_SIZE macro
  arm/km: rename CONFIG option CONFIG_KM_DEF_ENV_UPDATE
  arm/km: add piggy mac adress offset for mgcoge3un
  arm/km: add board type to boards.cfg
  AT91SAM9*: Change kernel address in dataflash to match u-boot's size
  ATMEL/PIO: Enable new feature of PIO on Atmel device
  ehci-atmel: fix compiler warning
  AT91: at91sam9m10g45ek : Enable EHCI instead OHCI
  Atmel : usb : add EHCI driver for Atmel SoC
  Fix: AT91SAM9263 nor flash usage
  Fix: broken boot message at serial line on AT91SAM9263-EK board
  i.MX6 USDHC: Use the ESDHC clock
  mx28evk: Fix boot by adjusting HW_DRAM_CTL29 register
  i.MX28: Add function to adjust memory parameters
  mx28evk: Fix PSWITCH key position
  mx53smd: Remove CONFIG_SYS_I2C_SLAVE definition
  mx53loco: Remove CONFIG_SYS_I2C_SLAVE definition
  mx53evk: Remove CONFIG_SYS_I2C_SLAVE definition
  mx53ard: Remove CONFIG_SYS_I2C_SLAVE definition
  mx35pdk: Remove CONFIG_SYS_I2C_SLAVE definition
  imx31_phycore: Remove CONFIG_SYS_I2C_SLAVE definition
  mx53ard: Remove unused CONFIG_MII_GASKET
  mx6: Avoid writing to read-only bits in imximage.cfg
  m28evk: use same notation to alloc the 128kB stack
  ...

Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-08 19:26:33 +02:00
Fabio Estevam
f69b0653ac mx28evk: Fix boot by adjusting HW_DRAM_CTL29 register
commit acc4959fc1 (Revert "i.MX28: Enable additional DRAM address bits")
broke mx28evk boot.

Fix it by properly adjusting the HW_DRAM_CTL29 register value.

Suggested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-07-07 14:07:29 +02:00
Vikram Narayanan
b29da17494 mx6: Avoid writing to read-only bits in imximage.cfg
If in case this is valid according to the latest datasheet, ignore this patch.
Acked-by: Marek Vasut <marex@denx.de>
2012-07-07 14:07:27 +02:00
Fabio Estevam
001533eb0e mx6qsabrelite: Remove unused SOBJS
There is no .S file in this directory, so just remove SOBJS.

Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
2012-07-07 14:07:27 +02:00
Fabio Estevam
ef0ed6a48d mx6qarm2: Remove unused SOBJS
There is no .S file in this directory, so just remove SOBJS.

Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
2012-07-07 14:07:27 +02:00
Fabio Estevam
cf0a8ec227 mx51evk: Remove unused SOBJS
There is no .S file in this directory, so just remove SOBJS.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-07 14:07:26 +02:00
Fabio Estevam
d0004a687c mx53smd: Remove unused SOBJS
There is no .S file in this directory, so just remove SOBJS.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-07 14:07:26 +02:00
Fabio Estevam
5094fbf79b mx53ard: Remove unused SOBJS
There is no .S file in this directory, so just remove SOBJS.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-07 14:07:26 +02:00
Fabio Estevam
b4896cd618 mx53evk: Remove unused SOBJS
There is no .S file in this directory, so just remove SOBJS.

Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-07 14:07:26 +02:00
Fabio Estevam
2fb563f2f5 mx53loco: Remove unused SOBJS
There is no .S file in this directory, so just remove SOBJS.

Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-07-07 14:07:26 +02:00
Fabio Estevam
eae08eb2b5 mx53loco: Fix revision of Dialog boards
Original code was assuming that the fuse revision version for all mx53loco boards
based on Dialog PMIC was the same, which is not the case.

Force the revision of all Dialog-based boards to 0.

This fixes a kernel crash when PMIC is accessed in the 2.6.35 kernel
for Dialog rev E boards.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-07 14:07:25 +02:00
York Sun
48f6a5c348 powerpc/mpc85xx: Ignore E bit for SVR_SOC_VER()
We don't care E bit of SVR in most cases. Clear E bit for SVR_SOC_VER().
This will simplify the coding. Use IS_E_PROCESSOR() to identify SoC with
encryption. Remove all _E entries from SVR list and CPU list.

Signed-off-by: York Sun <yorksun@freescale.com>
2012-07-06 17:30:33 -05:00
Timur Tabi
1fc0d59486 powerpc/85xx: fdt_set_phy_handle() should return an error code
fdt_set_phy_handle() makes several FDT calls that could fail, so it should
not be hiding these errors.

Signed-off-by: Timur Tabi <timur@freescale.com>
2012-07-06 17:30:32 -05:00
Shengzhou Liu
d3de823e54 powerpc/p1010rdb: add readme document for p1010rdb
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
2012-07-06 17:30:31 -05:00
Shengzhou Liu
487e8abbaa powerpc/p1010rdb: update mux config of p1010rdb board
On p1010rdb some signals are muxed for tdm/can/uart/flash.
If we don't set fsl_p1010mux:tdm_can to "can" or "tdm" explicitly,
defaultly we keep spi chip selection to spi-flash instead of to
tdm/slic and disable uart1 when not using flexcan, as well disable sdhc.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
2012-07-06 17:30:29 -05:00
Prabhakar Kushwaha
7530d341c7 powerpc/mpc85xx:Add BSC9131 RDB Support
BSC9131RDB is a Freescale reference design board for BSC9131 SoC. BSC9131 SOC
 is an integrated device that targets Femto base station market. It combines
 Power Architecture e500v2 and DSP StarCore SC3850 core technologies with
 MAPLE-B2F baseband acceleration processing elements

  BSC9131RDB Overview
   -----------------
     -1Gbyte DDR3 (on board DDR)
     -128Mbyte 2K page size NAND Flash
     -256 Kbit M24256 I2C EEPROM
     -128 Mbit SPI Flash memory
     -USB-ULPI
     -eTSEC1: Connected to RGMII PHY
     -eTSEC2: Connected to RGMII PHY
     -DUART interface: supports one UARTs up to 115200 bps for console display
Apart from the above it also consists various peripherals to support DSP
functionalities.

This patch adds support for mainly Power side functionalities and peripherals

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Akhil Goyal <Akhil.Goyal@freescale.com>
Signed-off-by: Rajan Srivastava <rajan.srivastava@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
2012-07-06 17:30:29 -05:00
ramneek mehresh
3d7506fa38 powerpc/85xx: Add USB device-tree fixup for various platforms
Add USB device-tree fixup for following platforms:
MPC8536DS, P1022DS, P1023RDS, P2020COME, P2020DS, P2041RDB, P3060QDS

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
2012-07-06 17:03:25 -05:00
Fabio Estevam
f714b0a911 mx53loco: Add LCD support
Add support for CLAA07LC0ACW LCD that connects to the mx53loco board.

Configure the board to show the Linux logo on the LCD.

Also increase the size of CONFIG_SYS_MALLOC_LEN variable to take into account
the framebuffer usage.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
2012-05-25 10:40:32 +02:00
Fabio Estevam
a1b0e190a3 mx5: Rename mx51_fb_init()
The ipuv3 driver is currently only used on mx51, but it can be extended to work
on mx53 and mx6 as well.

Rename mx51_fb_init(), so that it can be used by other SoCs.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
2012-05-25 10:39:23 +02:00
Fabio Estevam
f1adefd239 mx51evk: Add LCD support
Add support for CLAA07LC0ACW LCD that connects to the mx51evk board.

Configure the board to show the Linux logo on the LCD.

Also increase the size of CONFIG_SYS_MALLOC_LEN variable to take into account
the framebuffer usage.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-05-25 10:06:38 +02:00
Fabio Estevam
6ecaee8201 mx53loco: Remove unneeded gpio_set_value()
There is no need to set the VBUS power enable to 0 first and then to 1.

Set it to 1 in the gpio_direction_output() function.

While at it, use the standard naming convention for the GPIO comment.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-05-15 08:31:34 +02:00
Fabio Estevam
54cd1dee8f mx53loco: Add CONFIG_REVISION_TAG
FSL 2.6.35 kernel assumes that the bootloader passes the CONFIG_REVISION_TAG information.

The kernel uses this data to distinguish between Dialog versus mc34708 based boards,
and also to distinguish between revA and revB of the mc34708 based boards.

Suggested-by: Yu Li <yk@magniel.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:34 +02:00
Fabio Estevam
768a059710 mx53loco: Turn on VUSB regulator
On the mx53loco board with mc34708 PMIC it is necessary to turn on VUSB regulator
so that the mx53 USBH1 PHY receives the 3.3V voltage.

Tested by inserting a USB pen drive in the upper USB slot (USBH1) and then issued the
commands:

usb start

usb info

,which correctly detected and printed the USB pen drive information.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:34 +02:00
Fabio Estevam
5b547f3c20 mx53loco: Add mc34708 support and set mx53 frequency at 1GHz
Add mc34708 support and set mx53 core frequency at its maximum value of 1GHz.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:34 +02:00
Fabio Estevam
ed5157e889 pmic: dialog: Avoid name conflicts
As mx53loco board has two variants: one with Dialog PMIC and another with FSL MC34708 PMIC,
we need to be able to build both drivers.

Change pmic_init() and PMIC_NUM_OF_REGS names to avoid build conflicts when both drivers are present.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:34 +02:00
Eric Nelson
3996a96c5e i.MX6: mx6q_sabrelite: add SATA bindings
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: stefano Babic <sbabic@denx.de>
2012-05-15 08:31:33 +02:00
Lauri Hintsala
ecb7be2985 mx28evk: add NAND support
NAND support is not enabled by default because Eval Kit is not delivered
with NAND chip. To enable NAND support add CONFIG_CMD_NAND to board config.

Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Acked-by: Marek Vasut <marex@denx.de>
2012-05-15 08:31:33 +02:00
Fabio Estevam
e7e337227b mx53loco: Add support for 1GHz operation for DA9053-based boards
There are two types of mx53loco boards: initial boards were built with a Dialog
DA9053 PMIC and more recent version is based on a Freescale MC34708 PMIC.

Add DA9053 PMIC support and adjust the required voltages and clocks for running
the CPU at 1GHz.

Tested on both versions of mx53loco boards.

In the case of a MC34708-based board the CPU operating voltage remains at 800MHz.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by : Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:32 +02:00
Fabio Estevam
1fc56f1cb0 mx53loco: Allow to print CPU information at a later stage
Print CPU information within board_late_init().

This is in preparation for adding 1GHz support, which requires programming a PMIC
via I2C. As I2C is only available after relocation, print the CPU information
later at board_late_init(), so that the CPU frequency can be printed correctly.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:32 +02:00
Eric Nelson
28fdbddc94 i.MX6Q: mx6qsabrelite: Add keypress support to alter boot flow
Uses the 'magic_keys' idiom as described in doc/README.kbd:
	http://lists.denx.de/pipermail/u-boot/2012-April/122502.html

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-05-15 08:31:32 +02:00
Fabio Estevam
bdb9f7604d mx6qsabrelite: No need to set the direction for GPIO3_23 again
There is a 'gpio_direction_output(87, 0);' call previously, so the GPIO direction is
already established.

Use gpio_set_value() for changing the GPIO output then.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
2012-05-15 08:31:31 +02:00
Stefano Babic
f92e4e6c19 MX53: mx53loco: Add SATA support
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <jason.hui@linaro.org>
Acked-by: Jason Liu <jason.hui@linaro.org>
2012-05-15 08:31:31 +02:00
Timur Tabi
5d065c3e10 powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during boot
Most 85xx boards can be built as a 32-bit or a 36-bit.  Current code sometimes
displays which of these is actually built, but it's inconsistent.  This is
especially problematic since the "default" build for a given 85xx board can
be either one, so if you don't see a message, you can't always know which
size is being used.  Not only that, but each board includes code that displays
the message, so there is duplication.

The 'bdinfo' command has been updated to display this information, so
we don't need to display it at boot time.  The board-specific code is
deleted.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-04-24 23:58:34 -05:00
Liu Gang
3f1af81b80 powerpc/corenet_ds: Slave uploads ucode when boot from SRIO
When boot from SRIO, slave's ucode can be stored in master's memory space,
then slave can fetch the ucode image through SRIO interface. For the
corenet platform, ucode is for Fman.

Master needs to:
	1. Put the slave's ucode image into it's own memory space.
	2. Set an inbound SRIO window covered slave's ucode stored in master's
	   memory space.
Slave needs to:
	1. Set a specific TLB entry in order to fetch ucode from master.
	2. Set a LAW entry with the TargetID SRIO1 or SRIO2 for ucode.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
2012-04-24 23:58:33 -05:00
Liu Gang
292dc6c501 powerpc/corenet_ds: Slave module for boot from SRIO
For the powerpc processors with SRIO interface, boot location can be configured
from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash
for u-boot image. The image can be fetched from another processor's memory
space by SRIO link connected between them.

The processor boots from SRIO is slave, the processor boots from normal flash
memory space and can help slave to boot from its memory space is master.
They are different environments and requirements:

master:
	1. NOR flash for its own u-boot image, ucode and ENV space.
	2. Slave's u-boot image in master NOR flash.
	3. Normally boot from local NOR flash.
	4. Configure SRIO switch system if needed.
slave:
	1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
	2. Boot location should be set to SRIO1 or SRIO2 by RCW.
	3. RCW should configure the SerDes, SRIO interfaces correctly.
	4. Slave must be powered on after master's boot.
	5. Must define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE because of no ucode
	   locally.

For the slave module, need to finish these processes:
	1. Set the boot location to SRIO1 or SRIO2 by RCW.
    2. Set a specific TLB entry for the boot process.
	3. Set a LAW entry with the TargetID SRIO1 or SRIO2 for the boot.
	4. Slave's u-boot image should be generated specifically by
	   make xxxx_SRIOBOOT_SLAVE_config.
	   This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
2012-04-24 23:58:33 -05:00
York Sun
1ba62f1017 powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boards
P1010RDB and p1_pc_rdb_pc has incorrect configuration for
CONFIG_DDR_RAW_TIMING. It should be CONFIG_SYS_DDR_RAW_TIMING.
Incorrect setting causes DDR failure in case of SPD absent.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-04-24 23:58:30 -05:00
Chunhe Lan
617e46e3c0 powerpc/p1023rds: Disable nor flash node and enable nand flash node
In the p1023rds, when system boots from nor flash, kernel only accesses nor
flash and can not access nand flash with BR0/OR0; when system boots from
nand flash, kernel only accesses nand flash and can not access nor flash
with BR0/OR0.

Default device tree nor and nand node should have the following structure:

	Example:

		nor_flash: nor@0,0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "cfi-flash";
			reg = <0x0 0x0 0x02000000>;
			bank-width = <2>;
			device-width = <1>;
			status = "okay";

			partition@0 {
				label = "ramdisk";
				reg = <0x00000000 0x01c00000>;
			};
		}

		nand_flash: nand@1,0 {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "fsl,p1023-fcm-nand",
				     "fsl,elbc-fcm-nand";
			reg = <0x2 0x0 0x00040000>;
			status = "disabled";

			u-boot-nand@0 {
				/* This location must not be altered  */
				/* 1MB for u-boot Bootloader Image */
				reg = <0x0 0x00100000>;
				read-only;
			};
		}

When booting from nor flash, the status of nor node is enabled and the
status of nand node is disabled in the default dts file, so do not do
anything.

But, when booting from nand flash, need to do some operations:

	o Disable the NOR node by setting status = "disabled";
	o Enable the NAND node by setting status = "okay";

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2012-04-24 23:58:30 -05:00
Dirk Behme
03f3587822 i.MX6: arm2: Add AXI cache and Qos setting
Do the same AXI cache and Qos settings done already in the
SabreLite imximage.cfg for the ARM2 board, too.

It fixes a display flash issue caused by low priority of
the display IDMA channel.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
CC: Jason Chen <b02280@freescale.com>
CC: Jason Liu <r64343@freescale.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <festevam@gmail.com>
Acked-by: Jason Liu <r64343@freescale.com>
2012-04-17 15:41:22 +02:00
Wolfgang Denk
f5cdc11775 Prepare v2012.04-rc2; minor Coding Style cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-04-16 23:13:51 +02:00
Stefano Babic
2f002eceae MX35: mx35pdk: wrong board revision
The board revision is detected accessing to the pmic,
that is not available before relocation (I2C).
This generates the following error:

CPU:   Freescale i.MX35 rev 2.0 at 532 MHz.
Reset cause: WDOG
<reg num> = 7 is invalid. Should be less than 0
Board: MX35 PDK 1.0

The revision number is wrong, as a default value is printed
(tested on a mx35pdk Rev. 2.0).

Move the output in the board_late_init(), when
pmic can be accessed.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2012-04-16 14:53:59 +02:00
Stefano Babic
d0f5600f54 MX31: mx31pdk: drop enable_caches from board file
enable_caches() is implemented now in cpu.c for
ARM1136.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-04-16 14:53:59 +02:00
Troy Kisky
1482410531 MX53: DDR: Fix ZQHWCTRL field TZQ_CS
Currently, board files are setting this field to 0x01
which the manual says is a reserved value. Change to
use the default of 0x02 - 128 cycles.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-04-16 14:53:58 +02:00
Fabio Estevam
19db9be4aa mx53ard: Initialize return code with error
The variable "rc" is the return of board_eth_init() function. Initialize
it with an error code, so that this function can return an error when
CONFIG_SMC911X is not set.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-03-27 09:41:17 +02:00
Eric Nelson
1c9ceff8ca i.MX6: mx6q_sabrelite: add CONFIG_REVISION_TAG
This is needed to support Freescale-supplied userspaces.

At the moment, both the IPU and VPU libraries provided by Freescale
in the "imx-lib" package contain routines which scrape the system
revision from /proc/cpuinfo. In the VPU library, this information is
used to load the proper firmware, allowing a single binary to be used
across various i.MX processors.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-03-27 09:41:15 +02:00
Eric Nelson
d928a8f3f3 mx6q: mx6qsabrelite: setup_spi() should be called in board_init to allow use for environment
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2012-03-27 09:41:15 +02:00
Wolfgang Grandegger
2ea73e9e38 mx6qsabrelite: add and enable USB Host 1 support
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
2012-03-26 23:09:23 +02:00
Troy Kisky
2bf3359ea5 i.mx6q: mx6qsabrelite: Update the network configuration
Define CONFIG_PHY_MICREL, and
minimize the tx clock delay.

There is an issue with 1000 baseTx mode on early revs
of the SabreLite boards. The center tap pin 9 of the mag RJ45
USB combo was connected to the 3.3 filtered supply. Letting
this pin float solved the problem. Symptoms of the problem
were packets with many extra zeroes tacked on the end, and random
bit flips causing a high rate of CRC errors. 10/100 baseTx worked
fine on all revs. To disable 1000 baseTx for these boards, simply
define the environment variable disable_giga. ie.

setenv disable_giga 1

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2012-02-27 21:19:25 +01:00
Troy Kisky
9fafe7dab9 net: phy: make board_phy_config responsible for calling drv->config
Boards may have things they want done before or after normal phy config.
Letting the boards call drv->config allows them more flexibilty.
Boards affected by this change are corenet_ds and mpc8544ds.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
2012-02-27 21:19:25 +01:00
Fabio Estevam
ba901df41b mx35pdk: Remove duplicate CPU revision and reset cause information
MX35PDK board does not need to print CPU revision and reset cause in board file
because this is printed by common code when CONFIG_DISPLAY_CPUINFO is selected

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-02-27 21:19:24 +01:00
Fabio Estevam
ed9d21696d mx51evk: Use gpio_direction_input prior to gpio_get_value
Use gpio_direction_input prior to gpio_get_value.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-02-27 21:19:24 +01:00
Fabio Estevam
c9d5fd1602 mx53smd: Use gpio_direction_input prior to gpio_get_value
Use gpio_direction_input prior to gpio_get_value.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-02-27 21:19:24 +01:00
Fabio Estevam
7d1267d623 mx53evk: Use gpio_direction_input prior to gpio_get_value
Use gpio_direction_input prior to gpio_get_value.

Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
2012-02-27 21:19:24 +01:00
Fabio Estevam
93082044a9 mx53ard: Use gpio_direction_input prior to gpio_get_value
Use gpio_direction_input prior to gpio_get_value.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-02-27 21:19:23 +01:00
Fabio Estevam
a091be766d mx53loco: Use gpio_direction_input prior to gpio_get_value
Use gpio_direction_input prior to gpio_get_value.

Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <r64343@freescale.com>
2012-02-27 21:19:23 +01:00
Eric Nelson
ba54b9276a mx6q: mx6qsabrelite: Provide default serial flash bus and chip-select
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Jason Liu <jason.hui@linaro.org>
2012-02-27 21:19:23 +01:00
Eric Nelson
373a1d8c0e mx6q: mx6qsabrelite: Add ECSPI support to the Sabrelite platform
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Jason Liu <jason.hui@linaro.org>
2012-02-27 21:19:23 +01:00
Matthias Fuchs
ed97abed27 mx28evk: add SPI support
This patch adds SPI support for the MX28EVK. Support for
an optionally installed SPI flash is also added. An example
configuration for redundant envrionment from SPI flash is also
added but disabled by default.

This patch has been tested on a MX28EVK Rev. D with an installed
SST25VF032B 32Mbit SPI flash.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-02-27 21:19:22 +01:00
Matthias Fuchs
598aa2bbfb mx28evk: add USB support
This patch enables USB host support on the MX28EVK board.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-02-27 21:19:22 +01:00
Stefano Babic
b125e7bdd8 imx6: mx6qarm2: updated board_mmc_getcd() to the new prototype
Commit 314284b156 has
changed board_mmc_getcd() function prototype, while
mx6qarm2 has still the old one.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Jason Liu <jason.hui@linaro.org>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Acked-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Jason Liu <jason.hui@linaro.org>
2012-02-12 10:11:26 +01:00
Jason Liu
2af81e2735 i.mx6q: mx6qsabrelite: Add the ethernet function support
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Eric Miao <eric.miao@linaro.org>
CC: Jason Liu <jason.hui@linaro.org>
CC: Stefano Babic <sbabic@denx.de>
2012-02-12 10:11:26 +01:00
Troy Kisky
8e7d7b6b25 i.mx6q: mx6qsabrelite: Setup uart1 pinmux
This allows the Linux kernel to use UART1 before pinmux
support is added for UART1

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Troy Kisky <troy.kisky@boundarydevices.com>
CC: Jason Liu <jason.hui@linaro.org>
CC: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
2012-02-12 10:11:26 +01:00
Fabio Estevam
4394d0c2ee sdhc_boot: Introduce CONFIG_FSL_FIXED_MMC_LOCATION option
Since commit 97039ab98 (env_mmc: Allow board code to override the environment address)
mmc_get_env_addr is a weak-aliased function in common/env_mmc.c

The mmc_get_env_addr implementation that exists at
board/freescale/common/sdhc_boot.c is meant to be used only for PowerPC boards,
but currently it is being used for all platforms that have CONFIG_ENV_IS_IN_MMC defined.

Introduce CONFIG_FSL_FIXED_MMC_LOCATION so that the boards that need to use
the mmc_get_env_addr version from board/freescale/common/sdhc_boot.c could activate
this config option on their board file.

This fixes the retrieval of CONFIG_ENV_OFFSET on non-PowerPC boards.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-02-12 10:11:25 +01:00
Jason Liu
bc5833c49a i.mx: i.mx6q: add the initial support for i.mx6q Sabre Lite board
Add the initial support for Freescale i.MX6Q Sabre Lite board

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
CC: Eric Nelson <eric.nelson@boundarydevices.com>
2012-01-16 08:40:10 +01:00
Fabio Estevam
d109ed946c mx28evk: Remove 'all' target from Makefile
Remove 'all' target from Makefile, as this is unused code.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
2012-01-16 08:40:09 +01:00
Fabio Estevam
29f75a5ce5 mx28evk: Add initial support for MX28EVK board
Add initial support for Freescale MX28EVK board.

Tested boot via SD card and by loading a kernel via TFTP through
the FEC interface.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2012-01-16 08:40:09 +01:00
Eric Nelson
3c057897e9 i.mx6q: mx6qarm2: Enable the usboh3 clock
Bits 0 and 1 of CCM_CCGR7 are the usboh3 clock enable bits. Enabling this
clock is necessary for the USB download.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
CC: Jason Hui <jason.hui@linaro.org>
Acked-by: Jason Hui <jason.hui@linaro.org>
2012-01-16 08:40:08 +01:00
Jason Liu
473c63592e i.mx6q: arm2: Add the enet function support
This enable the network function on the i.mx6q armadillo2
board(arm2), thus we can use tftp to load image from network.

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jason Liu <jason.hui@linaro.org>
Tested-by: Dirk Behme <dirk.behme@de.bosch.com>
2012-01-16 08:40:08 +01:00
Wolfgang Denk
670c24f6f3 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx:
  fsl_lbc: add printout of LCRR and LBCR to local bus regs
  sbc8548: Fix up local bus init to be frequency aware
  sbc8548: enable support for hardware SPD errata workaround
  sbc8548: relocate fixed ddr init code to ddr.c file
  sbc8548: Make enabling SPD RAM configuration work
  sbc8548: Fix LBC SDRAM initialization settings
  sbc8548: enable ability to boot from alternate flash
  sbc8548: relocate 64MB user flash to sane boundary
  Revert "SBC8548: fix address mask to allow 64M flash"
  MPC85xxCDS: Fix missing LCRR_DBYP bits for 66-133MHz LBC
  eXMeritus HWW-1U-1A: Add support for the AT24C128N I2C EEPROM
  eXMeritus HWW-1U-1A: Minor environment variable tweaks
2012-01-13 20:38:49 +01:00
Wolfgang Denk
3dc5ea500f Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx
* 'master' of git://git.denx.de/u-boot-mpc83xx:
  mpc8313erdb: fix mtdparts address
  powerpc/83xx/km: add support for 8321 based tuge1 board
  powerpc/83xx/km: merge tuxa and tuda1 boards to tuxx1
  powerpc/83xx/km: remove obsolete defines for tuda1
  powerpc/83xx/km: update SDRAM parameters for km8321 boards
  mpc8313erdb: Enable GPIO support on the MPC8313E RDB
  mpc83xx: Add a GPIO driver for the MPC83XX family
  gpio: Replace ARM gpio.h with the common API in include/asm-generic
  gpio: Modify common gpio.h to more closely match Linux
2012-01-13 20:07:40 +01:00
Paul Gortmaker
1667013ddf MPC85xxCDS: Fix missing LCRR_DBYP bits for 66-133MHz LBC
These boards were meaning to deploy this value:

  #define LCRR_DBYP        0x80000000

but were missing a zero, and hence toggling a bit that
lands in an area marked as reserved in the 8548 reference
manual.

According to the documentation, LCRR_DBYP should be used as:

   PLL bypass. This bit should be set when using low bus
   clock frequencies if the PLL is unable to lock.  When in
   PLL bypass mode, incoming data is captured in the middle
   of the bus clock cycle.  It is recommended that PLL bypass
   mode be used at frequencies of 83 MHz or less.

So the impact would most likely be undefined behaviour for
LBC peripherals on boards that were running below 83MHz LBC.
Looking at the actual u-boot code, the missing DBYP bit was
meant to be deployed as follows:

      Between 66 and 133, the DLL is enabled with an
      override workaround.

In the future, we'll convert all boards to use the symbolic
DBYP constant to avoid these "count the zeros" problems, but
for now, just fix the impacted boards.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-01-11 13:57:56 -06:00
Joe Hershberger
0eaf8f9ea8 mpc8313erdb: Enable GPIO support on the MPC8313E RDB
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2012-01-09 20:10:33 -06:00
Thierry Reding
314284b156 mmc: Change board_mmc_getcd() function prototype.
The new API no longer uses the extra cd parameter that was used to store
the card presence state. Instead, this information is returned via the
function's return value. board_mmc_getcd() returns -1 to indicate that
no card-detection mechanism is implemented; 0 indicates that no card is
present and 1 is returned if it was detected that a card is present.

The rationale for this change can be found in the following email
thread:

	http://lists.denx.de/pipermail/u-boot/2011-November/110180.html

In summary, the old API was not consistent with the rest of the MMC API
which always passes a struct mmc as the first parameter. Furthermore the
cd parameter was used to mean "card absence" in some implementations and
"card presence" in others.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Tested-by: Jason Liu <jason.hui@linaro.org>
2012-01-08 21:28:27 -06:00
Anatolij Gustschin
60bae5ef82 Fix building for mx51evk board
Fix:
mx51evk.c:206:6: error: conflicting types for 'board_ehci_hcd_init'
/u-boot/include/usb/ehci-fsl.h:254:5: note: previous declaration of
'board_ehci_hcd_init' was here

We also fix board_ehci_hcd_init() for mx53loco board.
Building for mx53loco worked since <usb/ehci-fsl.h> is
not included here.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2011-12-19 17:52:43 +01:00
Wolfgang Grandegger
055d969332 USB: mx51evk: add end enable USB host support on port 1
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Jason Liu <r64343@freescale.com>
2011-12-11 14:49:56 +01:00
Wolfgang Grandegger
45cf6ada60 USB: mx53loco: add end enable USB host support on port 1
Signed-off-by: Wolfgang Grandegger <wg@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Jason Liu <r64343@freescale.com>
2011-12-11 14:49:50 +01:00
Jason Liu
76d7f57449 i.mx: i.mx6q: add the initial support for i.mx6q ARM2 board
Add the initial support for Freescale i.MX6Q Armadillo2 board
Support: MMC boot from slot 0/1, debug UART(UART4), usdhc.

There is two MMC slots on the boards:
mmc dev 0 -> connect USDHC3 -> the lower slot on the board,
mmc dev 1 -> connect USDHC4 -> the upper slot on the board,

Signed-off-by: Jason Liu <jason.hui@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Tested-by: Dirk Behme <dirk.behme@de.bosch.com>
2011-12-09 17:30:10 +01:00
Wolfgang Denk
c786f54b9a Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm:
  davinci: Remove unwanted memsize.c from hawkboard's nand spl build
  devkit8000: Move CONFIG_SYS_TEXT_BASE out of bss
  da850evm: pass board revision info to kernel
  arch/arm/include/asm/arch-omap5/clocks.h: Fix GCC 4.2 warnings
  arch/arm/cpu/armv7/omap-common/clocks-common.c: Fix GCC 4.6 warnings
  arch/arm/cpu/armv7/omap-common/spl.c: Fix GCC 4.2 warnings
  MX35: flea3: changes due to hardware revision B
  MX: serial_mxc: cleanup removing nasty #ifdef
  M28: Fix OB1 bug in GPIO driver
  MXS: Add static annotations to dma driver
  apbh_dma: return error value on timeout
  Efika: Configure additional regulators for HDMI output
  mx5: Correct a warning in clock.c
  MC13892: Add REGMODE0 bits definitions
  mx51evk: Configure the pins as GPIOs prior to using gpio_get_value
  mx53smd: Configure the pins as GPIOs prior to using gpio_get_value
  mx53evk: Configure the pins as GPIOs prior to using gpio_get_value
  mx53ard: Configure the pins as GPIOs prior to using gpio_get_value
  mx53loco: Configure the pins as GPIOs prior to using gpio_get_value
  OMAP3: Add SPL_BOARD_INIT hook
  AM3517 CraneBoard: Add SPL support
  AM3517: Add SPL support
  OMAP3: Add SPL support to omap3_evm
  OMAP3: Add SPL support to Beagleboard
  OMAP3 SPL: Add identify_nand_chip function
  OMAP3 SPL: Rework memory initalization and devkit8000 support
  OMAP3: Suffix all Micron memory timing parts with their speed
  OMAP3: Add optimal SDRC autorefresh control values
  omap3: mem: Add MCFG helper macro
  OMAP3: Remove get_mem_type prototype
  OMAP3: Change mem_ok to clear again after reading back
  OMAP3: Add a helper function to set timings in SDRC
  OMAP3: Update SDRC dram_init to always call make_cs1_contiguous()
  omap3: mem: Comment enable_gpmc_cs_config more
  ARM: davici_emac: Fix condition for number of phy detects
  arm: printf() is not available in some SPL configurations
  arm, davinci: add support for am1808 based enbw_cmc board
  arm, davinci: move misc function in arch tree
  arm, board/davinci/common/misc.c: Codingstyle cleanup
  arm, davinci, da850: add uart1 tx rx pinmux config
  arm, davinci: move davinci_rtc struct to hardware.h
  arm, davinci: Remove duplication of pinmux configuration code
  arm, hawkboard: Use the pinmux configurations defined in the arch tree
  arm, da850evm: Use the pinmux configurations defined in the arch tree
  arm, da850: Add pinmux configurations to the arch tree
  arm, da850evm: Do pinmux configuration for EMAC together with other pinmuxes
  arm, hawkboard: Remove obsolete struct pinmux_config i2c_pins
  arm, davinci: Move pinmux functions from board to arch tree
  arm, arm926ejs: always do cpu critical inits
  omap_gpmc: use SOFTECC in SPL if it's enabled
  nand_spl_simple: add support for software ECC
  AM3517: move AM3517 specific mux defines to generic header
  AM35xx: add EMAC support
  davinci_emac: hardcode 100Mbps for AM35xx and RMII
  davinci_emac: fix for running with dcache enabled
  arm926ejs: add noop implementation for dcache ops
  davinci_emac: conditionally compile specific PHY support
  davinci_emac: use internal addresses in buffer descriptors
  davinci_emac: move arch-independent defines to separate header
  BeagleBoard: config: Really switch to ttyO2
  ARM: davinci_dm6467Tevm: Fix build breakage
  ARM: OMAP: Remove STACKSIZE for IRQ and FIQ if unused
  ARM: OMAP3: Remove unused define SDRC_R_C_B
  ARM: OMAP3: Remove unused define CONFIG_OMAP3430
  omap4: fix IO setting
  omap4+: streamline CONFIG_SYS_TEXT_BASE and other SDRAM addresses
  omap4460: add ES1.1 identification
  omap4: emif: fix error in driver
  omap: remove I2C from SPL
  omap4460: fix TPS initialization
  omap: fix cache line size for omap3/omap4 boards
  omap4: ttyO2 instead of ttyS2 in default bootargs
  omap: Improve PLL parameter calculation tool
  start.S: remove omap3 specific code from start.S
  armv7: setup vector
  armv7: include armv7/cpu.c in SPL build
  armv7: disable L2 cache in cleanup_before_linux()
  arm, arm926ejs: Fix clear bss loop for zero length bss
  PXA: Move colibri_pxa270 to board/toradex/
  PXA: Flip colibri_pxa27x to pxa-common.h
  PXA: Introduce common configuration header for PXA
  PXA: Rename pxa_dram_init to pxa2xx_dram_init
  PXA: Squash extern pxa_dram_init()
  PXA: Export cpu_is_ and pxa_dram_init functions
  PXA: Cleanup Colibri PXA270
  PXA: Replace timer driver
  PXA: Add cpuinfo display for PXA2xx
  PXA: Separate PXA2xx CPU init
  PXA: Rename CONFIG_PXA2[57]X to CONFIG_CPU_PXA2[57]X
  PXA: Unify vpac270 environment size
  PXA: Enable command line editing for vpac270
  PXA: Adapt Voipac PXA270 to OneNAND SPL
  PXA: Drop Voipac PXA270 OneNAND IPL
  PXA: Fixup PXA25x boards after start.S update
  PXA: Re-add the Dcache locking as RAM for pxa250
  PXA: Rework start.S to be closer to other ARMs
  PXA: Drop XM250 board
  PXA: Drop PLEB2 board
  PXA: Drop CRADLE board
  PXA: Drop CERF250 board
  Fix regression in SMDK6400
  nand: Add common functions to linux/mtd/nand.h
  Ethernut 5 board support
  net: Armada100: Fix compilation warnings
  ARM: remove duplicated code for LaCie boards
  ARM: add support for LaCie 2Big Network v2
  mvsata: fix ide_preinit for missing disks
  netspace_v2: Read Ethernet MAC address from EEPROM
  omap3evm: Add support for EFI partitions
  part_efi: Fix compile errors
2011-12-07 09:09:58 +01:00
Shaohui Xie
4497861ae7 p2041rdb: fix serdes clock map
Description of SerDes clock Bank2 setting in p2041 hardware specification
is wrong, the clock map which based on it is wrong either, so fix the
serdes clock map.

wrong setting of SERDES Reference Clocks Bank2:
SW2[5:6] = ON OFF	=>100MHz for PCI mode
SW2[5:6] = OFF ON	=>125MHz for SGMII mode

right setting of SERDES Reference Clocks Bank2:
SW2[5:6] = OFF OFF	=>100MHz for PCI mode
SW2[5:6] = OFF ON	=>125MHz for SGMII mode
SW2[5:6] = ON OFF	=>156.25MHZ

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-12-06 21:44:33 -06:00
Fabio Estevam
58aef72d89 mx51evk: Configure the pins as GPIOs prior to using gpio_get_value
Configure the pins as GPIO prior to using gpio_get_value.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-12-06 23:59:39 +01:00
Fabio Estevam
3ee3729e95 mx53smd: Configure the pins as GPIOs prior to using gpio_get_value
Configure the pins as GPIO prior to using gpio_get_value.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-12-06 23:59:39 +01:00
Fabio Estevam
a146dca5c2 mx53evk: Configure the pins as GPIOs prior to using gpio_get_value
Configure the pins as GPIO prior to using gpio_get_value.

Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <jason.hui@linaro.org>
2011-12-06 23:59:39 +01:00
Fabio Estevam
d59c33a1f3 mx53ard: Configure the pins as GPIOs prior to using gpio_get_value
Configure the pins as GPIO prior to using gpio_get_value.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-12-06 23:59:39 +01:00
Fabio Estevam
73128aad58 mx53loco: Configure the pins as GPIOs prior to using gpio_get_value
Configure the pins as GPIO prior to using gpio_get_value.

Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <jason.hui@linaro.org>
2011-12-06 23:59:39 +01:00
Wolfgang Denk
e38cc2c771 board/freescale/mpc8610hpcd/mpc8610hpcd.c: Fix GCC 4.6 build warning
Fix:
mpc8610hpcd.c: In function 'pci_init_board':
mpc8610hpcd.c:238:15: warning: variable 'pordevsr' set but not used
[-Wunused-but-set-variable]

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2011-12-02 00:16:30 +01:00
Ira W. Snyder
9839709ea3 mpc85xx: support for Freescale COM Express P2020
This adds support for the Freescale COM Express P2020 board. This board
is similar to the P1_P2_RDB, but has some extra (as well as missing)
peripherals.

Unlike all other mpc85xx boards, it uses a watchdog timeout to reset.
Using the HRESET_REQ register does not work.

This board has no NOR flash, and can only be booted via SD or SPI. This
procedure is documented in Freescale Document Number AN3659 "Booting
from On-Chip ROM (eSDHC or eSPI)." Some alternative documentation is
provided in Freescale Document Number P2020RM "P2020 QorIQ Integrated
Processor Reference Manual" (section 4.5).

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-29 09:07:51 -06:00
Shengzhou Liu
ae6b03fefc powerpc/p3060qds: Add board related support for P3060QDS platform
The P3060QDS is a Freescale reference board for the six-core P3060 SOC.

P3060QDS Board Overview:
 Memory subsystem:
  - 2G Bytes unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
  - 128M Bytes NOR flash single-chip memory
  - 16M Bytes SPI flash
  - 8K Bytes AT24C64 I2C EEPROM for RCW
 Ethernet:
  - Eight Ethernet controllers (4x1G + 4x1G/2.5G)
  - Three VSC8641 PHYs on board (2xRGMII + 1xMII)
  - Suport multiple Vitesse VSC8234 SGMII Cards in Slot1/2/3
 PCIe: Two PCI Express 2.0 controllers/ports
 USB:  Two USB2.0, USB1(TYPE-A) and USB2(TYPE-AB) on board
 I2C:  Four I2C controllers
 UART: Supports two dUARTs up to 115200 bps for console
 RapidIO:  Two RapidIO, sRIO1 and sRIO2

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-29 08:48:06 -06:00
Kim Phillips
b86c770973 mpc83xx: mpc8360emds - fix gcc 4.6 compiler warning
Configuring for MPC8360EMDS_66_HOST_33 - Board: MPC8360EMDS, Options: CLKIN_66MHZ,PCI,PCI_33M,PQ_MDS_PIB=1
mpc8360emds.c: In function 'board_eth_init':
mpc8360emds.c:178:12: warning: array subscript is above array bounds [-Warray-bounds]

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-11-16 21:41:39 +01:00
Kumar Gala
4589728e21 powerpc/85xx: Fix builds of P1020/P2020RDB-PC_36BIT_NAND
Size grew a bit so nand-spl didn't fit in 4k, reduce done by removing
LAW entries not needed during SPL phase.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-11 08:14:53 -06:00
Kumar Gala
e3779209dd board/freescale/mpc8569mds/mpc8569mds.c: Fix GCC 4.6 build warning
mpc8569mds.c: In function 'local_bus_init':
mpc8569mds.c:306:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable]

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-11 07:49:00 -06:00
Kumar Gala
502dd36b78 board/freescale/mpc8568mds/mpc8568mds.c: Fix GCC 4.6 build warning
Fix:

mpc8568mds.c: In function 'local_bus_init':
mpc8568mds.c:150:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable]
mpc8568mds.c: In function 'pib_init':
mpc8568mds.c:271:11: warning: variable 'orig_i2c_bus' set but not used [-Wunused-but-set-variable]

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-11 07:49:00 -06:00
Kumar Gala
945f43101e board/freescale/mpc8548cds/mpc8548cds.c: Fix GCC 4.6 build warning
Fix:

mpc8548cds.c: In function 'local_bus_init':
mpc8548cds.c:87:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable]
mpc8548cds.c: In function 'lbc_sdram_init':
mpc8548cds.c:121:7: warning: variable 'cpu_board_rev' set but not used [-Wunused-but-set-variable]

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-11 07:49:00 -06:00
Kumar Gala
8dbd4b746d board/freescale/common/pixis.c: Fix GCC 4.6 build warning
Fix:

pixis.c: In function 'strfractoint':
pixis.c:383:6: warning: variable 'intarr_len' set but not used [-Wunused-but-set-variable]

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-11 07:48:59 -06:00
Kumar Gala
67926c2a1d board/freescale/common/cds_pci_ft.c: Fix GCC 4.6 build warning
Fix:

cds_pci_ft.c: In function 'cds_pci_fixup':
cds_pci_ft.c:31:12: warning: variable 'tmp' set but not used [-Wunused-but-set-variable]

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-11 07:48:59 -06:00
Jerry Huang
71775d3b54 powerpc/mpc85xx: Set SYSCLK to the required frequency
For ICS307-02, there is one general expression to generate SYSCLK:
CLK1Frequency = InputFrequency * 2 * (VDW + 8) / ((RDW + 2) * OD)

If we want the required frequency for SYSCLK, we must find one solution
to generate this frequency, this solution includes VDW, RDW and OD.
For OD, there are only eight option value: 10, 2, 8, 4, 5, 7, 3, 6.
For RDW, the range is 1 to 127.
For VDW, the range is 4 to 511.

First, we use one OD, RDW and required SYSCLK to calculate the VDW,
if VDW is in it's range, we will calculate the CLK1Frequency with
the OD, RDW and VDW calculated, and we will check this percent
(CLK1Frequency / required SYSCLK), and the precision is 1/1000.
if the percent is less than 1/1000, we think the CLK1Frequency is we want.
Otherwise, We will continue to calculate it with the next OD and RDW.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-11 07:48:54 -06:00
Kumar Gala
e4382acb1f powerpc/85xx: Fix MPC8572DS NAND build
Reduce NAND SPL build size by not include TLB entries that arent used by
it.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-08 11:03:54 -06:00
Ramneek Mehresh
a311db6941 powerpc/85xx: Make inclusion of USB device fixup conditional
Include call to usb device-fixup only when CONFIG_HAS_FSL_DR_USB is
defined for the platform - P1020RDB, P1010RDB, P1020-PC

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-08 08:36:04 -06:00
chenhui zhao
d37012289d powerpc/mpc8548cds: Fix network initialization
Add board_eth_init(). PCIe network card is also supported.
Put RGMII init after tsec_eth_init().
Skip initializing eTSEC3 and eTSEC4 with Carrier boards prior to ver 1.3.

Signed-off-by: Ebony Zhu
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
2011-11-08 08:30:47 -06:00
Roy Zang
afc52db2f7 powerpc/QorIQ: fix network frame manager TBI PHY address settings
TBI PHY address (TBIPA) register has been set in general frame manager
phy init funciton dtsec_init_phy() in drivers/net/fm/eth.c

So remove the duplicate code on QorIQ frame manager Ethernet related
platforms, which include Hydra board, P4080DS board and P2041rdb board.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-08 08:18:16 -06:00
Wolfgang Denk
5721385b18 Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx
* 'master' of git://git.denx.de/u-boot-mpc83xx:
  powerpc/mpc83xx: Add 33.33MHz support for mpc8360emds
  powerpc/mpc83xx: Add 512MB DDR support for mpc8360emds
  mpc83xx: Rename CONFIG_SYS_DDR_CONFIG and cleanup DDR csbnds code
  mpc83xx: Cleanup usage of LBC constants
  mpc83xx: Cleanup usage of DDR constants
  mpc83xx: Cleanup usage of BAT constants
  mpc83xx: cosmetic: vme8349.h checkpatch compliance
  mpc83xx: cosmetic: ve8313.h checkpatch compliance
  mpc83xx: cosmetic: sbc8349.h checkpatch compliance
  mpc83xx: cosmetic: mpc8308_p1m.h checkpatch compliance
  mpc83xx: cosmetic: kmeter1.h checkpatch compliance
  mpc83xx: cosmetic: TQM834x.h checkpatch compliance
  mpc83xx: cosmetic: SIMPC8313.h checkpatch compliance
  mpc83xx: cosmetic: MVBLM7.h checkpatch compliance
  mpc83xx: cosmetic: MPC837XERDB.h checkpatch compliance
  mpc83xx: cosmetic: MPC837XEMDS.h checkpatch compliance
  mpc83xx: cosmetic: MPC8360ERDK.h checkpatch compliance
  mpc83xx: cosmetic: MPC8360EMDS.h checkpatch compliance
  mpc83xx: cosmetic: MPC8349ITX.h checkpatch compliance
  mpc83xx: cosmetic: MPC8349EMDS.h checkpatch compliance
  mpc83xx: cosmetic: MPC832XEMDS.h checkpatch compliance
  mpc83xx: cosmetic: MPC8323ERDB.h checkpatch compliance
  mpc83xx: cosmetic: MPC8315ERDB.h checkpatch compliance
  mpc83xx: cosmetic: MPC8313ERDB.h checkpatch compliance
  mpc83xx: cosmetic: MPC8308RDB.h checkpatch compliance
  mpc83xx: cosmetic: MERGERBOX.h checkpatch compliance
  mpc83xx: Fix ipic structure definition
  powerpc, mpc83xx: add DDR SDRAM Timing Configuration 3 definitions
  cosmetic, powerpc, mpc83xx: checkpatch cleanup
  powerpc/83xx: move km 83xx specific i2c code to km83xx_i2c
  mpc83xx: fix global timer structure definition
2011-11-08 07:44:52 +01:00
Wolfgang Denk
688d8f33f2 Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm:
  Arm: re-introduce the MACH_TYPE_XXXXXX for EB_CPUX9K2 board
  arm: jadecpu: Readd MACH_TYPE_JADECPU
  at91: defined mach-types for otc570 board in board config file
  at91: defined mach-types for meesc board in board config file
  mx31pdk: Enable D and I caches
  ehci-mxc: remove incorrect comment
  README: Fix supported i.MX SoC list for CONFIG_MXC_SPI
  mx53: Turn off child clocks before reconfigure perclk_root
  qong: enable support for compressed images
  imx: imx31_phycore.h: fix checkpatch warnings
  vision2: Remove unused get_board_rev function
  mx53smd: Remove unused get_board_rev function
  mx53ard: Remove unused get_board_rev function
  mx53evk: Remove unused get_board_rev function
  mx53evk: Add RTC support
  mx53loco: Remove unused get_board_rev function
  mx53evk: Remove unneeded '1' from mx53evk.h
  OMAP3: mvblx: Initial support for mvBlueLYNX-X
  ARM: dig297: Define MACH_TYPE_OMAP3_CPS and CONFIG_MACH_TYPE
  omap3: mem: Move comments next to definitions
  omap3: mem: Clean-up whitespaces
  omap3: mem: Define and use common macros
  Davinci: ea20: added PREBOOT to configuration
  Davinci: ea20: added I2C support
  Davinci: ea20: added video support
  VIDEO: davinci: add framebuffer to da8xx
  ARM: Davinci: added missing registers to hardware.h
  Davinci: ea20: add gpios for LCD backlight control
  Davinci: ea20: add gpio for keeping power on in board_late_init
  Davinci: ea20: Add default U-Boot environment
  Davinci: ea20: Add early init to get early output from console
  Davinci: ea20: Add NAND support
  Davinci: ea20: set GPIOs to hold MII-Phy in reset and set UART0-Switch for console
  Davinci: ea20: set console on UART0
  arm, davinci: add cam_enc_4xx support
  arm926ejs, davinci: add missing spi defines for dm365
  arm926ejs, davinci: add cpuinfo for dm365
  arm, davinci: add lowlevel function for dm365 soc
  arm, davinci: add header files for dm365
  spl, nand: add 4bit HW ecc oob first nand_read_page function
  arm, davinci: add support for new spl framework
  spl: add option for adding post memory test to the SPL framework
  net, davinci_emac: make clock divider in MDIO control register configurable
  arm, usb, davinci: make USBPHY_CTL register configurable
  usb, davinci: add enable_vbus() weak function
  omap3evm: fix errors caused by multiple definitions
  omap3evm: Add (quick) configuration for NAND only
  omap3evm: Add (quick) configuration for MMC/SD only
  omap3evm: move common config options to new file
  omap3evm: Prepare to split configuration
  omap3evm: Reorder related config options
  omap/spl: actually enable the console
  davinci_emac: compilation fix, phy is array now
  omap3evm: Set environment variable 'ethaddr'
  arm, arm926: fix missing symbols in NAND_SPL mode
  arm, davinci: Add function lpsc_syncreset()
  arm, davinci: replace CONFIG_PRELOADER with CONFIG_SPL_BUILD
  arm/km: portl2 environment address update to P1B
  arm/km: adapt bootcounter evaluation
  arm/km: enable jffs2 cmds
  arm/km: trigger reconfiguration for the Xilinx FPGA
  arm/km: add boardid and hwkey to kernel command line
  ARM: Reintroduce MACH_TYPE_KM_KIRKWOOD for keymile ARM boards
  netspace_v2: enable I2C EEPROM support
  netspace_v2: fix SDRAM configuration
  armada100: define CONFIG_SYS_CACHELINE_SIZE
  pantheon: define CONFIG_SYS_CACHELINE_SIZE
  kirkwood: define CONFIG_SYS_CACHELINE_SIZE
  kirkwood: drop empty asm-offsets.s file
  arm/km/mgcoge3un: enhance "waitforne" feature
  arm/km: add variable waitforne to mgcoge3un
  gplugD: Fix for error:MACH_TYPE_SHEEVAD undeclared
  ARM: dreamplug: fix compilation
  ARM: DockStar: fix compilation
  ARM: netspace_v2: fix warnings
  am335x: Drop board_sysinfo struct
  am335x: Temporarily add MACH_TYPE define
  misc:pmic:samsung Enable PMIC driver at C210 Universal target
  dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p UNIVERSAL C210 target
  dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p GONI target
  smdkv310: use macro for mmc data read function address
  smdkv310: use spl framework for mmc spl
  SMDKV310: use get_ram_size() to validate dram size
  SMDKV310: Initialize board id using CONFIG_MACH_TYPE
  ORIGEN : use absolute paths and fix tool naming
  ORIGEN : enable device tree support
  MX25: tx25: Fix building due to missing MACH_TYPE
  mx31: Add board support for HALE TT-01
  mx31: add ESD control registers
  mx31: define pins and init for UART2 and CSPI3
  MX35: add support for flea3 board
  MX51: vision2: add MACH_TYPE in config file
  vision2: Remove unused header file
  mx51evk: Remove unused get_board_rev function
  mx51evk: Remove unneeded '1' from mx51evk.h
  I2C: Fix mxc_i2c.c problem on imx31_phycore
  mx35pdk: Add RTC support
  mx51evk: Use GPIO API for configuring the IOMUX
  mx51evk: Add RTC support
  rtc: Make mc13783-rtc driver generic
  qong: remove unneeded IOMUX settings
  qong: Use mx31_set_gpr to setup USBH2 pins
  mx31: Introduce mx31_set_gpr function
  mx31pdk: Add MC13783 PMIC support
  qong: remove unneeded "1" from qong.h
  misc: pmic: fix regression in pmic_fsl.c (SPI)
  mx5 configs: CONFIG_PRIME should really be CONFIG_ETHPRIME
  MX35: Drop unnecessary prototypes from imx-regs.h
  I2C: added I2C-2 and I2C-3 to MX35
  MX35: factorize common assembly code
  MX35: add reset cause as provided by other i.MX
  MX35: add pins definition for UART3
  MX35: added ESDC structure to imx-regs
2011-11-08 00:38:52 +01:00
Wolfgang Denk
7ba6d591b5 Merge branch 'master' of git://git.denx.de/u-boot-coldfire
* 'master' of git://git.denx.de/u-boot-coldfire:
  ColdFire: The EB+MCF-EV123 boards config update
  ColdFire: Fix the compile issue for M52277
  ColdFire:Moving the remaining coldfire boards to boards.cfg
2011-11-08 00:37:27 +01:00
Wolfgang Denk
caf63eb4a0 board/freescale/mpc8266ads/mpc8266ads.c: Fix GCC 4.6 build warning
Fix:
mpc8266ads.c: In function 'initdram':
mpc8266ads.c:278:9: warning: variable 'spd_size' set but not used
[-Wunused-but-set-variable]

Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-11-07 22:49:44 +01:00
Wolfgang Denk
55e33279ce board/freescale/mpc8266ads/mpc8266ads.c: CodingStyle cleanup
Make (mostly) checkpatch clean.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Rune Torgersen <runet@innovsys.com>
2011-11-07 22:48:26 +01:00
Jason Jin
27f7ae70d6 ColdFire: Fix the compile issue for M52277
After commit 327474f854, the
M52277EVB_stmicro configuration fail to build. Fix it by moving
the env outside the flash and update the lds file.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2011-11-07 22:02:33 +08:00
Fabio Estevam
867b96a5b7 mx31pdk: Enable D and I caches
Enable D and I caches on mx31pdk.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-11-04 22:06:37 +01:00
Fabio Estevam
6bc31fbe08 mx53smd: Remove unused get_board_rev function
No board information is passed for MX53SMD, so remove get_board_rev function.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-11-04 22:06:37 +01:00
Fabio Estevam
d7f71414f4 mx53ard: Remove unused get_board_rev function
No board information is passed for MX53ARD, so remove get_board_rev function.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-11-04 22:06:37 +01:00
Fabio Estevam
850f4d6773 mx53evk: Remove unused get_board_rev function
No board information is passed for MX53EVK, so remove get_board_rev function.

Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
2011-11-04 22:06:37 +01:00
Fabio Estevam
aa2bcf4be5 mx53loco: Remove unused get_board_rev function
No board information is passed for MX53LOCO, so remove get_board_rev function.

Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
2011-11-04 22:06:37 +01:00
Jerry Huang
d37be07ee5 powerpc/mpc83xx: Add 512MB DDR support for mpc8360emds
The new MPC8360EMDS board supports 512MB DDR since 2008.

For 512MB DDR:
BAT0 is used for the first 256MB memory, BAT4 is used for the second
256MB memory and the address space of SDRAM follows the DDR, so if the
size of DDR is 256MB, the BAT4 will be used for SDRAM and if the size of
DDR is 512MB, the BAT4 will be used for the second 256MB memory and
there is no BAT for SDRAM.
Therefore, if the size of DDR is 512MB, this patch will use BAT6 for
SDRAM and BAT5 will be used for PCI MEM to replace the BAT6 after the
codes relocates to the DDR.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
CC: Kim Phillips <kim.phillips@freescale.com>
2011-11-03 18:27:56 -05:00
Joe Hershberger
2e651b2483 mpc83xx: Rename CONFIG_SYS_DDR_CONFIG and cleanup DDR csbnds code
Rename CONFIG_SYS_DDR_CONFIG to include which CS it is configuring
Cleanup the setting of the csnbds to respect the setting of
CONFIG_SYS_DDR_SDRAM_BASE
Use __ilog2 instead of writing the code to compute it
Disable unused CS configs
Ensure ddrlaw.bar is configured

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2011-11-03 18:27:56 -05:00
Fabio Estevam
9c818b1b98 mx51evk: Remove unused get_board_rev function
No board information is passed for MX51EVK, so remove get_board_rev function.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-11-03 22:56:19 +01:00
Fabio Estevam
d736ebea1c mx51evk: Use GPIO API for configuring the IOMUX
GPIO API provides mxc_request_iomux function for setting the IOMUX mode.

Use this function instead of directly writing to the IOMUX register.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-11-03 22:56:19 +01:00
Fabio Estevam
1f83d009e4 mx31pdk: Add MC13783 PMIC support
Add MC13783 PMIC support.

Tested by using the 'date' command, which reads the MC13783 RTC registers:

MX31PDK U-Boot > date
Date: 1970-01-01 (Thursday)    Time:  2:22:35

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-11-03 22:56:18 +01:00
Stefano Babic
9d940442d3 MX35: added ESDC structure to imx-regs
The structure and PLL defines are added to
the imx-regs.h file and dropped from board
header files.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-11-03 22:56:17 +01:00