Commit Graph

4465 Commits

Author SHA1 Message Date
Jagannadha Sutradharudu Teki
4d4ec9927f sf: probe: Add new spi_flash_probe support
Added new spi_flash_probe support, currently added N25Q*
flash part attributes support.

Updated the sector_size attributes as per the flash parts.
Looks fine for with this sector_size for computing the size
of flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:41 +05:30
Jagannadha Sutradharudu Teki
4d5e29a680 sf: Divide spi_flash into multiple parts
Divided the spi_flash framework into mutiple parts for
- spi_flash.c:
        spi flash core file, interaction for spi/qspi driver to
        spi_flash framework.
- spi_flash_ops.c
        spi flash preffered operations, erase,write and read.
- spi_flash_probe.c
        spi flash probing, easy to extend probing functionality.

This change will support to extend the functionality in a
proper manner.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2013-10-07 17:55:41 +05:30
Tom Rini
6297872cd5 Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-10-02 11:45:22 -04:00
Albert ARIBAUD
f04c537629 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2013-10-02 14:53:27 +02:00
Julius Werner
5077f96f10 usb: ehci: Fix test mode for connected ports
The EHCI controller has some very specific requirements for the USB 2.0
port test modes, which were not closely followed in the initial test
mode commit. It demands that the host controller is completely shut down
(all ports suspended, Run/Stop bit unset) when activating test mode, and
will not work on an already enumerated port.

This patch fixes that by introducing a new ehci_shutdown() function that
closely follows the procedure listed in EHCI 4.14. Also, when we have
such a function anyway, we might as well also use it in
usb_lowlevel_stop() to make the normal host controller shutdown cleaner.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
2013-09-27 16:20:52 +02:00
Bo Shen
4585fc5863 USB: gadget: atmel: disconnect before unbind
When unbind the gadget driver, need call disconnect first.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
2013-09-24 17:51:36 +02:00
Lukasz Majewski
a6921adcf2 usb:g_dnl:dfu: Download gadget and DFU function code clean up
The download gadget code and DFU function lacks of proper declarations
for the case when a target board wants to use only one of available usb
functions.

Moreover the relevant declarations have been moved to consistent
localization (like <dfu.h>).

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
2013-09-24 17:51:36 +02:00
Lukasz Majewski
69d6cbe748 usb:gadget:Remove redundant #includes for USB composite gadget and its functions
Only the <linux/usb/gadget.h> requires error.h include. Hence, several
includes of error.h at USB gadget functions are not needed.

Moreover unnecessary malloc.h includes were also removed.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
2013-09-24 17:51:36 +02:00
Lukasz Majewski
ba4e95c9f0 usb:g_dnl:ums: Conditional compilation for mass storage function (f_mass_storage)
The mass storage composite function is now compiled in only when
CONFIG_USB_GADGET_MASS_STORAGE is defined.
Such change provides binary size reduction for boards which use USB
download gadget (like am335x_evm) with DFU, but don't use UMS.

For example at am335x_evm board reduction is more than 2KiB for
text and around 120B for data.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
2013-09-24 17:51:35 +02:00
Afzal Mohammed
a9479f0431 dfu: ram support
DFU spec mentions it as a method to upgrade firmware (software stored
in writable non-volatile memory). It also says other potential uses of
DFU is beyond scope of the spec.

Here such a beyond the scope use is being attempted - directly pumping
binary images from host via USB to RAM. This facility is a developer
centric one in that it gives advantage over upgrading non-volatile
memory for testing new images every time during development and/or
testing.

Directly putting image onto RAM would speed up upgrade process. This and
convenience was the initial thoughts that led to doing this, speed
improvement over MMC was only 1 second though - 6 sec on RAM as opposed
to 7 sec on MMC in beagle bone, perhaps enabling cache and/or optimizing
DFU framework to avoid multiple copy for ram (if worth) may help, and
on other platforms and other boot media like NAND maybe improvement
would be higher.

And for a platform that doesn't yet have proper DFU suppport for
non-volatile media's, DFU to RAM can be used.

Another minor advantage would be to increase life of mmc/nand as it
would be less used during development/testing.

usage: <image name> ram <start address> <size>
eg. kernel ram 0x81000000 0x1000000

Downloading images to RAM using DFU is not something new, this is
acheived in openmoko also.

DFU on RAM can be used for extracting RAM contents to host using dfu
upload. Perhaps this can be extended to io for squeezing out register
dump through usb, if it is worth.

Signed-off-by: Afzal Mohammed <afzal.mohd.ma@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Gerhard Sittig <gsi@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Heiko Schocher <hs@denx.de>
2013-09-24 17:51:35 +02:00
Afzal Mohammed
5a127c8433 dfu: unify mmc/nand read/write ops enum
MMC and NAND independently defines same enumerators for read/write.
Unify them by defining enum in dfu header. RAM support that is being
added newly also can make use of it.

Signed-off-by: Afzal Mohammed <afzal.mohd.ma@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2013-09-24 17:51:35 +02:00
Lukasz Majewski
765c5ae5bc dfu: Extract common DFU code to handle "dfu_alt_info" environment variable
New dfu_init_env_entities() function has been extracted from cmd_dfu.c and
stored at dfu core.

This is a dfu centric code, so it shall be processed in the core.

Change-Id: I756c5de922fa31399d8804eaadc004ee98844ec2
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Heiko Schocher <hs@denx.de>
2013-09-24 17:51:35 +02:00
Bo Shen
9e40493fd8 USB: gadget: add atmel usba udc driver
Add atmel usba udc driver support, porting from Linux kernel

The original code in Linux Kernel information is as following

commit e01ee9f509a927158f670408b41127d4166db1c7
Author: Jingoo Han <jg1.han@samsung.com>
Date:   Tue Jul 30 17:00:51 2013 +0900

    usb: gadget: use dev_get_platdata()

    Use the wrapper function for retrieving the platform data instead of
    accessing dev->platform_data directly.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
2013-09-24 17:51:35 +02:00
Troy Kisky
898d686eea usb: gadget: config: fix unaligned access issues
As seen with codesourcery compiler 2010q1, the buf pointer in
usb_request structure is not aligned on 4 bytes boundary causing
data aborts in eth_setup -> conf_buf -> usb_gadget_config_buf.
Make it as align access to fix this issue.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
[voice.shen@atmel.com: add commit message]
Signed-off-by: Bo Shen <voice.shen@atmel.com>
2013-09-24 17:51:35 +02:00
Lukasz Majewski
a7d2c3cdf2 dfu:cosmetic: Fix printf text for buffer overflow condition
Correct error message if overflow is detected.

Change-Id: I8a915c7353d49822c046fbc36241237b370e6c98
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
2013-09-24 17:51:35 +02:00
Joel Fernandes
5290759cc4 usb: gadget: Fix data aborts during USB ethernet boot
As seen on GCC 4.6 Linaro compiler, control_req buffer is not aligned
on 4 byte boundaray causing data aborts in eth_setup -> conf_buf
during dhcp boot over usb_ether. Fix the issue my aligning control_req
buffer using DEFINE_CACHE_ALIGN_BUFFER.

Tested on am335x_evm platform (beaglebone).
Applies on 2013.10-rc1 branch.

Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Joel Fernandes <joelf@ti.com>
2013-09-24 17:51:34 +02:00
Dani Krishna Mohan
6b40852da5 Sound: MAX98095: Support I2S0 channel
This patch modifies the MAX98095 audio codec to support
 I2S0 channel in codec slave mode.

Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
2013-09-24 09:10:33 -04:00
Dani Krishna Mohan
5fb5b15541 Sound: I2S: Replacing I2S1 with I2S0 channel.
This patch makes required changes to make use
of I2S0 channel instead of I2S1 channel on exynos5250.

Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
2013-09-24 09:10:33 -04:00
Dani Krishna Mohan
3dd22a37aa ARM: Added I2S0 clocks for audio
This patch makes the necessary changes for making use of
I2S0 channel instead of I2S1 channel on smdk board. This
changes are done to maintain the uniformity to use I2S0 channel.

Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
2013-09-24 09:10:33 -04:00
Dani Krishna Mohan
d981d80d74 Sound: WM8994: Support I2S0 channel
This patch modifies the WM8994 codec to support I2S0 channel
in codec slave mode

Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
2013-09-24 09:10:33 -04:00
Heiko Schocher
93ff255298 net, phy, cpsw: fix NULL pointer deference
if phy_connect() did not find a phy, phydev is NULL and
following code in cpsw_phy_init() crashes. Fix this.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Tom Rini <trini@ti.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
2013-09-20 16:57:40 -04:00
Tom Rini
d0b961684e Merge branch 'master' of git://git.denx.de/u-boot-mmc 2013-09-20 14:06:10 -04:00
Juhyun \(Justin\) Oh
2c011847c1 Fix wrong sdhci host control register read and write
The patch fixes the improper read and write of sdhci
host control register for sdma transfer.

The problem comes when reading and writing 1 byte long
host control register with the sdhci_readl() and
sdhci_writel(). The misuse of these functions overwrite
the value of the next registers which are in 4 bytes boundary.

This patch replaces four byte register read/write functions
with one byte read/write ones. Beside, it eliminates
unnecessary bit operation. i.e. or-ing zero against a variable.

Signed-off-by: Juhyun (Justin) Oh <Juhyun_Oh@sigmadesigns.com>
2013-09-20 19:02:29 +03:00
Mischa Jonker
21bd5761a6 mmc/dw_mmc: Allocate the correct amount of descriptors
This fixes two issues:
 * a descriptor was allocated for every block, while a descriptor can
   take 8 blocks
 * there was an off-by-one error in the descriptor preparation: there
   were two last descriptors, one with length==0

Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Andy Fleming <afleming@gmail.com>
2013-09-20 18:59:11 +03:00
Mischa Jonker
2136d22630 mmc/dw_mmc: Fix DMA descriptor corruption
In dwmci_prepare_data, the descriptors are allocated for DMA transfer.
These are allocated using the ALLOC_CACHE_ALIGN_BUFFER. This macro uses
the stack to allocate these descriptors. This becomes a problem if the
DMA transfer continues after the processor leaves the function in which
the descriptors were allocated.

Therefore, I have moved the allocated of the buffers up one level, to
dwmci_send_cmd(). The DMA transfer should be complete when leaving this
function.

Signed-off-by: Mischa Jonker <mjonker@synopsys.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Andy Fleming <afleming@gmail.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-09-20 18:59:11 +03:00
Paul Burton
da61fa5f42 mmc: don't support write & erase for SPL builds
For SPL builds this is just dead code since we'll only need to read.
Eliminating it results in a significant size reduction for the SPL
binary, which may be critical for certain platforms where the binary
size is highly constrained.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-09-20 18:58:55 +03:00
Fabio Estevam
fd37f195ca net: fec_mxc: Fix timeouts during tftp transfer
Performing tftp transfers on mx28 results in random timeouts.

Hector Palacios and Robert Hodaszi analyzed the root cause being related to the
wrong alignment of the 'buff' buffer inside fec_recv().

Benoît Thébaudeau provided an excellent analysis of the alignment bug that is
present on older versions, such as GCC 4.5.4:

http://marc.info/?l=u-boot&m=137942904906131&w=2

Use ALLOC_CACHE_ALIGN_BUFFER() to avoid alignment issues from older GCC
versions.

Reported-by: Hector Palacios <hector.palacios@digi.com>
Tested-by: Oliver Metz <oliver@freetz.org>
Tested-by: Hector Palacios <hector.palacios@digi.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
2013-09-20 17:55:37 +02:00
Fabio Estevam
7df51fd8be net: fec_mxc: Add support for mx6 solo-lite
Similarly as mx25 and mx53, mx6solo-lite needs to setup the MII gasket for RMII
mode.

Add support for mx6solo-lite.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-09-20 17:55:36 +02:00
Fabio Estevam
3f786a8b6f mmc: fsl_esdhc: Check the result from malloc()
malloc can fail, so we should better check its return value before using it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2013-09-20 17:55:36 +02:00
Philip, Avinash
b04601a7f0 drivers/power/pmic: Add tps65910 driver
Add a driver for the TPS65910 PMIC that is found in the AM335x GP EVM,
AM335x EVM SK and others.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>
[trini: Split and rework Avinash's changes into new drivers/power
framework]
Signed-off-by: Tom Rini <trini@ti.com>
2013-09-20 11:01:26 -04:00
Greg Guyotte
8b65b12a04 drivers/power/pmic: Add tps65217 driver
Add a driver for the TPS65217 PMIC that is found in the Beaglebone
family of boards.

Signed-off-by: Greg Guyotte <gguyotte@ti.com>
[trini: Split and rework Greg's changes into new drivers/power
framework]
Signed-off-by: Tom Rini <trini@ti.com>
2013-09-20 11:01:26 -04:00
Wolfgang Denk
1b387ef55c SPDX: fix IBM-pibs license identifier
The SPDX License List version 1.19 now contains an official entry for
the IBM-pibs license.  However, instead of our suggestion "ibm-pibs",
the SPDX License List uses "IBM-pibs", with the following rationale:
"The reason being that all other SPDX License List short identifiers
tend towards using capital letters unless spelling a word.  I'd prefer
to be consistent to this end".

Change the license IDs to use the official name.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2013-09-20 10:30:54 -04:00
Robert P. J. Day
1bce2aeb6f Cosmetic: Fix a number of typos, no functional changes.
Fix various misspellings of things like "environment", "kernel",
"default" and "volatile", and throw in a couple grammar fixes.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2013-09-20 10:30:54 -04:00
Robert P. J. Day
1f8b546f9e Fix some obvious typos across multiple subsystems.
Typoes fixed:

  "partion" -> "partition"
  "retrive", "retreive" -> "retrieve"
  "th" -> "to"

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2013-09-20 10:29:48 -04:00
Masahiro Yamada
82cecfce3f drivers: s3c44b0_rtc: delete an unused driver
Since commit 5dc5f36 removed B2 board support,
there are no boards enabling s3c44b0_rtc.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Andrea Scian <andrea.scian@dave-tech.it>
2013-09-19 09:52:08 +02:00
Masahiro Yamada
d964df322f drivers: serial_s3c44b0: delete an unused driver
Since commit 5dc5f36 removed B2 board support,
there are no boards enabling serial_s3c44b0.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Andrea Scian <andrea.scian@dave-tech.it>
2013-09-19 09:52:04 +02:00
Masahiro Yamada
a341f649d7 drivers: s3c44b0_i2c: delete an unused driver
Since commit 5dc5f36 removed B2 board support,
there are no boards enabling s3c44b0_i2c.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Andrea Scian <andrea.scian@dave-tech.it>
Acked-by: Heiko Schocher <hs@denx.de>
2013-09-19 09:51:52 +02:00
Paul Burton
5619682664 mmc: don't call *printf or puts when SPL & !CONFIG_SPL_LIBCOMMON_SUPPORT
If we don't have CONFIG_SPL_LIBCOMMON_SUPPORT defined then stdio
& *printf functions are unavailable & calling them will cause a link
failure.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2013-09-17 20:03:44 +03:00
Lubomir Popov
152ba36362 ARM: OMAP: Enable 8-bit eMMC access for OMAP4/5/DRA7xx
Enable 8-bit host capability for HSMMC2 and/or HSMMC3. CONFIG_HSMMC2_8BIT
(for OMAP4/5/DRA7xx) and/or CONFIG_HSMMC3_8BIT (for DRA7xx only) must be
defined in the board header if an 8-bit eMMC device is connected to the
corresponding port.

Fix the "No status update" error that appeared for eMMC devices by
inserting a 20 us delay between writing arguments and command. This
solution has been proposed by Michael Cashwell <mboards@prograde.net>.

A minor cosmetic fix in a comment as well.

Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
2013-09-17 20:03:44 +03:00
Oleksandr Tyshchenko
61a6cc27bc omap_hsmmc: omap4+/am335x: modify MMC controller internal fsm reset func
"mmc_send_cmd: timeout: No status update" error sometimes happens in
omap_hsmmc driver func mmc_send_cmd() when the MMC controller card
identification and selection sequence is executed for eMMC on OMAP4
boards.

It happens due to incorrect execution of CMD line reset procedure
for OMAP4. Because CMD(DAT) lines reset procedures are slightly
different for OMAP3 and OMAP4(AM335x,OMAP5,DRA7xx).

According to OMAP3 TRM:
Set SRC(SRD) bit in MMCHS_SYSCTL register to 0x1 and wait until
it returns to 0x0.

According to OMAP4(AM335x,OMAP5,DRA7xx) TRMs, CMD(DATA) lines reset
procedure steps must be as follows:
1. Initiate CMD(DAT) line reset by writing 0x1 to SRC(SRD) bit in
   MMCHS_SYSCTL register (SD_SYSCTL for AM335x).
2. Poll the SRC(SRD) bit until it is set to 0x1.
3. Wait until the SRC(SRD) bit returns to 0x0
  (reset procedure is completed).

Unfortunately, at present omap_hsmmc driver has support only for
OMAP3. And as result step #2 is missing for OMAP4(AM335x,OMAP5,DRA7xx).
This sometimes leads to the fact that the waiting loop which is
required in step #3 does not executed, because SRC bit does not set
yet (at the moment of checking a condition of a loop execution).
And as a result this can cause to timeout error when sending a
next command.

In the particular case (working with eMMC witch do not respond to
some SD specific command) due to incorrect reset sequence after
command SD_CMD_SEND_IF_COND which finished with CTO flag within
64 clock cycles, the next command MMC_CMD_APP_CMD leads to a
timeout error within 1s.

So, extend CMD(DATA) lines reset procedure in func
mmc_reset_controller_fsm() by adding the missing step #2 for
OMAP4+/AM335x boards.

Signed-off-by: Oleksandr Tyshchenko <oleksandr.tyshchenko@ti.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-09-17 20:03:44 +03:00
Oleksandr Tyshchenko
c30054ba94 mmc: Remove unused variable backup from mmc_send_cmd()
Do not call a memset for unused variable backup every time.
Remove unused variable from function.

Signed-off-by: Oleksandr Tyshchenko <oleksandr.tyshchenko@ti.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-09-17 20:03:44 +03:00
Jaehoon Chung
113e5dfcd7 mmc: sdhci: use the SDHCI_QUIRK_USE_WIDE8 for samsung SoC
Samsung SoC is supported the WIDE8, even if Controller version is v2.0.
So add the SDHCI_QUIRK_USE_WIDE8 for Samsung-SoC.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2013-09-17 20:03:43 +03:00
Tom Rini
bc23d96b75 Merge branch 'master' of git://git.denx.de/u-boot-spi 2013-09-16 20:02:50 -04:00
Stefano Babic
c4a7ece020 Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
	MAINTAINERS
	boards.cfg

Signed-off-by: Stefano Babic <sbabic@denx.de>
2013-09-13 12:10:07 +02:00
Tom Rini
7bcee5f7ee Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-09-12 09:08:24 -04:00
Albert ARIBAUD
5480ac3217 Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'
Conflicts:
	tools/Makefile
2013-09-11 09:59:27 +02:00
Elie De Brauwer
a8f2d0e675 mxs_nand: Fix ECC strength for NAND flash with OOB size of 224
On a board with an i.mx28 and a Micron MT29F4G08ABAEAH4, Linux says:

NAND device: Manufacturer ID: 0x2c, Chip ID: 0xdc (Micron MT29F4G08ABAEAH4),
512MiB, page size: 4096, OOB size: 224) the ECC strength is 16.

root@(none):/sys/devices/virtual/mtd/mtd0# for i in ecc_strength oobsize subpagesize; do echo $i = `cat $i`; done
ecc_strength = 16
oobsize = 224
subpagesize = 4096

The ECC strength was not properly discovered by U-Boot causing the data
written by Linux to return an -74 (EBADMSG) when read from U-Boot. This
patch fixes mxs_nand_get_ecc_strength() to function in case of a NAND
flash with page_data_size = 4096 and page_oob_size= 224.

Signed-off-by: Elie De Brauwer <eliedebrauwer@gmail.com>
Acked-by: Scott Wood <scottwood@freescale.com>
2013-09-11 09:33:36 +02:00
Tom Rini
47f75cf2e1 Merge branch 'master' of git://git.denx.de/u-boot-arm 2013-09-06 20:25:35 -04:00
Rob Herring
344ca0b40c ahci: convert to use libata functions and definitions
libata already has similar functions as implemented in the ahci code.
Refactor the code to use the libata variants and remove the dependency on
ata.h. Convert some defines to use the version from libata.h. Also, remove
some unnecessary memset's of bss data.

This is a step toward hopefully merging ahci.c and dw_ahsata.c which are
essentially the same driver.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-09-06 13:09:07 -04:00
Rob Herring
7610b41ddf ahci: increase spin-up timeout to 20 sec
Based on Linux libata code, most drives are less than 10 sec, but some
need up to 20 sec.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: Tom Rini <trini@ti.com>
2013-09-06 13:09:07 -04:00