With gcc 4.9, it produces the following warnings:
CC board/tqc/tqm834x/tqm834x.o
board/tqc/tqm834x/tqm834x.c: In function 'initdram':
board/tqc/tqm834x/tqm834x.c:325:12: warning: iteration 3u invokes undefined behavior [-Waggressive-loop-optimizations]
(((base + size - 1) >> CSBNDS_EA_SHIFT) &
^
board/tqc/tqm834x/tqm834x.c:80:2: note: containing loop
for(cs = 0; cs < 4; ++cs) {
^
There is an integer overflow when cs = 3. To fix it, change
parameters of set_cs_bounds() to ulong.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Currently buildman fails to build sh7753evb and reports the following:
board/renesas/sh7753evb/built-in.o: In function 'init_gether_mdio':
board/renesas/sh7753evb/sh7753evb.c:94: undefined reference to 'PMB_ADDR_BASE'
board/renesas/sh7753evb/sh7753evb.c:94: undefined reference to 'PMB_DATA_BASE'
board/renesas/sh7753evb/sh7753evb.c:94: undefined reference to 'mk_pmb_addr_val'
board/renesas/sh7753evb/sh7753evb.c:94: undefined reference to 'mk_pmb_data_val'
make: *** [u-boot] Error 1
The fix is to wrap any codes that access these macros with CONFIG_SH_32BIT.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
BUILD_BUG_* macros have been defined in several headers. It would
be nice to collect them in include/linux/bug.h like Linux.
This commit is cherry-picking useful macros from include/linux/bug.h
of Linux 4.4.
I did not import BUILD_BUG_ON_MSG() because it would not work if it
is used with include/common.h in U-Boot. I'd like to postpone it
until the root cause (the "error()" macro in include/common.h causes
the name conflict with "__attribute__((error()))") is fixed.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Use existing library function to poll bit(s).
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
Add function to poll register waiting for specific bit(s).
Similar functions are implemented in few drivers - they are almost
identical and can be generalized.
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
clang-3.8 reports that these functions are unused, remove them. As this
is the last part of CONFIG_MODEM_SUPPORT_DEBUG, drop that from README.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This is already defined in ide.h, which part.h includes. So we don't need
the duplicate typedef. At least with my old blackfin gcc 4.3.5 tool chain,
this causes an error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
This enables boards to choose where to/from the environment should be
saved/loaded. They can then for example support using the same device
(dynamically) from which the bootloader was launched to load and save
env data and do not have to define CONFIG_SYS_MMC_ENV_DEV statically.
In my use case, the environment needs to be on the same device I
booted from. It can be the eMMC or an optional SD card.
I therefore would override mmc_get_env_dev in the board code, read the
CPU registers to determine where we booted from and return the
corresponding device index.
Cc: Tom Rini <trini@konsulko.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
clang-3.8 reports that serial_putc_raw_dev in serial_ns16550.c is
unused. Further investigation shows that we have 3 places that
implement this function and no callers, remove.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Variable _load_end_ points to end address of uncompressed buffer
(*not* uncomress_buffer_end / sizeof(ulong)), so multipling uncompressed
size with sizeof(ulong) is grossly incorrect in flush_cache().
It might lead to access of address beyond valid memory range and hang the CPU.
Tested on MIPS architecture by using compressed(gzip, lzma)
and uncompressed uImage.
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
For compatibility clang will report some gcc version. However since we
are checking gcc versions in order to then fail to build, we should
limit these tests only to when we are using gcc and not clang.
Signed-off-by: Tom Rini <trini@konsulko.com>
Adapted from:
>From 5631d9c429857194bd55d7bcd8fa5bdd1a9899a3 Mon Sep 17 00:00:00 2001
From: Michal Marek <mmarek@suse.com>
Date: Wed, 19 Aug 2015 17:36:41 +0200
Subject: [PATCH 1/1] kbuild: Fix clang detection
We cannot detect clang before including the arch Makefile, because that
can set the default cross compiler. We also cannot detect clang after
including the arch Makefile, because powerpc wants to know about clang.
Solve this by using an deferred variable. This costs us a few shell
invocations, but this is only a constant number.
Reported-by: Behan Webster <behanw@converseincode.com>
Reported-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Michal Marek <mmarek@suse.com>
in the Linux kernel.
This will allow us to make better decisions about when to run tests
later on for gcc features.
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that they are in their own directory, we can remove this prefix.
This makes it easier to find a file since the prefix does not get in the
way.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
There are a lot of unrelated files in common, including all of the commands.
Moving them into their own directory makes them easier to find and is more
logical.
Some commands include non-command code, such as cmd_scsi.c. This should be
sorted out at some point so that the function can be enabled with or without
the associated command.
Unfortunately, with m68k I get this error:
m68k: + M5329AFEE
+arch/m68k/cpu/mcf532x/start.o: In function `_start':
+arch/m68k/cpu/mcf532x/start.S:159:(.text+0x452): relocation truncated to fit: R_68K_PC16 against symbol `board_init_f' defined in .text.board_init_f section in common/built-in.o
I hope someone can shed some light on what this means. I hope it isn't
depending on the position of code in the image.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Until we have a proper video uclass we can use syscon to handle the GMA
device, and avoid the special device tree and PCI searching. Update the code
to work this way.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Each system controller can have a number to identify it. It can then be
accessed using syscon_get_by_driver_data(). Put this in a shared header
file and update the only current user.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
U-Boot does not support SMM yet, so we can drop this code. It is easy to
bring back when needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is not used on link which is the only ivybridge board. Drop this code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is not needed. On reset wake-on-disconnect is already set. It may a
problem during a soft reset or resume, but for now it does not seem
important. Also drop the command register update since PCI auto-config
does it for us.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This function is called all over the place. Convert it use the driver model
PCI API, and rationalise the calls.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This code relates to the PCH, so we should move it into the same file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
SDRAM init needs access to the Northbridge controller and the Intel
Management Engine device. Add the latter to the device tree and convert all
of this code to driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We will use a system controller to model the Intel Management Engine. Enable
this for link.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Convert this function to use the the driver model PCI API. We just need
to pass in the northbridge device.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Convert the top part of the DRAM init to use the driver model PCI API.
Further work will complete the transformation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Convert this function over to use the driver model PCI API. In this case
we want to avoid using the real PCI devices since they have not yet been
probed. Instead, write directly to their PCI configuration address.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Move the init code into the I2C driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is used on most Intel platforms. We don't have a driver for it yet, but
add a stub to handle the init. For now this targets ivybridge so we may want
to add a device tree binding and generalise it when other platforms are
supported.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Adjust this code to use the driver model PCI API. This is all called through
lpc_init_extra().
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
There is nothing special about the ivybridge pci driver now, so just use
the generic one.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Drop the lpc_init_extra() function and just use the post-relocation LPC
probe() instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This graphics init code is best placed in the gma init code. Move the code
and drop the function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Adjust the functions in this file to use the driver model PCI API.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Instead of manually initing the device, probe the SATA device and move the
init there.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The SATA device needs to set itself up so that it appears correctly on the
PCI bus. The easiest way to do this is to set it up to probe before
relocation. This can do the early setup.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a uclass ID for a disk controller. This can be used by AHCI/SATA or
other controller types. There are no operations and no interface so far,
but it is possible to probe a SATA device.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Adjust most of the remaining functions in this file to use the driver model
PCI API. The one remaining function is bridge_silicon_revision() which will
need a little more work.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Instead of calling the northbridge and PCH init from bd82x6x_init_extra()
when the PCI bus is probed, call it from the respective drivers. Also drop
the Northbridge init as it has no effect. The registers it touches appear to
be read-only.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These devices currently need to be inited early in boot. Once we have the
init in the right places (with each device doing its own init and no
problems with ordering) we should be able to remove this. For now it is
needed to keep things working.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When the final MRC cache record is the same as the one we want to write, we
skip writing since there is no point. This is normal behaviour.
Avoiding printing an error when this happens.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
There are no other implementations of this function, and boards that need it
can implement a CPU driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
