Commit Graph

86920 Commits

Author SHA1 Message Date
Emanuele Ghidoli
1c64b98c1e common/memsize.c: Fix get_ram_size() when cache is enabled
Ensure that every write is flushed to memory and afterward reads are
from memory.
Since the algorithm rely on the fact that accessing to not existent
memory lead to write at addr / 2 without this modification accesses
to aliased (not physically present) addresses are cached and
wrong size is returned.

This was discovered while working on a TI AM625 based board
where cache is normally enabled, see commit c02712a748 ("arm: mach-k3: Enable dcache in SPL").

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
2023-06-21 16:54:25 -04:00
Emanuele Ghidoli
a1e225b814 sandbox: Add a dummy dcache_status() function
This adds dcache_status() so that code using it can build
without error on sandbox. This is required in preparation
of adding cache handling into get_ram_size function.

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-06-21 16:54:25 -04:00
Tom Rini
43dc016497 Merge branch '2023-06-20-assorted-update' into next
- Assorted updates and improvements
2023-06-21 14:39:38 -04:00
AKASHI Takahiro
230038f8ef test: dm: restore /firmware nodes after testing
dm_test_restore() is called after dm unit test is run.
But this function does not scan any nodes under /firmware since
it calls dm_scan_fdt().

This causes an issue. For instance, scmi_sandbox_agent device
will disappear after running 'ut dm scmi_sandbox_agent'.

So call dm_extended_scan() instead. This change will be coherent
with what dm_scan() and test_pre_run() does.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-06-20 20:56:27 -04:00
Masahiro Yamada
e0afedb640 stdio: Remove stdio_init()
This function is not used by anyone.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-06-20 20:56:27 -04:00
Vignesh Raghavendra
1b086da5cd configs: am64x_evm_*_defconfig: Enable High Secure device support
Enable CONFIG_TI_SECURE_DEVICE to support booting High Secure(HS)
variants of AM64x SoC.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-06-20 16:08:13 -04:00
Masahisa Kojima
7f8062b7e5 configs: synquacer: increase SYS_MALLOC_F_LEN
DM_FLAG_PRE_RELOC flag is added into some drivers
by recent commits such as
1bd790bc4b ("firmware: psci: enable DM_FLAG_PRE_RELOC").
Current SYS_MALLOC_F_LEN of SynQuacer Developerbox platform
is too small, Developerbox will not boot due to lack of
heap memory.

This commit increases the size of heap memory.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-06-20 16:08:13 -04:00
Marek Vasut
bf52766ddc test: bdinfo: Add test for command bdinfo
Add test for command bdinfo .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-06-20 16:08:13 -04:00
Tom Rini
b1574ddebd python: Update requirements.txt for security issues
Per GitHub Dependabot:
- Use setuptools 65.5.1 to avoid some DoS issue
- Use requests 2.31.0 to avoid leaking some proxy information

Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2023-06-20 16:08:13 -04:00
Julien Panis
fb93bd8d26 drivers: spi: omap3_spi: Initialize mode for all channels
At first SPI transfers, multiple chip selects can be
enabled simultaneously. This is due to chip select
polarity, which is not properly initialized for all
channels. This patch fixes the issue.

Signed-off-by: Julien Panis <jpanis@baylibre.com>
2023-06-20 16:08:13 -04:00
Sam Edwards
8dc2c66680 psci: fix use of clobbered registers in asm
The functions `psci_get_context_id` and `psci_get_target_pc`
are written in C, so the C compiler may clobber registers r0-r3.
Do not use these registers to save data across calls.

Signed-off-by: Sam Edwards <CFSworks@gmail.com>
2023-06-20 16:08:13 -04:00
Stefano Babic
50195a2346 mkimage: ecdsa: password for signing from environment
Use a variable (MKIMAGE_SIGN_PASSWORD) like already done for RSA to
allow the signing process to run in batch.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2023-06-20 16:08:13 -04:00
Tom Rini
5f024d10bb usb: eth: lan78xx: Fix logic in lan78xx_read_otp() to avoid a warning
In lan78xx_read_otp() we want to know if sig is LAN78XX_OTP_INDICATOR_1
or LAN78XX_OTP_INDICATOR_2.  In the case of matching the first one we
set offset to itself, and clang warns about this.  Rework the logic so
that if sig is the second indicator we adjust the offset as today and if
it does not match the first indicator we return -EINVAL

Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-06-20 13:02:59 -04:00
Mario Kicherer
1aeedef937 spl: spl-nor: return error if no valid image was loaded
If only FIT images are enabled and loading the FIT image fails,
spl_nor_load_image() should return an error instead of zero.

Without this patch:

>>SPL: board_init_r()
spl_init
Trying to boot from NOR
Unsupported OS image.. Jumping nevertheless..
image entry point: 0x0

With patch:

>>SPL: board_init_r()
spl_init
Trying to boot from NOR
SPL: failed to boot from all boot devices (err=-6)
.### ERROR ### Please RESET the board ###

Signed-off-by: Mario Kicherer <dev@kicherer.org>
2023-06-20 13:02:34 -04:00
Tom Rini
571d8e5734 Merge branch '2023-06-19-spl-nvme-support' into next
To quote the author:
This patchset adds support to load images of the SPL's next booting
stage from a NVMe device
2023-06-20 09:35:16 -04:00
Mayuresh Chitale
02d9c0b0e5 common: spl: Add spl NVMe boot support
Add support to load the next stage image from an NVMe disk which may
be formatted as an EXT or FAT filesystem.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
[trini: Drop hunk changing disk/part.c as that breaks other users]
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-06-19 17:47:41 -04:00
Mayuresh Chitale
32f5e9e5c1 nvme: pci: Enable for SPL
Enable NVME and PCI NVMe drivers for SPL builds. Also enable PCI_PNP
for SPL which is required to auto configure the PCIe devices.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
2023-06-19 17:19:44 -04:00
Mayuresh Chitale
8ce6a2e175 spl: blk: Support loading images from fs
Add a generic API to support loading of SPL payload from any supported
filesystem on a given partition of a block device.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
2023-06-19 17:19:44 -04:00
Mayuresh Chitale
f3228a7232 spl: Add Kconfig options for NVME
Add kconfig options to enable NVME and PCI NVMe support in SPL

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-06-19 17:19:44 -04:00
Michal Simek
bb922ca3eb global: Use proper project name U-Boot (next)
Use proper project name in DTs, messages and READMEs.

Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-06-19 16:45:36 -04:00
Tom Rini
dd9484a828 Merge branch '2023-06-19-corstone1000-fwu-updates' into next
To quote the author:
Now that the nvmxip block driver is merged we can add on top
of it the platform code to use GPT and FWU metadata in the
Corstone1000.

But first, push 2 fixes that are needed to make all this work:
 - move nvmxip header to include
 - setup fwu metadata structures as packed (we have a 32bit
   writer - Secure enclave Cortex-M0 and a 64bit reader host
   Cortex-A35)
2023-06-19 16:43:53 -04:00
Rui Miguel Silva
3e41ebaa46 corstone1000: add nvmxip, fwu-mdata and gpt options
Enable the newest features: nvmxip, fwu-metadata and
gpt. Commands to print the partition info, gpt info
and fwu metadata will be available.

Adjust also env boot script the address of the
bootbank with the new gpt layout, and also remove
the not needed kernel address bank0 and bank1
and retrieve function that would test the bank flag
before and now we are getting the info from the fwu
metadata.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
2023-06-19 14:34:16 -04:00
Rui Miguel Silva
17c744c3ea corstone1000: set kernel_addr based on boot_idx
We need to distinguish between boot banks and from which
partition to load the kernel+initramfs to memory.

For that, fetch the boot index, fetch the correspondent
partition, calculate the correct kernel address and
then set the env variable kernel_addr with that value.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
2023-06-19 14:34:16 -04:00
Rui Miguel Silva
bc91ca4b8b corstone1000: add boot index
it is expected that the firmware that runs before
u-boot somehow provide the information of the bank
for now we will fetch the info from the metadata
since the Secure enclave is the one responsible for
this information.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
2023-06-19 14:34:16 -04:00
Rui Miguel Silva
b3870dd492 corstone1000: add fwu-metadata store info
Add fwu-mdata node and handle for the reference
nvmxip-qspi.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
2023-06-19 14:34:16 -04:00
Rui Miguel Silva
dc3abd8006 nvmxip: move header to include
Move header to include to allow external code
to get the internal bdev structures to access
block device operations.

as at it, just add the UCLASS_NVMXIP string
so we get the correct output in partitions
listing.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
2023-06-19 14:34:16 -04:00
Rui Miguel Silva
2974e2cd28 fwu_metadata: make sure structures are packed
The fwu metadata in the metadata partitions
should/are packed to guarantee that the info is
correct in all platforms. Also the size of them
are used to calculate the crc32 and that is important
to get it right.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-06-19 14:34:16 -04:00
Tom Rini
acfd0ff3cf serial: stm32: Fixes to avoid suprious characters
Use U-Boot device tree to configure MTD partitions stm32mp13 and stm32mp15 boards
 stm32mp: stm32prog: Add support of ENV partition type
 config: stm32mp15: remove CONFIG_FASTBOOT_USB_DEV and CONFIG_FASTBOOT_CMD_OEM_FORMAT
 stm32: Add IWDG handling into PSCI suspend code
 stm32: Fix OF_LIST on DHCOR
 stm32: Add missing header for save_boot_params
 stm32: Use __section(".data") with dot in the section name on DHSOM
 stm32mp: soome changes and fixes for STM32MP13 and STM32MP15 boards
 dts: stm32mp: alignment with v6.3
 dts: stm32f769-disco: remove the dsi_host node
 configs: stm32f746-disco: remove a useless comment
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Merge tag 'u-boot-stm32-20230616' of https://source.denx.de/u-boot/custodians/u-boot-stm into next

serial: stm32: Fixes to avoid suprious characters
Use U-Boot device tree to configure MTD partitions stm32mp13 and stm32mp15 boards
stm32mp: stm32prog: Add support of ENV partition type
config: stm32mp15: remove CONFIG_FASTBOOT_USB_DEV and CONFIG_FASTBOOT_CMD_OEM_FORMAT
stm32: Add IWDG handling into PSCI suspend code
stm32: Fix OF_LIST on DHCOR
stm32: Add missing header for save_boot_params
stm32: Use __section(".data") with dot in the section name on DHSOM
stm32mp: soome changes and fixes for STM32MP13 and STM32MP15 boards
dts: stm32mp: alignment with v6.3
dts: stm32f769-disco: remove the dsi_host node
configs: stm32f746-disco: remove a useless comment
2023-06-16 10:51:58 -04:00
Patrice Chotard
8ab9e8ffdf serial: stm32: BRR must be set only when usart is disable
To avoid spurious chars, BRR register must only be written when
USART is disabled.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-06-16 11:29:29 +02:00
Patrice Chotard
b4dbc5d65a serial: stm32: Wait TC bit before performing initialization
In case there is still chars from previous bootstage to transmit, wait
for TC (Transmission Complete) bit to be set which ensure that the last
data written in the USART_TDR has been transmitted out of the shift
register.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-06-16 11:29:29 +02:00
Dario Binacchi
6d9f86571d configs: stm32f746-disco: remove a useless comment
Commit 8fc78fc73b ("configs: migrate CONFIG_BMP_16/24/32BPP to defconfigs")
made the comment useless.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-06-16 11:25:25 +02:00
Dario Binacchi
13e364b3d2 ARM: dts: stm32f769-disco: remove the dsi_host node
The node has become useless, as described in the
commit 754815b854 ("video: stm32: remove the compatible "synopsys, dw-mipi-dsi" support")

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-06-16 11:24:45 +02:00
Patrick Delaunay
08002ffd08 ARM: dts: stm32mp: alignment with v6.3
Device tree alignment with Linux kernel v6.3:
- f5a058023239 - ARM: dts: stm32: add i2c nodes into stm32mp131.dtsi
- 8539ebb435a5 - ARM: dts: stm32: enable i2c1 and i2c5 on
  stm32mp135f-dk.dts
- 8539ebb435a5 - ARM: dts: stm32: add spi nodes into stm32mp131.dtsi
- 15f72e0da4da - ARM: dts: stm32: add pinctrl and disabled spi5 node in
  stm32mp135f-dk
- ea99a5a02ebc - ARM: dts: stm32: Create separate pinmux for qspi cs pin
  in stm32mp15-pinctrl.dtsi
- a306d8962a24 - ARM: dts: stm32: Rename mdio0 to mdio
- 0a5ebb1f3367 - ARM: dts: stm32: Replace SAI format with dai-format DT
  property
- ccdab19738a6 - ARM: dts: stm32: add adc support to stm32mp13
- 022932ab55fd - ARM: dts: stm32: add adc pins muxing on stm32mp135f-dk
- ab2806ddad9d - ARM: dts: stm32: add dummy vdd_adc regulator on
  stm32mp135f-dk
- e46a180c060f - ARM: dts: stm32: add adc support on stm32mp135f-dk
- 9ebf215fbae1 - ARM: dts: stm32: add PWR fixed regulators on stm32mp131
- 16f4ff60519a - ARM: dts: stm32: add USBPHYC and dual USB HS PHY support
  on stm32mp131
- 4a47f0f3e936 - ARM: dts: stm32: add UBSH EHCI and OHCI support on
  stm32mp131
- 2a46bb66c47f - ARM: dts: stm32: add USB OTG HS support on stm32mp131
- 9ebf215fbae1 - ARM: dts: stm32: add fixed regulators to support usb on
  stm32mp135f-dk
- 16f4ff60519a - ARM: dts: stm32: enable USB HS phys on stm32mp135f-dk
- c4e7254cf6dc - ARM: dts: stm32: enable USB Host EHCI on stm32mp135f-dk
- 44978e135916 - ARM: dts: stm32: add pins for stm32g0 typec controller on stm32mp13
- 4f532403b1e5 - ARM: dts: stm32: enable USB OTG in dual role mode on
  stm32mp135f-dk
- e1f15571c96c - ARM: dts: stm32: add mcp23017 pinctrl entry for stm32mp13
- 6cc71374002e - ARM: dts: stm32: add mcp23017 IO expander on I2C1 on
  stm32mp135f-dk
- 7ffd2266bd32 - ARM: dts: stm32: Fix qspi pinctrl phandle for
  stm32mp15xx-dhcor-som
- 21d83512bf2b - ARM: dts: stm32: Fix qspi pinctrl phandle for
  stm32mp15xx-dhcom-som
- 732dbcf52f74 - ARM: dts: stm32: Fix qspi pinctrl phandle for
  stm32mp151a-prtt1l
- 003b7c6b24f4 - ARM: dts: stm32: remove sai kernel clock on
  stm32mp15xx-dkx
- f2b17b39bfff - ARM: dts: stm32: rename sound card on stm32mp15xx-dkx
- dee3cb759d3d - ARM: dts: stm32: Remove the pins-are-numbered property
- ae8cf3b48727 - ARM: dts: stm32: add i2s nodes on stm32mp131
- 619746a27bd0 - ARM: dts: stm32: add sai nodes on stm32mp131
- c5e05d08ef90 - ARM: dts: stm32: add spdifrx node on stm32mp131
- 0a5afd3ee0d0 - ARM: dts: stm32: add dfsdm node on stm32mp131
- bf9d876bea2e - ARM: dts: stm32: add timers support on stm32mp131
- a3183748371d - ARM: dts: stm32: add timer pins muxing for stm32mp135f-dk
- a9060c1326bc - ARM: dts: stm32: add timers support on stm32mp135f-dk
- a12154058f75 - ARM: dts: stm32: Fix User button on stm32mp135f-dk
- 2f33df889e99 - ARM: dts: stm32: Use new media bus type macros
- 366384e49551 - ARM: dts: stm32: Update part number NVMEM description on
  stm32mp131

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:22:07 +02:00
Patrick Delaunay
763c6b8d7a media: dt-bindings: media: Add macros for video interface bus types
Add a new dt-bindings/media/video-interfaces.h header that defines
macros corresponding to the bus types from media/video-interfaces.yaml.
This allows avoiding hardcoded constants in device tree sources.

Based on linux commit f7eeb0084593 ("media: dt-bindings: media: Add macros
for video interface bus types")

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:22:07 +02:00
Patrick Delaunay
abddd78576 pmic: stpmic1: support new prefix node name for regulator
The '_' character is discouraged in the node name, this patch adds the
new prefix of regulator subnode, with the '-' character, in STM32MP1 driver
to support the new  naming rule in Linux kernel device trees.

It is a preliminary patch before Linux device tree synchronization
for STMicroelectronics boards.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:16:31 +02:00
Patrick Delaunay
bd087f62c9 stm32mp: stm32prog: use the decimal format by default for offset parsing
Change the default base for offset parsing with simple_strtoull(),
so offset in flashlayout is coded in base 10 by default, even if string
start with '0'. The Octal encoding is not supported. The base 16
is still supported when the '0x' header is detected.

This patch solves an unexpected parsing result when the address,
provided by decimal value is starting by 0, for example 0x4400 = 00017408
is a invalid with current code.

...
P	0x04	fsbl1	Binary	mmc0	00017408	        tf-a.stm32
....

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:16:31 +02:00
Patrick Delaunay
09f50c75a1 stm32mp: stm32prog: fix OTP read/write error management
Avoid to ignore the OTP read/write error and transmits the error
to STM32CubeProgrammer.

Today the error is only displayed in log error:
so the user on HOST thinks the OTP operation is performed.

Reported-by: Mickael GARDET <m.gardet@overkiz.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Fixes: 75ea9e75931c ("stm32mp: stm32prog: add TEE support in stm32prog command")
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:16:31 +02:00
Patrick Delaunay
2df7fc0824 configs: stm32mp1: reduce DDR_CACHEABLE_SIZE to supported 256MB DDR
Reduces the CONFIG_DDR_CACHEABLE_SIZE, the size of DDR mapped cacheable
before relocation, to support DDR with only 256MB because the OP-TEE
reserved memory is located at end of the DDR.

By default the new size of 128MB cacheable memory is enough
in dram_bank_mmu_setup() for early_enable_caches() in arch_cpu_init()
and is correct for DDR size = 256MB.

After relocation the real size of DDR, excluding the no-map reserved
memory, is used after the U-Boot device tree parsing.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:16:31 +02:00
Patrick Delaunay
7b802e1acf stm32mp: bsec: add check on null size in misc ops
Add a protection in misc bsec ops for request with null size.

For example OP-TEE error occurs when get_eth_nb() return 0 in
setup_mac_address() for unknown part number because U-Boot read 0 OTPs.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:16:31 +02:00
Patrick Delaunay
6bdef5b767 stm32mp: add support of STM32MP15x Rev.Y
Add support of STM32MP15x Rev.Y for the Silicon revision REV_ID = 0x2003.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:16:31 +02:00
Marek Vasut
0e136ec7fa ARM: stm32: Use __section(".data") with dot in the section name on DHSOM
The correct specifier of the section is ".data" and not "data",
use the former to place the variables in ".data" section.

Fixes: 731fd50e27 ("ARM: stm32: Implement board coding on AV96")
Fixes: 92ca0f7446 ("ARM: dts: stm32: Synchronize DDR setttings on DH SoMs")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-06-16 11:15:01 +02:00
Marek Vasut
9af2ec18b4 ARM: stm32: Add missing header for save_boot_params
The get_stm32mp_rom_api_table() function is defined in sys_params.h ,
add the missing header to avoid compiler warning.

Fixes: dbeaca79b7 ("ARM: stm32: Factor out save_boot_params")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-06-16 11:13:55 +02:00
Tom Rini
2d158d3c38 ARM: stm32: Fix OF_LIST on DHCOR
The ITS file used to build the images here lists three dtb files as
being used. Today, these are built by the logic that will over-build dtb
files based on SOC/etc symbols being set. To future proof this platform
and be generally correct, we list all 3 of the device trees used here in
OF_LIST.

Cc: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-06-16 11:12:06 +02:00
Marek Vasut
715e709038 ARM: stm32: Add IWDG handling into PSCI suspend code
In case the IWDG is enabled by either U-Boot or Linux, the IWDG can never
be disabled again. That includes low power states, which means that if the
IWDG is enabled, the SoC would reset itself after a while in suspend via
the IWDG. This is not desired behavior.

It is possible to enable IWDG pre-timeout IRQ which is routed into the EXTI,
and use that IRQ to wake the CPU up before the IWDG timeout is reached and
reset is triggered. This pre-timeout IRQ can be used to reload the WDT and
then suspend the CPU again every once in a while.

Implement this functionality for both IWDG1 and IWDG2 by reading out all
the unmasked IRQs, comparing the list with currently pending IRQs in GICv3:
- If any IRQ is pending and it is NOT IWDG1 or IWDG2 pre-timeout IRQ,
  wake up and let OS handle the IRQs
- If IWDG1 or IWDG2 IRQ is pending and no other IRQ is pending,
  ping the respective IWDG and suspend again

This does not seem to have any adverse impact on power consumption in suspend.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-06-16 11:09:28 +02:00
Patrick Delaunay
d3126a3293 config: stm32mp15: remove CONFIG_FASTBOOT_CMD_OEM_FORMAT
Remove the support of the fastboot "oem format" command for STM32MP15x
boards and removed the associated env variable "partitions".
This command is not required; with fastboot tool, the GPT partition can
be handle with "flash" command in "gpt" target (=CONFIG_FASTBOOT_GPT_NAME),
for example: fastboot flash gpt gpt.bin

This patch avoids to define the GPT partitioning in U-Boot environment,
which is incompatible with planned modifications, for example to
support TF-A firmware update.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:05:15 +02:00
Patrick Delaunay
30a93729bb config: stm32mp15: remove CONFIG_FASTBOOT_USB_DEV
The CONFIG_FASTBOOT_USB_DEV is used to select USB OTG controller other
than 0 but it is not the case for STM32MP15 boards; it can be removed
to simplify the STM32MP15 defconfig files.

On STM32MP15x boards, we have only one USB device with instance 0,
so the device is hardcoded arch/arm/mach-stm32mp/cpu.c with
the command "fastboot 0" and this define is not used in config files
(include/configs/stm32mp15_st_common.h).

Fixes: 4633fd51c5 ("stm32mp1: activate FASTBOOT on eMMC")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:05:15 +02:00
Patrick Delaunay
dac5b06512 stm32mp: stm32prog: Add support of FWU_MDATA partition type
Add support of "FWU_MDATA" partition type in flashlayout to select
the TF-A firmware update metadata partition type guid, associated to
U-Boot "system" partition type guid, FWU_MDATA_GUID introduced by
commit 2eaedc9516 ("FWU: Add FWU metadata structure and driver for
accessing metadata") and used in gpt_get_mdata_partitions() for
commit 554b38f7a5 ("FWU: Add FWU metadata access driver for GPT
partitioned block devices")

See also recommendation in FWU-PSA-A_DEN0118_1.0ALP3.pdf
  4.1.2 Metadata integration with GPT
  When embedded in a GPT, each metadata replica occupies a single
  partition with PartitionTypeGUID = metadata_uuid.
  UUID = 8a7a84a0-8387-40f6-ab41-a8b9a5a60d23

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:04:41 +02:00
Patrick Delaunay
3a67b61ca0 stm32mp: stm32prog: Add support of ESP partition type
Add support of "ESP" partition type in flashlayout to select
the "EFI System Partition", associated to U-Boot "system"
partition type  guid, PARTITION_SYSTEM_GUID =
C12A7328-F81F-11d2-BA4B-00A0C93EC93B.

This partition is the bootable partition for efi boot.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:04:41 +02:00
Patrick Delaunay
82a4a255aa stm32mp: stm32prog: Add support of ENV partition type
Add support of "ENV" partition type in flashlayout to select
the "u-boot-env" GUID, with PARTITION_U_BOOT_ENVIRONMENT =
3de21764-95bd-54bd-a5c3-4abe786f38a8, that mean a partition
holding a U-Boot environment introduced by
commit c0364ce1c6 ("doc/README.gpt: define partition type
GUID for U-Boot environment")'

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:04:41 +02:00
Patrick Delaunay
90f992e6a5 arm: dts: stm32: Add partitions in flash0 and nand node for stm32mp15xx-dhcom/dhcor
Add partitions subnode in flash0 for stm32mp157xx-dhcom/dhcor boards.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-06-16 11:01:16 +02:00