Commit Graph

84933 Commits

Author SHA1 Message Date
Simon Glass
0086d4e5f1 x86: conga-qeval20-qa3-e3845: Fix up adjustment of CONFIG_TEXT_BASE
With recent CONFIG_TEXT_BASE changes, there are inconsistencies between
several settings.

Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC
cache out of the way too.

Fixes: 388f93f963 ("x86: conga-qeval20-qa3-e3845: Adjust CONFIG_TEXT_BASE")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-03-27 09:38:44 +08:00
Simon Glass
d86de9301b x86: bayleybay: Fix up adjustment of CONFIG_TEXT_BASE
With recent CONFIG_TEXT_BASE changes, there are inconsistencies between
several settings.

Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC
cache out of the way too.

Fixes: f38be30868 ("x86: bayleybay: Adjust CONFIG_TEXT_BASE")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-03-27 09:38:44 +08:00
Simon Glass
f1d87db49b x86: minnowmax: Fix up adjustment of CONFIG_TEXT_BASE
With recent CONFIG_TEXT_BASE changes, there are inconsistencies between
several settings.

Adjust CONFIG_SYS_MONITOR_LEN to allow more code space. Move the MRC
cache out of the way too.

Add documentation on how to make this change safely.

Fixes: 66e2c665f3 ("x86: minnowmax: Adjust CONFIG_TEXT_BASE")
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-03-27 09:38:44 +08:00
Tom Rini
8be7b4629e Pull request for efi-2023.04-rc5
UEFI:
 
 * Create unique device paths for USB devices with the same vendor
   and product id.
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Merge tag 'efi-2023.04-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2023.04-rc5

UEFI:

* Create unique device paths for USB devices with the same vendor
  and product id.
2023-03-25 09:40:19 -04:00
Heinrich Schuchardt
180b7118be efi_loader: fix device-path for USB devices
EFI device paths for block devices must be unique. If a non-unique device
path is discovered, probing of the block device fails.

Currently we use UsbClass() device path nodes. As multiple devices may
have the same vendor and product id these are non-unique. Instead we
should use Usb() device path nodes. They include the USB port on the
parent hub. Hence they are unique.

A USB storage device may contain multiple logical units. These can be
modeled as Ctrl() nodes.

Reported-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-03-25 10:43:50 +01:00
Heinrich Schuchardt
3f26bca262 efi_loader: support for Ctrl() device path node
* Add the definitions for Ctrl() device path nodes.
* Implement Ctrl() nodes in the device path to text protocol.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-03-25 10:43:50 +01:00
Tom Rini
78f67f11a9 Merge branch 'rpi-2023.04' of https://source.denx.de/u-boot/custodians/u-boot-raspberrypi
- Fixes for booting newer revs of the SoC in the Raspberry Pi 4
- Propagate some firmware DT properties to the loaded DT
- Update the Zero2W upstream DT name
2023-03-24 17:00:41 -04:00
Vincent Fazio
85bdd28d2b mmc: bcm2835-host: let firmware manage the clock divisor
Newer firmware can manage the SDCDIV clock divisor register, allowing
the divisor to scale with the core as necessary.

Leverage this ability if the firmware supports it.

Adapted from the following raspberrypi Linux kernel commit:

  bcm2835-sdhost: Firmware manages the clock divisor
  08532d242d

Signed-off-by: Vincent Fazio <vfazio@xes-inc.com>
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2023-03-24 14:43:20 +00:00
Vincent Fazio
0a36afa823 arm: rpi: fallback to max clock rate for MMC clock
In rpi-firmware 25e2b597ebfb2495eab4816a276758dcc6ea21f1,
the GET_CLOCK_RATE mailbox property was changed to return the last
value set by SET_CLOCK_RATE.

https://github.com/raspberrypi/firmware/issues/1619#issuecomment-917025502

Due to this change in firmware behavior, bcm2835_get_mmc_clock now
returns a clock rate of zero since we do not issue SET_CLOCK_RATE.
This results in degraded MMC performance.

SET_CLOCK_RATE fixes the clock to a specific value and disables scaling
so is not an ideal solution.

Instead, fallback to GET_MAX_CLOCK_RATE in bcm2835_get_mmc_clock if
GET_CLOCK_RATE returns zero.

Signed-off-by: Vincent Fazio <vfazio@xes-inc.com>
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2023-03-24 14:43:20 +00:00
Tom Rini
c84a00a647 Merge branch '2023-03-22-assorted-fixes'
- Assorted TI platform fixes, correct location of NXP boot format git
  repository, don't try and mount partitions that are too small to be
  ext4 as ext4, handle .bin files in .gitattributes, flush out panic
  messages for sure, and correct console location on Arm total_compute.
2023-03-22 14:01:01 -04:00
Vignesh Raghavendra
f8461352b8 dma: ti: k3-udma: Fix channel hang on teardown
Setting RX flow error handling will stall the channel until descriptors
are available to move RX data. Setting this bit causes issues when
tearing down ethernet DMA channel at the end of TFTP transfer as
unrelated network packets can cause teardown to stall indefinitely waiting
for driver to queue add more desc leading to channel hang with error
logs:
udma_stop_dev2mem TIMEOUT !
udma_stop_dev2mem: peer not stopped TIMEOUT !
udma_stop_dev2mem TIMEOUT !

Fix this by clearing rx_error_handling similar to how its done for UDMA
as part of udma_alloc_rchan_sci_req()

This fixes occasional TFTP Failures seen when downloading multiple files
one after the other on AM64/AM62 SoCs.

Fixes: 9a92851c33 ("dma: ti: k3-udma: Add BCDMA and PKTDMA support")
Reported-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-03-22 12:51:15 -04:00
Patrick Delaunay
9905cae65e fs: ext4: check the minimal partition size to mount
No need to mount a too small partition to handle a EXT4 file system.

This patch add a test on partition size before to read the
SUPERBLOCK_SIZE buffer and avoid error latter in fs_devread() function.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-03-22 12:51:14 -04:00
Sebastian Andrzej Siewior
a6992bf40d gitattributes: Treat .bin files as binary.
Binary files, which are committed to a private fork of this repository,
will be subject to line feed substitution unless marked as binary.

Mark .bin files as binary.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
2023-03-22 12:51:13 -04:00
Nikhil M Jain
8c47bb9636 configs: am62x_evm_a53_defconfig: Fix SF_DEFAULT_MODE
Setting sf default mode to 0x3 breaks sf update when we do SF read
through u-boot console.

This issue arises when we do a splash image through OSPI flash media,
to fix this set the default mode to 0x0.

Fixes: 04150400c9 ("configs: enable OSPI related configs in AM62x")
Signed-off-by: Nikhil M Jain <n-jain1@ti.com>
2023-03-22 12:51:13 -04:00
annsai01
c48002e663 arm: total_compute: Remap console logs
Remapping console logs from soc uart2 (s1 terminal)
to css non-secure (uart_ap terminal)

Signed-off-by: Annam Sai Manisha <annam.saimanisha@arm.com>
2023-03-22 12:51:11 -04:00
Kamlesh Gurudasani
e8dd304474 configs: am62: move stack and heap to HSM RAM
On high security devices, ROM enables firewalls to protect the OCSRAM
region access during bootup. Only after TIFS has started (and had
time to disable the OCSRAM firewall region) will we have write access to
the region.

This means we will need to move the stack & heap from OCSRAM to HSM RAM
and reduce the size of BSS and the SPL to allow it to fit properly.

To protect us from overflowing our ~256k of HSM SRAM, add limits and
check during the wakeup SPL build.

Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
2023-03-22 12:51:10 -04:00
Kamlesh Gurudasani
d3882531c3 arm: mach-k3: am62: move scratch board area to HSM RAM
On high security devices, ROM enables firewalls to protect the OCSRAM
region access during bootup. Only after TIFS has started (and had
time to disable the OCSRAM firewall region) will we have write access to
the region.

So, move scratch board area to HSM RAM.

Signed-off-by: Kamlesh Gurudasani <kamlesh@ti.com>
2023-03-22 12:51:09 -04:00
Tony Dinh
c5f4cdb8eb console: Use flush() before panic and reset
To make sure the panic and the reset messages will go out, console flush() should be used.
Sleep periods do not work in early u-boot phase when timer driver is not initialized yet.

Reference: https://lists.denx.de/pipermail/u-boot/2023-March/512233.html

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-03-22 12:51:08 -04:00
Fabio Estevam
45156edb16 README.mpc85xx-sd-spi-boot: Suggest the NXP boot format github repo
As explained in the text at the bottom of the page
https://source.codeaurora.org/external/qoriq/qoriq-yocto-sdk/boot-format:

"QUIC repositories on this site will not receive any updates after
March 31, 2022, and will be deleted on March 31, 2023."

Point to the NXP boot format github repo instead.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
2023-03-22 12:51:02 -04:00
Tom Rini
5e207b8517 - odroid-go-ultra: setup PMIC regulators at board init
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Merge tag 'u-boot-amlogic-20230322' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- odroid-go-ultra: setup PMIC regulators at board init
2023-03-22 09:21:41 -04:00
Tom Rini
e37be8484f Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
A single reset controller driver (part of the clock driver) fix
for v2023.04 release.
2023-03-21 11:52:55 -04:00
Tom Rini
51321493eb Merge tag 'u-boot-rockchip-20230319' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Fix for rockchip timer driver;
- Fix for rk3568 and rk3588 boot device and clock driver;
- Fix for rk3568 reset handler;
- Fix for rk3568 sdhci DLL at 52MHz;
2023-03-20 17:52:42 -04:00
Marek Vasut
afafaa2a8f clk: renesas: Pack reset identifier before look up
The reset identifier must be processed via MOD_CLK_PACK() before it is
used to look up register and bit within reset_regs or reset_clear_regs
arrays, otherwise completely bogus register and bit is picked from the
arrays, one which may even be out of range.

Fixes: 326e05c5e2 ("clk: renesas: Add and enable CPG reset driver")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-03-20 02:46:44 +01:00
Johan Jonker
d35a1392c5 arm: dts: rockchip: rk3188-radxarock-u-boot: remove timer compatible replacement
The Rockchip timer driver has been renamed after the fall back compatible.
There's no need to replace the timer compatible in rk3188-radxarock-u-boot.dtsi
anymore, so remove.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-03-19 14:12:01 +08:00
Johan Jonker
791c7ac792 rockchip: timer: rockchip_timer: fix compatible and driver name
In the binding for the Rockchip timer the compatible string
consists of a SoC orientated string and a fall back string
"rockchip,rk3288-timer", so remove all unneeded ones and
fix driver name.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-03-19 14:12:01 +08:00
Vasily Khoruzhick
2321a991bb rockchip: sdhci: rk3568: bypass DLL when clk <= 52 MHz
For Rockchip platform, DLL bypass bit and start bit need to be set if
DLL is not locked.

With this change applied eMMC in my NanoPi R5S can run at 52 MHz.

Based on linux commit b75a52b0dda3 ("mmc: sdhci-of-dwcmshc: Update DLL
and pre-change delay for rockchip platform")

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-03-19 14:12:00 +08:00
Vasily Khoruzhick
9fe2e4ab93 Revert "arm64: dts: rk356x-u-boot: Drop combphy1 assigned-clocks/rates"
This reverts commit 5bec4b0de7851a254fb4447b3599a60f95550141.

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-03-19 14:12:00 +08:00
Vasily Khoruzhick
4340771323 clk: rockchip: rk3568: add stubs for CLK_PCIEPHY_REF clocks
Device tree contains assigned-clock-rates property for these,
but default value will work just fine

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
2023-03-19 14:12:00 +08:00
Jonas Karlman
981f0545d3 rockchip: include: configs: Remove unused SDRAM_BANK_SIZE
Remove unused SDRAM_BANK_SIZE define.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-03-19 13:20:21 +08:00
Jonas Karlman
85db421cdb rockchip: include: configs: Remove dangling comments
This removes dangling comments that no longer serve a purpose and has
been left after conversion of defines to Kconfig option.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-03-19 13:20:21 +08:00
Jonas Karlman
d11f0dac30 mmc: rockchip_dw_mmc: Fix get_mmc_clk return value
The get_mmc_clk ops is expected to set a clock rate and return the
configured rate as an unsigned value. However, if clk_set_rate fails,
e.g. using a fixed rate clock, a negative error value is returned.

The mmc core will treat this as a valid unsigned rate and tries to
configure a divider based on this bogus clock rate.

Use 0 as the return value when setting clock rate fails, the mmc core
will configure to use bypass mode instead of using a bogus divider.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-03-19 13:20:21 +08:00
Jonas Karlman
42a502ad1a rockchip: tinker-rk3288: Use common BOOT_TARGET_DEVICES
Building U-Boot for Tinker Board with USB or NET Kconfig option disabled
result in the following build error:

  In file included from include/configs/rk3288_common.h:29,
                   from include/configs/tinker_rk3288.h:14,
                   from include/config.h:3,
                   from include/common.h:16,
                   from env/common.c:10:
  include/config_distro_bootcmd.h:302:9: error: expected '}' before 'BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB'
    302 |         BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB
        |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  include/config_distro_bootcmd.h:302:9: note: in definition of macro 'BOOTENV_DEV_NAME_USB'
    302 |         BOOT_TARGET_DEVICES_references_USB_without_CONFIG_CMD_USB
        |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  include/configs/tinker_rk3288.h:21:9: note: in expansion of macro 'BOOTENV_DEV_NAME'
     21 |         func(USB, usb, 0) \
        |         ^~~~
  include/config_distro_bootcmd.h:454:25: note: in expansion of macro 'BOOT_TARGET_DEVICES'
    454 |         "boot_targets=" BOOT_TARGET_DEVICES(BOOTENV_DEV_NAME) "\0"
        |                         ^~~~~~~~~~~~~~~~~~~
  include/config_distro_bootcmd.h:474:9: note: in expansion of macro 'BOOTENV_BOOT_TARGETS'
    474 |         BOOTENV_BOOT_TARGETS \
        |         ^~~~~~~~~~~~~~~~~~~~
  include/configs/rk3288_common.h:40:9: note: in expansion of macro 'BOOTENV'
     40 |         BOOTENV
        |         ^~~~~~~
  include/env_default.h:122:9: note: in expansion of macro 'CFG_EXTRA_ENV_SETTINGS'
    122 |         CFG_EXTRA_ENV_SETTINGS
        |         ^~~~~~~~~~~~~~~~~~~~~~
  In file included from env/common.c:32:
  include/env_default.h:29:36: note: to match this '{'
     29 | const char default_environment[] = {
        |                                    ^
  make[2]: *** [scripts/Makefile.build:256: env/common.o] Error 1

The BOOT_TARGET_DEVICES defined in rockchip-common.h include the same
devices as defined in tinker_rk3288.h, remove the board specific one to
fix building with USB or NET option disabled.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-03-19 13:20:21 +08:00
Jonas Karlman
e259f39a12 rockchip: rk3588: Add boot device detection
Enable SPL on RK3588 to detect which device it was booted from.
Fixes use of same-as-spl in u-boot,spl-boot-order prop.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-03-19 13:20:21 +08:00
Jonas Karlman
67a1d773e7 clk: rockchip: rk3588: Fix clk_aux16m in clock driver
The rate and error value is not returned for aux16m clocks, fix this.

Fixes: 7a474df740 ("clk: rockchip: Add rk3588 clk support")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-03-19 13:17:28 +08:00
Peter Geis
a67e219d0c clk: rockchip: rk3568: Fix reset handler
The reset handler for rk3568 is missing its private data. This leads to
an abort when a reset is triggered.

  => reset
  resetting ...
  "Synchronous Abort" handler, esr 0x96000045
  elr: 0000000000a2bc04 lr : 0000000000a2bbd4 (reloc)
  elr: 00000000eff9bc04 lr : 00000000eff9bbd4
  x0 : 00000000fdd20000 x1 : 0000000014000001
  x2 : 000000000000fdb9 x3 : 00000000edf77e88
  x4 : 00000000edf50e78 x5 : 00000000edf77530
  x6 : 000000000000001d x7 : 00000000edf8a1d0
  x8 : 00000000ffffffd8 x9 : 0000000000000008
  x10: 000000000000000d x11: 0000000000000006
  x12: 000000000001869f x13: 0000000086c290c5
  x14: 000000009118e878 x15: 0000000000000000
  x16: 00000000eff9bbb8 x17: 0000000012f8c119
  x18: 00000000edf50dc0 x19: 0000000000000000
  x20: 0000000000000001 x21: 0000000000000000
  x22: 00000000edf85900 x23: 0000000000000001
  x24: 00000000effe8bbc x25: 0000000000000000
  x26: 00000000edf85940 x27: 0000000000000000
  x28: 0000000000000000 x29: 00000000edf3c8e0

  Code: d65f03c0 d5033fbf b9400661 529d9502 (b8216802)
  Resetting CPU ...

Add the missing dev_set_priv to the rk3568 clk driver to fix this.

Fixes: 4a262feba3 ("rockchip: rk3568: add clock driver")
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # radxa-cm3
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-03-19 13:17:28 +08:00
Jonas Karlman
073d911ae6 rockchip: rk3568-rock-3a: Sync device tree from linux
Running U-Boot from eMMC on a ROCK 3 Model A result in the following:

  U-Boot SPL 2023.04-rc3 (Mar 11 2023 - 17:24:48 +0000)
  Trying to boot from MMC1
  Card did not respond to voltage select! : -110
  spl: mmc init failed with error: -95
  SPL: failed to boot from all boot devices
  ### ERROR ### Please RESET the board ###

The sdhci node is missing in board device tree, sync device tree from
linux v6.3-rc1 to fix booting from eMMC. Also disable sdmmc2 and uart1
nodes related to using a WiFi and BT module in the M2 slot.

Fixes: b44c54f600 ("arm64: dts: rockchip: rk3568: Add Radxa ROCK 3 Model A board support")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-03-19 13:17:28 +08:00
Jonas Karlman
42f67fb51c rockchip: rk3568: Fix boot device detection
The boot source node path for emmc is using the old sdhci name.
Replace with correct mmc name and also add same-as-spl to boot order.

Fixes: 0d61f8e5f1 ("rockchip: rk3568: add boot device detection")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-03-19 13:17:28 +08:00
Jonas Karlman
8653e5d3b7 rockchip: Fix early use of bootph props
Running U-Boot on a ROCK 3 Model A result in the following:

  No serial driver found
  resetting ...
  no sysreset
  ### ERROR ### Please RESET the board ###

Replace bootph- props with u-boot,dm- props to fix this.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-03-19 13:17:28 +08:00
Tom Rini
318af47668 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-coldfire 2023-03-15 12:03:17 -04:00
Tom Rini
016d414682 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Per Andre:

[T]hese two patches containing just devicetree updates for
Allwinner boards.
I was still hoping for a review, since we cannot import the files from
the Linux tree verbatim, but managed to write some filter script that
convinced me that the changes are fine.
The files are from Linux v6.2-rc2, but are identical to the v6.2
release.
2023-03-15 12:01:55 -04:00
Angelo Dureghello
791840fdc4 board: m5253demo: remove floating point flash size calculation
This board is using floating point arithmetic to display
the SST39VF6401B flash size.

This actually generates errors with toolchains without
appropriate sw fp math functions available.

SST39VF6401B is the only flash for wich the size is displayed,
it's size is 8192KB and floating point calculation seems not
needed. Removing it.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
2023-03-15 01:52:15 +01:00
Angelo Dureghello
ec4322e70b m68k: add private libgcc ashrdi3
Add ashrdi3.c to private libgcc.

Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
2023-03-15 01:52:02 +01:00
Angelo Dureghello
36a5ebf841 board: amcore: fix config options namespace
Remove CONFIG_ namespace options from .h, moving them to
defconfig, while changing non-defconfig options to CFG_ namespace.

Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>
2023-03-15 01:45:19 +01:00
Angelo Dureghello
7ff7b46e6c m68k: rename CONFIG_MCFTMR to CFG_MCFTMR
This is not a Kconfig option so changing to _CFG.

Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>
2023-03-15 01:41:57 +01:00
Angelo Dureghello
12f5489297 m68k: dts: stmark2: set correct compatible field for spi nor
Fix error:

Invalid chip select 0:1 (err=-19)

update spi nor "compatible" property with "jedec,spi-nor"
to have spi nor properly bound as a child device.

Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>
2023-03-15 01:38:19 +01:00
Angelo Dureghello
1e48392e32 arch: enable private libgcc for m68k
This patch fixes u-boot hanging on the first printf("%x", val).

Some toolchains built without multilib enabled may produce
u-boot freezing on first u64 shift operation, as in
lib/vsprintf.c number() function.
Using our private libgcc solves the issue.

Setting private libgcc enabled at architecture level to avoid
similar issues, it should not harm.

Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>
2023-03-15 01:38:19 +01:00
Angelo Dureghello
461cca7997 board: stmark2: fix clock value
Fix totally blank console at boot, clock value must be decimal,
as for the 30Mhz external crystal.

Fixes: 26e5944ec9 ("stmark2: Migrate CONFIG_SYS_EXTRA_OPTIONS to Kconfig")
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-03-15 01:38:19 +01:00
Angelo Dureghello
8fde9d13b9 m68k: add global variable sdhc_per_clk for m68k
The FSL eSDHC controller supports two reference clocks. They are
platform clock and periperhal clock. The global variable sdhc_clk
has already been used for platform clock.
ColdFire also uses eSHDC controller, as in arm and powerpc,
so adding sdhc_per_clk to arch_global_data.

Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>
2023-03-15 01:38:19 +01:00
Angelo Dureghello
d157a5725a m68k: use longword-based jumps
Increasing of binary size requires longword-based jumps.

Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
2023-03-15 01:38:19 +01:00
Angelo Dureghello
cc1c2a2423 board: amcore: fix u-boot mtd partition
Signed-off-by: Angelo Dureghello <angelo@kernel-space.org>
2023-03-15 01:38:19 +01:00