mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-25 05:04:23 +08:00
Cleanup
This commit is contained in:
Wolfgang Denk
parent
74f4304ee7
commit
fe7eb5d88b
8
Makefile
8
Makefile
@ -1409,7 +1409,7 @@ xtract_int_cm = $(subst integrator$1_,,$(subst _config,,$2))
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integratorap_config : unconfig
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@echo -n "/* Integrator configuration implied " > tmp.fil; \
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echo " by Makefile target */" >> tmp.fil; \
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echo >> tmp.fil
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echo >> tmp.fil
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@echo -n "#define CONFIG_INTEGRATOR 1" >> tmp.fil; \
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echo " /* Integrator board */" >> tmp.fil; \
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echo -n "#define CONFIG_ARCH_INTEGRATOR" >> tmp.fil; \
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@ -1435,7 +1435,7 @@ integratorap_CM10220E_config integratorap_CM1026EJ_S_config \
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integratorap_CM1136JF_S_config : unconfig
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@echo -n "/* Integrator configuration implied " > tmp.fil; \
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echo " by Makefile target */" >> tmp.fil; \
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echo >> tmp.fil
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echo >> tmp.fil
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@echo -n "#define CONFIG_INTEGRATOR 1" >> tmp.fil; \
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echo " /* Integrator board */" >> tmp.fil; \
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echo -n "#define CONFIG_ARCH_INTEGRATOR" >> tmp.fil; \
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@ -1481,7 +1481,7 @@ integratorap_CM1136JF_S_config : unconfig
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integratorcp_config : unconfig
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@echo -n "/* Integrator configuration implied " > tmp.fil; \
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echo " by Makefile target */" >> tmp.fil; \
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echo >> tmp.fil
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echo >> tmp.fil
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@echo -n "#define CONFIG_INTEGRATOR 1" >> tmp.fil; \
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echo " /* Integrator board */" >> tmp.fil; \
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echo -n "#define CONFIG_ARCH_CINTEGRATOR" >> tmp.fil; \
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@ -1520,7 +1520,7 @@ integratorcp_CM10220E_config integratorcp_CM1026EJ_S_config \
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integratorcp_CM1136JF_S_config : unconfig
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@echo -n "/* Integrator configuration implied " > tmp.fil; \
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echo " by Makefile target */" >> tmp.fil; \
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echo >> tmp.fil
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echo >> tmp.fil
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@echo -n "#define CONFIG_INTEGRATOR 1" >> tmp.fil; \
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echo " /* Integrator board */" >> tmp.fil; \
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echo -n "#define CONFIG_ARCH_CINTEGRATOR" >> tmp.fil; \
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@ -49,4 +49,3 @@ distclean: clean
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-include .depend
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#########################################################################
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@ -24,7 +24,7 @@
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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@ -109,17 +109,17 @@ static struct pci_config_table pci_integrator_config_table[] = {
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/* V3 access routines */
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#define _V3Write16(o,v) (*(volatile unsigned short *)(PCI_V3_BASE + (unsigned int)(o)) = (unsigned short)(v))
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#define _V3Read16(o) (*(volatile unsigned short *)(PCI_V3_BASE + (unsigned int)(o)))
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#define _V3Read16(o) (*(volatile unsigned short *)(PCI_V3_BASE + (unsigned int)(o)))
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#define _V3Write32(o,v) (*(volatile unsigned int *)(PCI_V3_BASE + (unsigned int)(o)) = (unsigned int)(v))
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#define _V3Read32(o) (*(volatile unsigned int *)(PCI_V3_BASE + (unsigned int)(o)))
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#define _V3Read32(o) (*(volatile unsigned int *)(PCI_V3_BASE + (unsigned int)(o)))
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/* Compute address necessary to access PCI config space for the given */
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/* bus and device. */
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#define PCI_CONFIG_ADDRESS( __bus, __devfn, __offset ) ({ \
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unsigned int __address, __devicebit; \
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unsigned short __mapaddress; \
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unsigned int __dev = PCI_DEV (__devfn); /* FIXME to check!! (slot?) */ \
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unsigned int __dev = PCI_DEV (__devfn); /* FIXME to check!! (slot?) */ \
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\
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if (__bus == 0) { \
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/* local bus segment so need a type 0 config cycle */ \
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@ -142,10 +142,10 @@ static struct pci_config_table pci_integrator_config_table[] = {
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/* A31-A24 are don't care (so clear to 0) */ \
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__mapaddress = 0x000B; /* 101=>config cycle, 1=>A1&A0 from PCI_CFG */ \
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__address = PCI_CONFIG_BASE; \
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__address |= ((__bus & 0xFF) << 16); /* bits 23..16 = bus number */ \
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__address |= ((__dev & 0x1F) << 11); /* bits 15..11 = device number */ \
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__address |= ((__bus & 0xFF) << 16); /* bits 23..16 = bus number */ \
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__address |= ((__dev & 0x1F) << 11); /* bits 15..11 = device number */ \
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__address |= ((__devfn & 0x07) << 8); /* bits 10..8 = function number */ \
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__address |= __offset & 0xFF; /* bits 7..0 = register number */ \
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__address |= __offset & 0xFF; /* bits 7..0 = register number */ \
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} \
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_V3Write16 (V3_LB_MAP1, __mapaddress); \
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__address; \
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@ -463,7 +463,7 @@ void flash__init (void)
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/*************************************************************
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Routine:ether__init
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Description: take the Ethernet controller out of reset and wait
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for the EEPROM load to complete.
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for the EEPROM load to complete.
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*************************************************************/
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void ether__init (void)
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{
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@ -483,36 +483,36 @@ int dram_init (void)
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* and is a 16-bit counter
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*/
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/* U-Boot expects a 32 bit timer running at CFG_HZ*/
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static ulong timestamp; /* U-Boot ticks since startup */
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static ulong total_count = 0; /* Total timer count */
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static ulong lastdec; /* Timer reading at last call */
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static ulong div_clock = 256; /* Divisor applied to the timer clock */
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static ulong div_timer = 1; /* Divisor to convert timer reading
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* change to U-Boot ticks
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*/
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static ulong timestamp; /* U-Boot ticks since startup */
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static ulong total_count = 0; /* Total timer count */
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static ulong lastdec; /* Timer reading at last call */
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static ulong div_clock = 256; /* Divisor applied to the timer clock */
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static ulong div_timer = 1; /* Divisor to convert timer reading
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* change to U-Boot ticks
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*/
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/* CFG_HZ = CFG_HZ_CLOCK/(div_clock * div_timer) */
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#define TIMER_LOAD_VAL 0x0000FFFFL
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#define READ_TIMER ((*(volatile ulong *)(CFG_TIMERBASE+4)) & 0x0000FFFFL)
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/* all function return values in U-Boot ticks i.e. (1/CFG_HZ) sec
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/* all function return values in U-Boot ticks i.e. (1/CFG_HZ) sec
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* - unless otherwise stated
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*/
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/* starts a counter
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* - the Integrator/AP timer issues an interrupt
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* each time it reaches zero
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/* starts a counter
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* - the Integrator/AP timer issues an interrupt
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* each time it reaches zero
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*/
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int interrupt_init (void)
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{
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/* Load timer with initial value */
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*(volatile ulong *)(CFG_TIMERBASE + 0) = TIMER_LOAD_VAL;
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/* Set timer to be
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* enabled 1
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* free-running 0
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* XX 00
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* divider 256 10
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* XX 00
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* enabled 1
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* free-running 0
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* XX 00
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* divider 256 10
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* XX 00
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*/
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*(volatile ulong *)(CFG_TIMERBASE + 8) = 0x00000088;
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total_count = 0;
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@ -555,10 +555,9 @@ void udelay (unsigned long usec)
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tmo /= (1000000L);
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tmp = get_timer_masked(); /* get current timestamp */
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tmo += tmp; /* wake up timestamp */
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tmo += tmp; /* wake up timestamp */
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while (get_timer_masked () < tmo)/* loop till event */
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{
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while (get_timer_masked () < tmo) { /* loop till event */
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/*NOP*/;
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}
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}
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@ -566,11 +565,11 @@ void udelay (unsigned long usec)
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void reset_timer_masked (void)
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{
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/* reset time */
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lastdec = READ_TIMER; /* capture current decrementer value */
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lastdec = READ_TIMER; /* capture current decrementer value */
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timestamp = 0; /* start "advancing" time stamp from 0 */
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}
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/* converts the timer reading to U-Boot ticks */
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/* converts the timer reading to U-Boot ticks */
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/* the timestamp is the number of ticks since reset */
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/* This routine does not detect wraps unless called regularly
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ASSUMES a call at least every 16 seconds to detect every reload */
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@ -578,14 +577,13 @@ ulong get_timer_masked (void)
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{
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ulong now = READ_TIMER; /* current count */
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if(now > lastdec)
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{
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if (now > lastdec) {
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/* Must have wrapped */
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total_count += lastdec + TIMER_LOAD_VAL + 1 - now;
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total_count += lastdec + TIMER_LOAD_VAL + 1 - now;
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} else {
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total_count += lastdec - now;
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}
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lastdec = now;
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lastdec = now;
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timestamp = total_count/div_timer;
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return timestamp;
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@ -594,7 +592,7 @@ ulong get_timer_masked (void)
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/* waits specified delay value and resets timestamp */
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void udelay_masked (unsigned long usec)
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{
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udelay(usec);
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udelay(usec);
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}
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/*
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@ -1,5 +1,5 @@
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/*
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* Memory setup for integratorAP
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* Memory setup for integratorAP
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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@ -27,4 +27,3 @@
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.globl memsetup
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memsetup:
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mov pc,lr
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@ -42,4 +42,3 @@ reset_cpu:
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reset_failed:
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b reset_failed
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@ -24,7 +24,7 @@
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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@ -108,33 +108,33 @@ int dram_init (void)
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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#ifdef CONFIG_CM_SPD_DETECT
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{
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{
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extern void dram_query(void);
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unsigned long cm_reg_sdram;
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unsigned long sdram_shift;
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dram_query(); /* Assembler accesses to CM registers */
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/* Queries the SPD values */
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/* Queries the SPD values */
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/* Obtain the SDRAM size from the CM SDRAM register */
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cm_reg_sdram = *(volatile ulong *)(CM_BASE + OS_SDRAM);
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/* Register SDRAM size
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*
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* 0xXXXXXXbbb000bb 16 MB
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* 0xXXXXXXbbb001bb 32 MB
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* 0xXXXXXXbbb010bb 64 MB
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* 0xXXXXXXbbb011bb 128 MB
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* 0xXXXXXXbbb100bb 256 MB
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*
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/* Register SDRAM size
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*
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* 0xXXXXXXbbb000bb 16 MB
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* 0xXXXXXXbbb001bb 32 MB
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* 0xXXXXXXbbb010bb 64 MB
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* 0xXXXXXXbbb011bb 128 MB
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* 0xXXXXXXbbb100bb 256 MB
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*
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*/
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sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
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gd->bd->bi_dram[0].size = 0x01000000 << sdram_shift;
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sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
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gd->bd->bi_dram[0].size = 0x01000000 << sdram_shift;
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}
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}
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#endif /* CM_SPD_DETECT */
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return 0;
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@ -147,13 +147,13 @@ extern void dram_query(void);
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/* U-Boot expects a 32 bit timer, running at CFG_HZ */
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/* Keep total timer count to avoid losing decrements < div_timer */
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static unsigned long long total_count = 0;
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static unsigned long long lastdec; /* Timer reading at last call */
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static unsigned long long lastdec; /* Timer reading at last call */
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static unsigned long long div_clock = 1; /* Divisor applied to timer clock */
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static unsigned long long div_timer = 1; /* Divisor to convert timer reading
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* change to U-Boot ticks
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*/
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/* CFG_HZ = CFG_HZ_CLOCK/(div_clock * div_timer) */
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static ulong timestamp; /* U-Boot ticks since startup */
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static ulong timestamp; /* U-Boot ticks since startup */
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#define TIMER_LOAD_VAL ((ulong)0xFFFFFFFF)
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#define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
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@ -169,13 +169,13 @@ int interrupt_init (void)
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/* Load timer with initial value */
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*(volatile ulong *)(CFG_TIMERBASE + 0) = TIMER_LOAD_VAL;
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/* Set timer to be
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* enabled 1
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* periodic 1
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* no interrupts 0
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* X 0
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* divider 1 00 == less rounding error
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* 32 bit 1
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* wrapping 0
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* enabled 1
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* periodic 1
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* no interrupts 0
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* X 0
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* divider 1 00 == less rounding error
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* 32 bit 1
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* wrapping 0
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*/
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*(volatile ulong *)(CFG_TIMERBASE + 8) = 0x000000C2;
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/* init the timestamp */
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@ -219,8 +219,7 @@ void udelay (unsigned long usec)
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tmp = get_timer_masked(); /* get current timestamp */
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tmo += tmp; /* form target timestamp */
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while (get_timer_masked () < tmo)/* loop till event */
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{
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while (get_timer_masked () < tmo) {/* loop till event */
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/*NOP*/;
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}
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}
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@ -228,26 +227,25 @@ void udelay (unsigned long usec)
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void reset_timer_masked (void)
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{
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/* capure current decrementer value */
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lastdec = (unsigned long long)READ_TIMER;
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lastdec = (unsigned long long)READ_TIMER;
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/* start "advancing" time stamp from 0 */
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timestamp = 0L;
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timestamp = 0L;
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}
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/* converts the timer reading to U-Boot ticks */
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/* converts the timer reading to U-Boot ticks */
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/* the timestamp is the number of ticks since reset */
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ulong get_timer_masked (void)
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{
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/* get current count */
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unsigned long long now = (unsigned long long)READ_TIMER;
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if(now > lastdec)
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{
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if(now > lastdec) {
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/* Must have wrapped */
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total_count += lastdec + TIMER_LOAD_VAL + 1 - now;
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total_count += lastdec + TIMER_LOAD_VAL + 1 - now;
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} else {
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total_count += lastdec - now;
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}
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lastdec = now;
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lastdec = now;
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timestamp = (ulong)(total_count/div_timer);
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return timestamp;
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@ -1,5 +1,5 @@
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/*
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* Memory setup for integratorAP
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* Memory setup for integratorAP
|
||||
*
|
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* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
@ -27,4 +27,3 @@
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.globl memsetup
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memsetup:
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mov pc,lr
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@ -14,7 +14,7 @@
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*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
@ -52,8 +52,8 @@ platformsetup:
|
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#ifdef CONFIG_CM_INIT
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/* CM has an initialization register
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* - bits in it are wired into test-chip pins to force
|
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* reset defaults
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* - may need to change its contents for U-Boot
|
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* reset defaults
|
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* - may need to change its contents for U-Boot
|
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*/
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/* set the desired CM specific value */
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@ -65,39 +65,39 @@ platformsetup:
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#if !defined (CONFIG_CM920T) && !defined (CONFIG_CM920T_ETM) && \
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!defined (CONFIG_CM940T)
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#ifdef CONFIG_CM_MULTIPLE_SSRAM
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/* set simple mapping */
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|
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#ifdef CONFIG_CM_MULTIPLE_SSRAM
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/* set simple mapping */
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and r2,r2,#CMMASK_MAP_SIMPLE
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#endif /* #ifdef CONFIG_CM_MULTIPLE_SSRAM */
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#ifdef CONFIG_CM_TCRAM
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/* disable TCRAM */
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#ifdef CONFIG_CM_TCRAM
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/* disable TCRAM */
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and r2,r2,#CMMASK_TCRAM_DISABLE
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#endif /* #ifdef CONFIG_CM_TCRAM */
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#endif /* #ifdef CONFIG_CM_TCRAM */
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|
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#if defined (CONFIG_CM926EJ_S) || defined (CONFIG_CM1026EJ_S) || \
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defined (CONFIG_CM1136JF_S)
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and r2,r2,#CMMASK_LE
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#endif /* cpu with little endian initialization */
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orr r2,r2,#CMMASK_CMxx6_COMMON
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#endif /* CMxx6 code */
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|
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|
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#endif /* ARM102xxE value */
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/* read CM_INIT */
|
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|
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/* read CM_INIT */
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mov r0, #CM_BASE
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ldr r1, [r0, #OS_INIT]
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/* check against desired bit setting */
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and r3,r1,r2
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cmp r3,r2
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beq init_reg_OK
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||||
/* lock for change */
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||||
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||||
/* lock for change */
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mov r3, #CMVAL_LOCK
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and r3,r3,#CMMASK_LOCK
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str r3, [r0, #OS_LOCK]
|
||||
@ -112,39 +112,39 @@ platformsetup:
|
||||
b reset_cpu
|
||||
|
||||
init_reg_OK:
|
||||
|
||||
#endif /* CONFIG_CM_INIT */
|
||||
|
||||
#endif /* CONFIG_CM_INIT */
|
||||
|
||||
mov pc, lr
|
||||
|
||||
#ifdef CONFIG_CM_SPD_DETECT
|
||||
#ifdef CONFIG_CM_SPD_DETECT
|
||||
/* Fast memory is available for the DRAM data
|
||||
* - ensure it has been transferred, then summarize the data
|
||||
* - ensure it has been transferred, then summarize the data
|
||||
* into a CM register
|
||||
*/
|
||||
.globl dram_query
|
||||
dram_query:
|
||||
stmfd r13!,{r4-r6,lr}
|
||||
/* set up SDRAM info */
|
||||
/* set up SDRAM info */
|
||||
/* - based on example code from the CM User Guide */
|
||||
mov r0, #CM_BASE
|
||||
|
||||
|
||||
readspdbit:
|
||||
ldr r1, [r0, #OS_SDRAM] /* read the SDRAM register */
|
||||
and r1, r1, #0x20 /* mask SPD bit (5) */
|
||||
cmp r1, #0x20 /* test if set */
|
||||
ldr r1, [r0, #OS_SDRAM] /* read the SDRAM register */
|
||||
and r1, r1, #0x20 /* mask SPD bit (5) */
|
||||
cmp r1, #0x20 /* test if set */
|
||||
bne readspdbit
|
||||
|
||||
setupsdram:
|
||||
add r0, r0, #OS_SPD /* address the copy of the SDP data */
|
||||
ldrb r1, [r0, #3] /* number of row address lines */
|
||||
ldrb r1, [r0, #3] /* number of row address lines */
|
||||
ldrb r2, [r0, #4] /* number of column address lines */
|
||||
ldrb r3, [r0, #5] /* number of banks */
|
||||
ldrb r4, [r0, #31] /* module bank density */
|
||||
ldrb r3, [r0, #5] /* number of banks */
|
||||
ldrb r4, [r0, #31] /* module bank density */
|
||||
mul r5, r4, r3 /* size of SDRAM (MB divided by 4) */
|
||||
mov r5, r5, ASL#2 /* size in MB */
|
||||
mov r0, #CM_BASE /* reload for later code */
|
||||
cmp r5, #0x10 /* is it 16MB? */
|
||||
mov r5, r5, ASL#2 /* size in MB */
|
||||
mov r0, #CM_BASE /* reload for later code */
|
||||
cmp r5, #0x10 /* is it 16MB? */
|
||||
bne not16
|
||||
mov r6, #0x2 /* store size and CAS latency of 2 */
|
||||
b writesize
|
||||
@ -175,21 +175,21 @@ not128:
|
||||
|
||||
writesize:
|
||||
mov r1, r1, ASL#8 /* row addr lines from SDRAM reg */
|
||||
orr r2, r1, r2, ASL#12 /* OR in column address lines */
|
||||
orr r3, r2, r3, ASL#16 /* OR in number of banks */
|
||||
orr r6, r6, r3 /* OR in size and CAS latency */
|
||||
str r6, [r0, #OS_SDRAM] /* store SDRAM parameters */
|
||||
orr r2, r1, r2, ASL#12 /* OR in column address lines */
|
||||
orr r3, r2, r3, ASL#16 /* OR in number of banks */
|
||||
orr r6, r6, r3 /* OR in size and CAS latency */
|
||||
str r6, [r0, #OS_SDRAM] /* store SDRAM parameters */
|
||||
|
||||
#endif /* #ifdef CONFIG_CM_SPD_DETECT */
|
||||
|
||||
ldmfd r13!,{r4-r6,pc} /* back to caller */
|
||||
|
||||
#ifdef CONFIG_CM_REMAP
|
||||
/* CM remap bit is operational
|
||||
#ifdef CONFIG_CM_REMAP
|
||||
/* CM remap bit is operational
|
||||
* - use it to map writeable memory at 0x00000000, in place of flash
|
||||
*/
|
||||
.globl cm_remap
|
||||
cm_remap:
|
||||
cm_remap:
|
||||
stmfd r13!,{r4-r10,lr}
|
||||
|
||||
mov r0, #CM_BASE
|
||||
@ -198,9 +198,9 @@ cm_remap:
|
||||
str r1, [r0, #OS_CTRL]
|
||||
|
||||
/* Now 0x00000000 is writeable, replace the vectors */
|
||||
ldr r0, =_start /* r0 <- start of vectors */
|
||||
ldr r2, =_armboot_start /* r2 <- past vectors */
|
||||
sub r1,r1,r1 /* destination 0x00000000 */
|
||||
ldr r0, =_start /* r0 <- start of vectors */
|
||||
ldr r2, =_armboot_start /* r2 <- past vectors */
|
||||
sub r1,r1,r1 /* destination 0x00000000 */
|
||||
|
||||
copy_vec:
|
||||
ldmia r0!, {r3-r10} /* copy from source address [r0] */
|
||||
@ -208,7 +208,6 @@ copy_vec:
|
||||
cmp r0, r2 /* until source end address [r2] */
|
||||
ble copy_vec
|
||||
|
||||
ldmfd r13!,{r4-r10,pc} /* back to caller */
|
||||
ldmfd r13!,{r4-r10,pc} /* back to caller */
|
||||
|
||||
#endif /* #ifdef CONFIG_CM_REMAP */
|
||||
|
||||
|
||||
@ -122,7 +122,7 @@ int misc_init_r (void)
|
||||
void watchdog_init(void)
|
||||
{
|
||||
/* There are 4 watch dogs. 1 secure, and 3 general purpose.
|
||||
* The ROM takes care of the secure one. Of the 3 GP ones,
|
||||
* The ROM takes care of the secure one. Of the 3 GP ones,
|
||||
* 1 can reset us directly, the other 2 only generate MPU interrupts.
|
||||
*/
|
||||
__raw_writel(WD_UNLOCK1 ,WD2_BASE+WSPR);
|
||||
|
||||
@ -165,7 +165,7 @@ void do_irq (struct pt_regs *pt_regs)
|
||||
/* ASSUMED to be a timer interrupt */
|
||||
/* Just clear it - count handled in */
|
||||
/* integratorap.c */
|
||||
*(volatile ulong *)(CFG_TIMERBASE + 0x0C) = 0;
|
||||
*(volatile ulong *)(CFG_TIMERBASE + 0x0C) = 0;
|
||||
#else
|
||||
printf ("interrupt request\n");
|
||||
show_regs (pt_regs);
|
||||
|
||||
@ -395,7 +395,7 @@ fiq:
|
||||
|
||||
# ifdef CONFIG_INTEGRATOR
|
||||
|
||||
/* Satisfied by Integrator routine (AP or CP) */
|
||||
/* Satisfied by Integrator routine (AP or CP) */
|
||||
|
||||
#else
|
||||
|
||||
@ -414,4 +414,3 @@ rstctl1:
|
||||
.word 0xfffece10
|
||||
|
||||
#endif /* #ifdef CONFIG_INTEGRATOR */
|
||||
|
||||
|
||||
@ -41,4 +41,3 @@ $(LIB): $(OBJS)
|
||||
sinclude .depend
|
||||
|
||||
#########################################################################
|
||||
|
||||
|
||||
@ -16,7 +16,7 @@
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
@ -39,7 +39,7 @@ static unsigned long read_p15_c1 (void)
|
||||
unsigned long value;
|
||||
|
||||
__asm__ __volatile__(
|
||||
"mrc p15, 0, %0, c1, c0, 0 @ read control reg\n"
|
||||
"mrc p15, 0, %0, c1, c0, 0 @ read control reg\n"
|
||||
: "=r" (value)
|
||||
:
|
||||
: "memory");
|
||||
@ -57,7 +57,7 @@ static void write_p15_c1 (unsigned long value)
|
||||
printf ("write %08lx to p15/c1\n", value);
|
||||
#endif
|
||||
__asm__ __volatile__(
|
||||
"mcr p15, 0, %0, c1, c0, 0 @ write it back\n"
|
||||
"mcr p15, 0, %0, c1, c0, 0 @ write it back\n"
|
||||
:
|
||||
: "r" (value)
|
||||
: "memory");
|
||||
@ -82,7 +82,7 @@ static void cp_delay (void)
|
||||
#define C1_SYS_PROT (1<<8) /* system protection */
|
||||
#define C1_ROM_PROT (1<<9) /* ROM protection */
|
||||
#define C1_IC (1<<12) /* icache off/on */
|
||||
#define C1_HIGH_VECTORS (1<<13) /* location of vectors: low/high addresses */
|
||||
#define C1_HIGH_VECTORS (1<<13) /* location of vectors: low/high addresses */
|
||||
|
||||
|
||||
int cpu_init (void)
|
||||
@ -112,10 +112,10 @@ int cleanup_before_linux (void)
|
||||
|
||||
disable_interrupts ();
|
||||
|
||||
/* ARM926E-S needs the protection unit enabled for the icache to have
|
||||
* been enabled - left for possible later use
|
||||
/* ARM926E-S needs the protection unit enabled for the icache to have
|
||||
* been enabled - left for possible later use
|
||||
* should turn off the protection unit as well....
|
||||
*/
|
||||
*/
|
||||
/* turn off I/D-cache */
|
||||
asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
|
||||
i &= ~(C1_DC | C1_IC);
|
||||
@ -161,4 +161,3 @@ int icache_status (void)
|
||||
{
|
||||
return (read_p15_c1 () & C1_IC) != 0;
|
||||
}
|
||||
|
||||
|
||||
@ -58,8 +58,8 @@ int cleanup_before_linux (void)
|
||||
|
||||
disable_interrupts ();
|
||||
|
||||
/* Since the CM has unknown processor we do not support
|
||||
* cache operations
|
||||
/* Since the CM has unknown processor we do not support
|
||||
* cache operations
|
||||
*/
|
||||
|
||||
return (0);
|
||||
|
||||
@ -40,16 +40,16 @@
|
||||
|
||||
#ifndef CONFIG_INTEGRATOR
|
||||
/* Only to be used for integrator/AP or /CP */
|
||||
/* Allows U-Boot to be used with any ARM supplied core module (CM),
|
||||
/* Allows U-Boot to be used with any ARM supplied core module (CM),
|
||||
* provided the ARM boot monitor, or similar software,
|
||||
* runs first to set up the platform e.g. map writeable memory to 0x00000000
|
||||
* - see Integrator User Guides
|
||||
* Versatile has a supported cpu - arm926ejs
|
||||
* Some integrator CMs cpus are supported
|
||||
* CM926EJ-S, CM946E-S
|
||||
* For platforms with supported cpus U-Boot can be used as the sole boot
|
||||
* For platforms with supported cpus U-Boot can be used as the sole boot
|
||||
* monitor/loader - it will configure the platform itself
|
||||
* Also U-Boot may be faster/smaller in those cases since specific
|
||||
* Also U-Boot may be faster/smaller in those cases since specific
|
||||
* qualities of the cpu and/or CM can be used e.g i and/or d caches etc.
|
||||
*/
|
||||
#endif
|
||||
|
||||
@ -354,14 +354,14 @@ fiq:
|
||||
#else
|
||||
|
||||
.align 5
|
||||
.globl irq
|
||||
.globl irq
|
||||
irq:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
bl do_irq
|
||||
|
||||
.align 5
|
||||
.globl fiq
|
||||
.globl fiq
|
||||
fiq:
|
||||
get_bad_stack
|
||||
bad_save_user_regs
|
||||
|
||||
@ -12,7 +12,7 @@ Overview :
|
||||
--------
|
||||
There are two Integrator variants - Integrator/AP and Integrator/CP.
|
||||
Each may be fitted with a variety of core modules (CMs).
|
||||
Each CM consists of a ARM processor core and associated hardware e.g
|
||||
Each CM consists of a ARM processor core and associated hardware e.g
|
||||
FPGA implementing various controllers and/or register
|
||||
SSRAM
|
||||
SDRAM
|
||||
@ -26,29 +26,29 @@ a) Run ARM boot monitor, manually run U-Boot image from flash
|
||||
b) Run ARM boot monitor, automatically run U-Boot image from flash
|
||||
c) Run U-Boot image direct from flash.
|
||||
|
||||
In cases a) and b) the ARM boot monitor will have configured the CM and mapped
|
||||
In cases a) and b) the ARM boot monitor will have configured the CM and mapped
|
||||
writeable memory to 0x00000000 in the Integrator address space.
|
||||
U-Boot has to carry out minimal configration before standard code is run.
|
||||
|
||||
In case c) it may be necessary for U-Boot to perform CM dependent initialization.
|
||||
|
||||
Configuring U-Boot :
|
||||
------------------
|
||||
------------------
|
||||
The makefile contains targets for Integrator platforms of both types
|
||||
fitted with all current variants of CM. If these targets are to be used with
|
||||
boot process c) above then CONFIG_INIT_CRITICAL may need to be defined to ensure
|
||||
fitted with all current variants of CM. If these targets are to be used with
|
||||
boot process c) above then CONFIG_INIT_CRITICAL may need to be defined to ensure
|
||||
that the CM is correctly configured.
|
||||
|
||||
There are also targets independent of CM. These may not be suitable for
|
||||
boot process c) above. They have been preserved for backward compatibility with
|
||||
boot process c) above. They have been preserved for backward compatibility with
|
||||
existing build processes.
|
||||
|
||||
Code Hierarchy Applied :
|
||||
----------------------
|
||||
Code specific to initialization of a particular ARM processor has been placed in
|
||||
Code specific to initialization of a particular ARM processor has been placed in
|
||||
cpu/arm<>/start.S so that it may be used by other boards.
|
||||
|
||||
However, to avoid duplicating code through all processor files, a generic core
|
||||
However, to avoid duplicating code through all processor files, a generic core
|
||||
for ARM Integrator CMs has been added
|
||||
|
||||
cpu/arm_intcm
|
||||
@ -57,10 +57,7 @@ Otherwise. for example, the standard CM reset via the CM control register would
|
||||
need placing in each CM processor file......
|
||||
|
||||
Code specific to the initialization of the CM, rather than the cpu, and initialization
|
||||
of the Integrator board itself, has been placed in
|
||||
of the Integrator board itself, has been placed in
|
||||
|
||||
board/integrator<>/platform.S
|
||||
board/integrator<>/platform.S
|
||||
board/integrator<>/integrator<>.c
|
||||
|
||||
|
||||
|
||||
|
||||
@ -27,7 +27,7 @@
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
/*
|
||||
|
||||
@ -89,7 +89,7 @@
|
||||
#endif
|
||||
|
||||
/* Flash loaded
|
||||
- U-Boot
|
||||
- U-Boot
|
||||
- u-linux
|
||||
- system.cramfs
|
||||
*/
|
||||
@ -170,16 +170,16 @@
|
||||
#define CMMASK_TCRAM_DISABLE 0xFFFEFFFF /* TCRAM disabled */
|
||||
#define CMMASK_LOWVEC 0x00000004 /* vectors @ 0x00000000 */
|
||||
#if defined (CONFIG_CM10200E) || defined (CONFIG_CM10220E)
|
||||
#define CMMASK_INIT_102 0x00000300 /* see CM102xx ref manual
|
||||
#define CMMASK_INIT_102 0x00000300 /* see CM102xx ref manual
|
||||
* - PLL test clock bypassed
|
||||
* - bus clock ratio 2
|
||||
* - little endian
|
||||
* - vectors at zero
|
||||
*/
|
||||
#endif /* CM1022xx */
|
||||
#endif /* CM1022xx */
|
||||
|
||||
#define CMMASK_LE 0x00000008 /* little endian */
|
||||
#define CMMASK_CMxx6_COMMON 0x00000100 /* Common value for CMxx6
|
||||
#define CMMASK_CMxx6_COMMON 0x00000100 /* Common value for CMxx6
|
||||
* - divisor/ratio b00000001
|
||||
* bx
|
||||
* - HCLKDIV b000
|
||||
@ -190,26 +190,26 @@
|
||||
/* Determine CM characteristics */
|
||||
|
||||
#undef CONFIG_CM_MULTIPLE_SSRAM
|
||||
#undef CONFIG_CM_SPD_DETECT
|
||||
#undef CONFIG_CM_REMAP
|
||||
#undef CONFIG_CM_INIT
|
||||
#undef CONFIG_CM_TCRAM
|
||||
#undef CONFIG_CM_SPD_DETECT
|
||||
#undef CONFIG_CM_REMAP
|
||||
#undef CONFIG_CM_INIT
|
||||
#undef CONFIG_CM_TCRAM
|
||||
|
||||
#if defined (CONFIG_CM946E_S) || defined (CONFIG_CM966E_S)
|
||||
#define CONFIG_CM_MULTIPLE_SSRAM /* CM has multiple SSRAM mapping */
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_CM922t_XA10
|
||||
#ifndef CONFIG_CM922t_XA10
|
||||
#define CONFIG_CM_SPD_DETECT /* CM supports SPD query */
|
||||
#define OS_SPD 0x00000100 /* Address of SPD data */
|
||||
#define CONFIG_CM_REMAP /* CM supports remapping */
|
||||
#define CONFIG_CM_INIT /* CM has initialization reg */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_CM926EJ_S) || defined (CONFIG_CM946E_S) || \
|
||||
defined(CONFIG_CM966E_S) || defined (CONFIG_CM1026EJ_S) || \
|
||||
defined(CONFIG_CM1136JF_S)
|
||||
#define CONFIG_CM_TCRAM /* CM has TCRAM */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user