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ARM: rmobile: salvator-x: Add DVFS and PMIC support

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Add support for rebooting the board using the ROHM BD9571MWV I2C PMIC,
but keep the CPU reboot option as a fallback.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
This commit is contained in:
Marek Vasut 2017-05-13 15:57:48 +02:00 committed by Nobuhiro Iwamatsu
parent 90e53f8b45
commit fe2e8ff955
2 changed files with 21 additions and 0 deletions
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9
board/renesas/salvator-x/salvator-x.c
View File

@ -50,6 +50,7 @@ void s_init(void)
#define TMU1_MSTP124 BIT(24) /* non-secure */ #define TMU1_MSTP124 BIT(24) /* non-secure */
#define SCIF2_MSTP310 BIT(10) /* SCIF2 */ #define SCIF2_MSTP310 BIT(10) /* SCIF2 */
#define ETHERAVB_MSTP812 BIT(12) #define ETHERAVB_MSTP812 BIT(12)
#define DVFS_MSTP926 BIT(26)
#define SD0_MSTP314 BIT(14) #define SD0_MSTP314 BIT(14)
#define SD1_MSTP313 BIT(13) #define SD1_MSTP313 BIT(13)
#define SD2_MSTP312 BIT(12) /* either MMC0 */ #define SD2_MSTP312 BIT(12) /* either MMC0 */
@ -78,6 +79,10 @@ int board_early_init_f(void)
writel(0, SD2CKCR); writel(0, SD2CKCR);
writel(0, SD3CKCR); writel(0, SD3CKCR);
#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
/* DVFS for reset */
mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926);
#endif
return 0; return 0;
} }
@ -235,8 +240,12 @@ const struct rmobile_sysinfo sysinfo = {
void reset_cpu(ulong addr) void reset_cpu(ulong addr)
{ {
#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
i2c_reg_write(CONFIG_SYS_I2C_POWERIC_ADDR, 0x20, 0x80);
#else
/* only CA57 ? */ /* only CA57 ? */
writel(RST_CODE, RST_CA57RESCNT); writel(RST_CODE, RST_CA57RESCNT);
#endif
} }
static const struct sh_serial_platdata serial_platdata = { static const struct sh_serial_platdata serial_platdata = {

12
include/configs/salvator-x.h
View File

@ -50,6 +50,18 @@
#define GICD_BASE 0xF1010000 #define GICD_BASE 0xF1010000
#define GICC_BASE 0xF1020000 #define GICC_BASE 0xF1020000
/* i2c */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_SH
#define CONFIG_SYS_I2C_SLAVE 0x60
#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 1
#define CONFIG_SYS_I2C_SH_SPEED0 400000
#define CONFIG_SH_I2C_DATA_HIGH 4
#define CONFIG_SH_I2C_DATA_LOW 5
#define CONFIG_SH_I2C_CLOCK 10000000
#define CONFIG_SYS_I2C_POWERIC_ADDR 0x30
/* SDHI */ /* SDHI */
#define CONFIG_SH_SDHI_FREQ 200000000 #define CONFIG_SH_SDHI_FREQ 200000000