mirrors/u-boot
0
0
Fork 0
mirror of https://github.com/u-boot/u-boot.git synced 2024-11-25 21:24:21 +08:00
Code Issues Packages Projects Releases Wiki Activity

sunxi: DT: A64: Update devicetree files from Linux 5.12

Browse Source 
Import updated devicetree files from the Linux v5.12 release.

Besides some node and audio port renames this changes the PHY modes to
either rgmii-id or rgmii-txid. From the board files the Pinephone sees
a lot of updates.

This also adds the long missing USB PHY property for controller 0, which
allows the U-Boot PHY driver to eventually use port 0 in host mode
(pending another U-Boot patch).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
This commit is contained in:
Andre Przywara 2021-04-17 22:55:19 +01:00 committed by Stefan Roese
parent c83f63ae54
commit fbe127f7b5
17 changed files with 215 additions and 76 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
arch/arm/dts/sun50i-a64-bananapi-m64.dts
View File

@ -36,18 +36,18 @@
leds {
compatible = "gpio-leds";
pwr-led {
led-0 {
label = "bananapi-m64:red:pwr";
gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
default-state = "on";
};
green {
led-1 {
label = "bananapi-m64:green:user";
gpios = <&pio 4 14 GPIO_ACTIVE_HIGH>; /* PE14 */
};
blue {
led-2 {
label = "bananapi-m64:blue:user";
gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>; /* PE15 */
};
@ -105,7 +105,7 @@
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <&reg_dc1sw>;
status = "okay";
@ -331,10 +331,10 @@
"Microphone", "Microphone Jack",
"Microphone", "Onboard Microphone";
simple-audio-card,routing =
"Left DAC", "AIF1 Slot 0 Left",
"Right DAC", "AIF1 Slot 0 Right",
"AIF1 Slot 0 Left ADC", "Left ADC",
"AIF1 Slot 0 Right ADC", "Right ADC",
"Left DAC", "DACL",
"Right DAC", "DACR",
"ADCL", "Left ADC",
"ADCR", "Right ADC",
"Headphone Jack", "HP",
"MIC2", "Microphone Jack",
"Onboard Microphone", "MBIAS",

2
arch/arm/dts/sun50i-a64-nanopi-a64.dts
View File

@ -35,7 +35,7 @@
leds {
compatible = "gpio-leds";
blue {
led {
label = "nanopi-a64:blue:status";
gpios = <&pio 3 24 GPIO_ACTIVE_LOW>; /* PD24 */
};

10
arch/arm/dts/sun50i-a64-orangepi-win.dts
View File

@ -120,7 +120,7 @@
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <&reg_gmac_3v3>;
status = "okay";
@ -330,10 +330,10 @@
"Microphone", "Microphone Jack",
"Microphone", "Onboard Microphone";
simple-audio-card,routing =
"Left DAC", "AIF1 Slot 0 Left",
"Right DAC", "AIF1 Slot 0 Right",
"AIF1 Slot 0 Left ADC", "Left ADC",
"AIF1 Slot 0 Right ADC", "Right ADC",
"Left DAC", "DACL",
"Right DAC", "DACR",
"ADCL", "Left ADC",
"ADCR", "Right ADC",
"Headphone Jack", "HP",
"MIC2", "Microphone Jack",
"Onboard Microphone", "MBIAS",

15
arch/arm/dts/sun50i-a64-pine64-lts.dts
View File

@ -1,10 +1,25 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (c) 2018 ARM Ltd.
#include <dt-bindings/leds/common.h>
#include "sun50i-a64-sopine-baseboard.dts"
/ {
model = "Pine64 LTS";
compatible = "pine64,pine64-lts", "allwinner,sun50i-r18",
"allwinner,sun50i-a64";
leds {
compatible = "gpio-leds";
led {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_BLUE>;
gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
};
};
};
&mmc0 {
broken-cd; /* card detect is broken on *some* boards */
};

2
arch/arm/dts/sun50i-a64-pine64-plus.dts
View File

@ -13,7 +13,7 @@
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii";
phy-mode = "rgmii-txid";
phy-handle = <&ext_rgmii_phy>;
status = "okay";
};

8
arch/arm/dts/sun50i-a64-pine64.dts
View File

@ -261,11 +261,11 @@
simple-audio-card,widgets = "Microphone", "Microphone Jack",
"Headphone", "Headphone Jack";
simple-audio-card,routing =
"Left DAC", "AIF1 Slot 0 Left",
"Right DAC", "AIF1 Slot 0 Right",
"Left DAC", "DACL",
"Right DAC", "DACR",
"Headphone Jack", "HP",
"AIF1 Slot 0 Left ADC", "Left ADC",
"AIF1 Slot 0 Right ADC", "Right ADC",
"ADCL", "Left ADC",
"ADCR", "Right ADC",
"MIC2", "Microphone Jack";
status = "okay";
};

13
arch/arm/dts/sun50i-a64-pinebook.dts
View File

@ -126,8 +126,6 @@
};
&ehci0 {
phys = <&usbphy 0>;
phy-names = "usb";
status = "okay";
};
@ -169,6 +167,7 @@
pinctrl-0 = <&mmc2_pins>, <&mmc2_ds_pin>;
vmmc-supply = <&reg_dcdc1>;
vqmmc-supply = <&reg_eldo1>;
max-frequency = <200000000>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
@ -177,8 +176,6 @@
};
&ohci0 {
phys = <&usbphy 0>;
phy-names = "usb";
status = "okay";
};
@ -374,15 +371,15 @@
"Headphone", "Headphone Jack",
"Speaker", "Internal Speaker";
simple-audio-card,routing =
"Left DAC", "AIF1 Slot 0 Left",
"Right DAC", "AIF1 Slot 0 Right",
"Left DAC", "DACL",
"Right DAC", "DACR",
"Speaker Amp INL", "LINEOUT",
"Speaker Amp INR", "LINEOUT",
"Internal Speaker", "Speaker Amp OUTL",
"Internal Speaker", "Speaker Amp OUTR",
"Headphone Jack", "HP",
"AIF1 Slot 0 Left ADC", "Left ADC",
"AIF1 Slot 0 Right ADC", "Right ADC",
"ADCL", "Left ADC",
"ADCR", "Right ADC",
"Internal Microphone Left", "MBIAS",
"MIC1", "Internal Microphone Left",
"Internal Microphone Right", "HBIAS",

7
arch/arm/dts/sun50i-a64-pinephone-1.0.dts
View File

@ -7,5 +7,10 @@
/ {
model = "Pine64 PinePhone Developer Batch (1.0)";
compatible = "pine64,pinephone-1.0", "allwinner,sun50i-a64";
compatible = "pine64,pinephone-1.0", "pine64,pinephone", "allwinner,sun50i-a64";
};
&sgm3140 {
enable-gpios = <&pio 2 3 GPIO_ACTIVE_HIGH>; /* PC3 */
flash-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
};

7
arch/arm/dts/sun50i-a64-pinephone-1.1.dts
View File

@ -7,7 +7,7 @@
/ {
model = "Pine64 PinePhone Braveheart (1.1)";
compatible = "pine64,pinephone-1.1", "allwinner,sun50i-a64";
compatible = "pine64,pinephone-1.1", "pine64,pinephone", "allwinner,sun50i-a64";
};
&backlight {
@ -28,3 +28,8 @@
num-interpolated-steps = <50>;
default-brightness-level = <400>;
};
&sgm3140 {
enable-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
flash-gpios = <&pio 2 3 GPIO_ACTIVE_HIGH>; /* PC3 */
};

16
arch/arm/dts/sun50i-a64-pinephone-1.2.dts
View File

@ -7,7 +7,12 @@
/ {
model = "Pine64 PinePhone (1.2)";
compatible = "pine64,pinephone-1.2", "allwinner,sun50i-a64";
compatible = "pine64,pinephone-1.2", "pine64,pinephone", "allwinner,sun50i-a64";
wifi_pwrseq: wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
};
};
&backlight {
@ -38,3 +43,12 @@
interrupt-parent = <&pio>;
interrupts = <1 1 IRQ_TYPE_EDGE_RISING>; /* PB1 */
};
&mmc1 {
mmc-pwrseq = <&wifi_pwrseq>;
};
&sgm3140 {
enable-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
flash-gpios = <&pio 2 3 GPIO_ACTIVE_HIGH>; /* PC3 */
};

90
arch/arm/dts/sun50i-a64-pinephone.dtsi
View File

@ -13,6 +13,7 @@
/ {
aliases {
ethernet0 = &rtl8723cs;
serial0 = &uart0;
};
@ -20,6 +21,7 @@
compatible = "pwm-backlight";
pwms = <&r_pwm 0 50000 PWM_POLARITY_INVERTED>;
enable-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */
power-supply = <&reg_ps>;
/* Backlight configuration differs per PinePhone revision. */
};
@ -30,25 +32,51 @@
leds {
compatible = "gpio-leds";
blue {
led-0 {
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_BLUE>;
gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
};
green {
led-1 {
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 3 18 GPIO_ACTIVE_HIGH>; /* PD18 */
};
red {
led-2 {
function = LED_FUNCTION_INDICATOR;
color = <LED_COLOR_ID_RED>;
gpios = <&pio 3 19 GPIO_ACTIVE_HIGH>; /* PD19 */
};
};
reg_ps: ps-regulator {
compatible = "regulator-fixed";
regulator-name = "ps";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
};
reg_vbat_wifi: vbat-wifi {
compatible = "regulator-fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vbat-wifi";
};
sgm3140: led-controller {
compatible = "sgmicro,sgm3140";
vin-supply = <&reg_dcdc1>;
sgm3140_flash: led {
function = LED_FUNCTION_FLASH;
color = <LED_COLOR_ID_WHITE>;
flash-max-timeout-us = <250000>;
};
};
speaker_amp: audio-amplifier {
compatible = "simple-audio-amplifier";
enable-gpios = <&pio 2 7 GPIO_ACTIVE_HIGH>; /* PC7 */
@ -142,15 +170,23 @@
status = "okay";
/* Magnetometer */
lis3mdl: lis3mdl@1e {
lis3mdl: magnetometer@1e {
compatible = "st,lis3mdl-magn";
reg = <0x1e>;
vdd-supply = <&reg_dldo1>;
vddio-supply = <&reg_dldo1>;
};
/* Light/proximity sensor */
light-sensor@48 {
compatible = "sensortek,stk3311";
reg = <0x48>;
interrupt-parent = <&pio>;
interrupts = <1 0 IRQ_TYPE_EDGE_FALLING>; /* PB0 */
};
/* Accelerometer/gyroscope */
mpu6050@68 {
accelerometer@68 {
compatible = "invensense,mpu6050";
reg = <0x68>;
interrupt-parent = <&pio>;
@ -167,6 +203,7 @@
&lradc {
vref-supply = <&reg_aldo3>;
wakeup-source;
status = "okay";
button-200 {
@ -195,6 +232,20 @@
status = "okay";
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
vmmc-supply = <&reg_vbat_wifi>;
vqmmc-supply = <&reg_dldo4>;
bus-width = <4>;
non-removable;
status = "okay";
rtl8723cs: wifi@1 {
reg = <1>;
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
@ -251,10 +302,6 @@
#include "axp803.dtsi"
&ac_power_supply {
status = "okay";
};
&battery_power_supply {
status = "okay";
};
@ -274,8 +321,8 @@
&reg_aldo3 {
regulator-always-on;
regulator-min-microvolt = <2700000>;
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc-pll-avcc";
};
@ -392,10 +439,10 @@
"Internal Speaker", "Speaker Amp OUTR",
"Speaker Amp INL", "LINEOUT",
"Speaker Amp INR", "LINEOUT",
"Left DAC", "AIF1 Slot 0 Left",
"Right DAC", "AIF1 Slot 0 Right",
"AIF1 Slot 0 Left ADC", "Left ADC",
"AIF1 Slot 0 Right ADC", "Right ADC",
"Left DAC", "DACL",
"Right DAC", "DACR",
"ADCL", "Left ADC",
"ADCR", "Right ADC",
"Internal Microphone", "MBIAS",
"MIC1", "Internal Microphone",
"Headset Microphone", "HBIAS",
@ -408,6 +455,19 @@
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
status = "okay";
bluetooth {
compatible = "realtek,rtl8723cs-bt";
device-wake-gpios = <&pio 7 6 GPIO_ACTIVE_LOW>; /* PH6 */
enable-gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
host-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
};
};
/* Connected to the modem (hardware flow control can't be used) */
&uart3 {
pinctrl-names = "default";

26
arch/arm/dts/sun50i-a64-pinetab-early-adopter.dts Normal file
View File

@ -0,0 +1,26 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2020 Icenowy Zheng <icenowy@aosc.io>
*
*/
/dts-v1/;
#include "sun50i-a64-pinetab.dts"
/ {
model = "PineTab, Early Adopter's version";
compatible = "pine64,pinetab-early-adopter", "allwinner,sun50i-a64";
};
&dsi {
/delete-node/ panel@0;
panel@0 {
compatible = "feixin,k101-im2byl02", "ilitek,ili9881c";
reg = <0>;
power-supply = <&reg_dc1sw>;
reset-gpios = <&pio 3 24 GPIO_ACTIVE_LOW>; /* PD24 */
backlight = <&backlight>;
};
};

13
arch/arm/dts/sun50i-a64-pinetab.dts
View File

@ -14,7 +14,7 @@
#include <dt-bindings/pwm/pwm.h>
/ {
model = "PineTab";
model = "PineTab, Development Sample";
compatible = "pine64,pinetab", "allwinner,sun50i-a64";
aliases {
@ -122,9 +122,6 @@
status = "okay";
port {
#address-cells = <1>;
#size-cells = <0>;
csi_ep: endpoint {
remote-endpoint = <&ov5640_ep>;
bus-width = <8>;
@ -421,15 +418,15 @@
"Headphone", "Headphone Jack",
"Speaker", "Internal Speaker";
simple-audio-card,routing =
"Left DAC", "AIF1 Slot 0 Left",
"Right DAC", "AIF1 Slot 0 Right",
"Left DAC", "DACL",
"Right DAC", "DACR",
"Speaker Amp INL", "LINEOUT",
"Speaker Amp INR", "LINEOUT",
"Internal Speaker", "Speaker Amp OUTL",
"Internal Speaker", "Speaker Amp OUTR",
"Headphone Jack", "HP",
"AIF1 Slot 0 Left ADC", "Left ADC",
"AIF1 Slot 0 Right ADC", "Right ADC",
"ADCL", "Left ADC",
"ADCR", "Right ADC",
"Internal Microphone Left", "MBIAS",
"MIC1", "Internal Microphone Left",
"Internal Microphone Right", "HBIAS",

11
arch/arm/dts/sun50i-a64-sopine-baseboard.dts
View File

@ -79,7 +79,7 @@
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii";
phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <&reg_dc1sw>;
status = "okay";
@ -111,6 +111,7 @@
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
mmc-hs200-1_8v;
status = "okay";
};
@ -159,11 +160,11 @@
simple-audio-card,widgets = "Microphone", "Microphone Jack",
"Headphone", "Headphone Jack";
simple-audio-card,routing =
"Left DAC", "AIF1 Slot 0 Left",
"Right DAC", "AIF1 Slot 0 Right",
"Left DAC", "DACL",
"Right DAC", "DACR",
"Headphone Jack", "HP",
"AIF1 Slot 0 Left ADC", "Left ADC",
"AIF1 Slot 0 Right ADC", "Right ADC",
"ADCL", "Left ADC",
"ADCR", "Right ADC",
"MIC2", "Microphone Jack";
status = "okay";
};

3
arch/arm/dts/sun50i-a64-sopine.dtsi
View File

@ -32,10 +32,9 @@
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_dcdc1>;
non-removable;
disable-wp;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 push-pull switch */
status = "okay";
};

12
arch/arm/dts/sun50i-a64-teres-i.dts
View File

@ -52,12 +52,12 @@
leds {
compatible = "gpio-leds";
capslock {
led-0 {
label = "teres-i:green:capslock";
gpios = <&pio 2 7 GPIO_ACTIVE_HIGH>; /* PC7 */
};
numlock {
led-1 {
label = "teres-i:green:numlock";
gpios = <&pio 2 4 GPIO_ACTIVE_HIGH>; /* PC4 */
};
@ -340,10 +340,10 @@
"Microphone", "Internal Microphone",
"Speaker", "Internal Speaker";
simple-audio-card,routing =
"Left DAC", "AIF1 Slot 0 Left",
"Right DAC", "AIF1 Slot 0 Right",
"AIF1 Slot 0 Left ADC", "Left ADC",
"AIF1 Slot 0 Right ADC", "Right ADC",
"Left DAC", "DACL",
"Right DAC", "DACR",
"ADCL", "Left ADC",
"ADCR", "Right ADC",
"Headphone Jack", "HP",
"Speaker Amp INL", "LINEOUT",
"Speaker Amp INR", "LINEOUT",

40
arch/arm/dts/sun50i-a64.dtsi
View File

@ -51,7 +51,7 @@
reg = <0>;
enable-method = "psci";
next-level-cache = <&L2>;
clocks = <&ccu 21>;
clocks = <&ccu CLK_CPUX>;
clock-names = "cpu";
#cooling-cells = <2>;
};
@ -62,7 +62,7 @@
reg = <1>;
enable-method = "psci";
next-level-cache = <&L2>;
clocks = <&ccu 21>;
clocks = <&ccu CLK_CPUX>;
clock-names = "cpu";
#cooling-cells = <2>;
};
@ -73,7 +73,7 @@
reg = <2>;
enable-method = "psci";
next-level-cache = <&L2>;
clocks = <&ccu 21>;
clocks = <&ccu CLK_CPUX>;
clock-names = "cpu";
#cooling-cells = <2>;
};
@ -84,7 +84,7 @@
reg = <3>;
enable-method = "psci";
next-level-cache = <&L2>;
clocks = <&ccu 21>;
clocks = <&ccu CLK_CPUX>;
clock-names = "cpu";
#cooling-cells = <2>;
};
@ -139,10 +139,10 @@
simple-audio-card,mclk-fs = <128>;
simple-audio-card,aux-devs = <&codec_analog>;
simple-audio-card,routing =
"Left DAC", "AIF1 Slot 0 Left",
"Right DAC", "AIF1 Slot 0 Right",
"AIF1 Slot 0 Left ADC", "Left ADC",
"AIF1 Slot 0 Right ADC", "Right ADC";
"Left DAC", "DACL",
"Right DAC", "DACR",
"ADCL", "Left ADC",
"ADCR", "Right ADC";
status = "disabled";
cpudai: simple-audio-card,cpu {
@ -157,6 +157,7 @@
timer {
compatible = "arm,armv8-timer";
allwinner,erratum-unknown1;
arm,no-tick-in-suspend;
interrupts = <GIC_PPI 13
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
<GIC_PPI 14
@ -513,7 +514,7 @@
resets = <&ccu RST_BUS_MMC2>;
reset-names = "ahb";
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
max-frequency = <200000000>;
max-frequency = <150000000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -592,6 +593,8 @@
<&ccu CLK_USB_OHCI0>;
resets = <&ccu RST_BUS_OHCI0>,
<&ccu RST_BUS_EHCI0>;
phys = <&usbphy 0>;
phy-names = "usb";
status = "disabled";
};
@ -602,6 +605,8 @@
clocks = <&ccu CLK_BUS_OHCI0>,
<&ccu CLK_USB_OHCI0>;
resets = <&ccu RST_BUS_OHCI0>;
phys = <&usbphy 0>;
phy-names = "usb";
status = "disabled";
};
@ -845,6 +850,20 @@
status = "disabled";
};
i2s2: i2s@1c22800 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun50i-a64-i2s",
"allwinner,sun8i-h3-i2s";
reg = <0x01c22800 0x400>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_I2S2>, <&ccu CLK_I2S2>;
clock-names = "apb", "mod";
resets = <&ccu RST_BUS_I2S2>;
dma-names = "rx", "tx";
dmas = <&dma 27>, <&dma 27>;
status = "disabled";
};
dai: dai@1c22c00 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun50i-a64-codec-i2s";
@ -860,7 +879,8 @@
codec: codec@1c22e00 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun8i-a33-codec";
compatible = "allwinner,sun50i-a64-codec",
"allwinner,sun8i-a33-codec";
reg = <0x01c22e00 0x600>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;