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armv8: ls2080a: Reorganise NAND_BOOT code in config flag
Add CONFIG_NAND_BOOT config flag to organise NAND_BOOT specific code in config flag like -nand-boot specfic errata errata_rcw_src() -CONFIG_SYS_NAND_U_BOOT_DST,etc Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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@ -134,7 +134,7 @@ void erratum_a009635(void)
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static void erratum_rcw_src(void)
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{
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#if defined(CONFIG_SPL)
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#if defined(CONFIG_SPL) && defined(CONFIG_NAND_BOOT)
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u32 __iomem *dcfg_ccsr = (u32 __iomem *)DCFG_BASE;
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u32 __iomem *dcfg_dcsr = (u32 __iomem *)DCFG_DCSR_BASE;
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u32 val;
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@ -10,6 +10,7 @@ CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_NAND_BOOT=y
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CONFIG_SYS_EXTRA_OPTIONS="NAND"
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CONFIG_BOOTDELAY=10
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CONFIG_SPL=y
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@ -10,6 +10,7 @@ CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_NAND_BOOT=y
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CONFIG_SYS_EXTRA_OPTIONS="NAND"
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CONFIG_BOOTDELAY=10
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CONFIG_SPL=y
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@ -233,8 +233,10 @@ unsigned long long get_qixis_addr(void);
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#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
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#define CONFIG_SPL_TEXT_BASE 0x1800a000
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#ifdef CONFIG_NAND_BOOT
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#define CONFIG_SYS_NAND_U_BOOT_DST 0x80400000
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#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
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#endif
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000
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#define CONFIG_SYS_SPL_MALLOC_START 0x80200000
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#define CONFIG_SYS_MONITOR_LEN (640 * 1024)
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@ -198,7 +198,8 @@ unsigned long get_board_ddr_clk(void);
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FTIM2_GPCM_TWP(0x3E))
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#define CONFIG_SYS_CS3_FTIM3 0x0
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#if defined(CONFIG_SPL) && defined(CONFIG_NAND)
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#if defined(CONFIG_SPL)
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#if defined(CONFIG_NAND_BOOT)
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#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR0_CSPR_EXT
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#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR0_CSPR_EARLY
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#define CONFIG_SYS_CSPR1_FINAL CONFIG_SYS_NOR0_CSPR
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@ -234,6 +235,7 @@ unsigned long get_board_ddr_clk(void);
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#define CONFIG_SPL_PAD_TO 0x20000
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#define CONFIG_SYS_NAND_U_BOOT_OFFS (256 * 1024)
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#define CONFIG_SYS_NAND_U_BOOT_SIZE (640 * 1024)
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#endif
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#else
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#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT
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#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR_EARLY
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