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arm/km: convert mgcoge3un target to km_kirkwood
Use the generic header km_kirkwood.h and get rid of the board specific header. changes for v2: rebased because of changes in other patches Signed-off-by: Holger Brunck <holger.brunck@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Gerlando Falauto <gerlando.falauto@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
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@ -114,7 +114,7 @@ u32 kwmpp_config[] = {
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0
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};
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#if defined(CONFIG_MGCOGE3UN)
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#if defined(CONFIG_KM_MGCOGE3UN)
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/*
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* Wait for startup OK from mgcoge3ne
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*/
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@ -134,8 +134,7 @@ int startup_allowed(void)
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}
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#endif
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#if (defined(CONFIG_MGCOGE3UN)|defined(CONFIG_PORTL2)| \
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defined(CONFIG_KM_PIGGY4_88E6352))
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#if (defined(CONFIG_KM_PIGGY4_88E6061)|defined(CONFIG_KM_PIGGY4_88E6352))
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/*
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* All boards with PIGGY4 connected via a simple switch have ethernet always
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* present.
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@ -203,7 +202,7 @@ int misc_init_r(void)
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printf("Overwriting MACH_TYPE with %d!!!\n", mach_type);
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gd->bd->bi_arch_number = mach_type;
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}
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#if defined(CONFIG_MGCOGE3UN)
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#if defined(CONFIG_KM_MGCOGE3UN)
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char *wait_for_ne;
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wait_for_ne = getenv("waitforne");
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if (wait_for_ne != NULL) {
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@ -318,7 +317,7 @@ void dram_init_banksize(void)
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}
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}
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#if (defined(CONFIG_MGCOGE3UN)|defined(CONFIG_PORTL2))
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#if (defined(CONFIG_KM_MGCOGE3UN)|defined(CONFIG_PORTL2))
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#define PHY_LED_SEL 0x18
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#define PHY_LED0_LINK (0x5)
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@ -143,7 +143,7 @@ lsxhl arm arm926ejs lsxl buffalo
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km_kirkwood arm arm926ejs km_arm keymile kirkwood km_kirkwood:KM_KIRKWOOD,KM_DISABLE_PCI
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km_kirkwood_pci arm arm926ejs km_arm keymile kirkwood km_kirkwood:KM_KIRKWOOD_PCI,KM_RECONFIG_XLX
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kmnusa arm arm926ejs km_arm keymile kirkwood km_kirkwood:KM_NUSA
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mgcoge3un arm arm926ejs km_arm keymile kirkwood
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mgcoge3un arm arm926ejs km_arm keymile kirkwood km_kirkwood:KM_MGCOGE3UN
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kmcoge5un arm arm926ejs km_arm keymile kirkwood km_kirkwood:KM_COGE5UN
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portl2 arm arm926ejs km_arm keymile kirkwood
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inetspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood lacie_kw:INETSPACE_V2
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@ -58,6 +58,20 @@
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#define CONFIG_KM_FPGA_CONFIG
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#define CONFIG_KM_PIGGY4_88E6352
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/* KM_MGCOGE3UN */
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#elif defined(CONFIG_KM_MGCOGE3UN)
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#define CONFIG_IDENT_STRING "\nKeymile COGE3UN"
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#define CONFIG_HOSTNAME mgcoge3un
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#define KM_IVM_BUS "pca9547:70:9" /* I2C2 (Mux-Port 1)*/
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#undef CONFIG_SYS_KWD_CONFIG
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#define CONFIG_SYS_KWD_CONFIG \
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$(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-memphis.cfg
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#define CONFIG_KM_BOARD_EXTRA_ENV "waitforne=true\0"
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#define CONFIG_PIGGY_MAC_ADRESS_OFFSET 3
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#define CONFIG_KM_DISABLE_PCIE
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#define CONFIG_KM_PIGGY4_88E6061
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/* KMCOGE5UN */
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#elif defined(CONFIG_KM_COGE5UN)
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#define CONFIG_IDENT_STRING "\nKeymile COGE5UN"
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#define KM_IVM_BUS "pca9547:70:9" /* I2C2 (Mux-Port 1)*/
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@ -111,7 +125,39 @@
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#endif
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#ifdef CONFIG_KM_PIGGY4_88E6061
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/*
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* Some keymile boards like mgcoge3un have their PIGGY4 connected via
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* an Marvell 88E6061 simple switch.
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* In this case we have to change the default settings for the
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* ethernet phy connected to the kirkwood.
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* In this case 100MB full duplex and autoneg off
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*/
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#define PORT_SERIAL_CONTROL_VALUE ( \
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MVGBE_FORCE_LINK_PASS | \
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MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
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MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
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MVGBE_ADV_NO_FLOW_CTRL | \
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MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
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MVGBE_FORCE_BP_MODE_NO_JAM | \
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(1 << 9) /* Reserved bit has to be 1 */ | \
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MVGBE_DO_NOT_FORCE_LINK_FAIL | \
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MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
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MVGBE_DTE_ADV_0 | \
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MVGBE_MIIPHY_MAC_MODE | \
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MVGBE_AUTO_NEG_NO_CHANGE | \
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MVGBE_MAX_RX_PACKET_1552BYTE | \
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MVGBE_CLR_EXT_LOOPBACK | \
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MVGBE_SET_FULL_DUPLEX_MODE | \
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MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
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MVGBE_SET_GMII_SPEED_TO_10_100 |\
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MVGBE_SET_MII_SPEED_TO_100)
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#endif
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/* GPIO Pin from kirkwood connected to PROGRAM_B pin of the xilinx FPGA */
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#define KM_XLX_PROGRAM_B_PIN 39
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#ifdef CONFIG_KM_DISABLE_PCI
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#undef CONFIG_KIRKWOOD_PCIE_INIT
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#endif
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#endif /* _CONFIG_KM_KIRKWOOD */
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@ -1,87 +0,0 @@
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/*
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* (C) Copyright 2009
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* Marvell Semiconductor <www.marvell.com>
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* Prafulla Wadaskar <prafulla@marvell.com>
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*
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* (C) Copyright 2009
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* Stefan Roese, DENX Software Engineering, sr@denx.de.
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*
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* (C) Copyright 2010-2011
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* Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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/* for linking errors see
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* http://lists.denx.de/pipermail/u-boot/2009-July/057350.html */
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#ifndef _CONFIG_MGCOGE3UN_H
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#define _CONFIG_MGCOGE3UN_H
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/* include common defines/options for all arm based Keymile boards */
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#include "km/km_arm.h"
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/*
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* Version number information
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*/
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#define CONFIG_IDENT_STRING "\nKeymile MGCOGE3UN"
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#define CONFIG_HOSTNAME mgcoge3un
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#define CONFIG_MGCOGE3UN
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#define KM_IVM_BUS "pca9547:70:9" /* I2C2 (Mux-Port 1)*/
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#define KM_ENV_BUS "pca9547:70:d" /* I2C2 (Mux-Port 5)*/
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/* we use a new RAM type on mgcoge3un board */
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#undef CONFIG_SYS_KWD_CONFIG
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#define CONFIG_SYS_KWD_CONFIG $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-memphis.cfg
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/*
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* mgcoge3un has a fixed link to the marvell switch
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* with 100MB full duplex and autoneg off, for this
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* reason we have to change the default settings
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*/
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#define PORT_SERIAL_CONTROL_VALUE ( \
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MVGBE_FORCE_LINK_PASS | \
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MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
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MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
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MVGBE_ADV_NO_FLOW_CTRL | \
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MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
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MVGBE_FORCE_BP_MODE_NO_JAM | \
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(1 << 9) /* Reserved bit has to be 1 */ | \
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MVGBE_DO_NOT_FORCE_LINK_FAIL | \
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MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
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MVGBE_DTE_ADV_0 | \
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MVGBE_MIIPHY_MAC_MODE | \
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MVGBE_AUTO_NEG_NO_CHANGE | \
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MVGBE_MAX_RX_PACKET_1552BYTE | \
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MVGBE_CLR_EXT_LOOPBACK | \
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MVGBE_SET_FULL_DUPLEX_MODE | \
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MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
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MVGBE_SET_GMII_SPEED_TO_10_100 |\
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MVGBE_SET_MII_SPEED_TO_100)
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#define CONFIG_KM_BOARD_EXTRA_ENV "waitforne=true\0"
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#define CONFIG_PIGGY_MAC_ADRESS_OFFSET 3
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/*
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* PCIe port not used on mgcoge3un
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*/
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#undef CONFIG_KIRKWOOD_PCIE_INIT
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#endif /* _CONFIG_MGCOGE3UN_H */
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