mirror of
https://github.com/u-boot/u-boot.git
synced 2024-11-25 05:04:23 +08:00
Some fixes to dspic, fpga, and gdc post tests for lwmon5. Disable external watch-dog for now.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com> Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
This commit is contained in:
parent
b428f6a8c6
commit
f694e32f93
@ -94,9 +94,9 @@ int dspic_post_test(int flags)
|
||||
}
|
||||
|
||||
data = dspic_read(DSPIC_SYS_ERROR_REG);
|
||||
if (data != 0) ret = 1;
|
||||
if (data == -1) {
|
||||
post_log("dsPIC : failed read system error\n");
|
||||
ret = 1;
|
||||
} else {
|
||||
post_log("dsPIC SYS-ERROR code: 0x%04X\n", data);
|
||||
}
|
||||
|
@ -39,6 +39,7 @@ DECLARE_GLOBAL_DATA_PTR;
|
||||
#define FPGA_VERSION_REG 0xC4000040
|
||||
#define FPGA_RAM_START 0xC4200000
|
||||
#define FPGA_RAM_END 0xC4203FFF
|
||||
#define FPGA_STAT 0xC400000C
|
||||
|
||||
#define FPGA_PWM_CTRL_REG 0xC4000020
|
||||
#define FPGA_PWM_TV_REG 0xC4000024
|
||||
@ -93,6 +94,9 @@ int fpga_post_test(int flags)
|
||||
post_log("FPGA : version %u.%u\n",
|
||||
(version >> 8) & 0xFF, version & 0xFF);
|
||||
|
||||
/* Enable write to FPGA RAM */
|
||||
out_be32((void *)FPGA_STAT, in_be32((void *)FPGA_STAT) | 0x1000);
|
||||
|
||||
read_value = get_ram_size((void *)CFG_FPGA_BASE_1, 0x4000);
|
||||
post_log("FPGA RAM size: %d bytes\n", read_value);
|
||||
|
||||
|
@ -35,7 +35,7 @@
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#define GDC_SCRATCH_REG 0xC1FF8044
|
||||
#define GDC_SCRATCH_REG 0xC1FF8008
|
||||
#define GDC_VERSION_REG 0xC1FF8084
|
||||
#define GDC_RAM_START 0xC0000000
|
||||
#define GDC_RAM_END 0xC2000000
|
||||
|
Loading…
Reference in New Issue
Block a user