ARM: davinci: Move CONFIG_SYS_DA850_PLL_INIT to Kconfig

Clean config headers by moving CONFIG_SYS_DA850_PLL_INIT away to a
Kconfig file.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Fabien Parent 2016-11-29 14:23:36 +01:00 committed by Tom Rini
parent 3891a54f47
commit f519b36491
6 changed files with 7 additions and 5 deletions

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@ -7,10 +7,12 @@ choice
config TARGET_IPAM390
bool "IPAM390 board"
select SUPPORT_SPL
select SYS_DA850_PLL_INIT
config TARGET_DA850EVM
bool "DA850 EVM board"
select SUPPORT_SPL
select SYS_DA850_PLL_INIT
config TARGET_EA20
bool "EA20 board"
@ -21,15 +23,20 @@ config TARGET_OMAPL138_LCDK
config TARGET_CALIMAIN
bool "Calimain board"
select SYS_DA850_PLL_INIT
config TARGET_LEGOEV3
bool "LEGO MINDSTORMS EV3"
select SYS_DA850_PLL_INIT
endchoice
config SYS_SOC
default "davinci"
config SYS_DA850_PLL_INIT
bool
source "board/Barix/ipam390/Kconfig"
source "board/davinci/da8xxevm/Kconfig"
source "board/davinci/ea20/Kconfig"

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@ -32,7 +32,6 @@
#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
#define CONFIG_SYS_TEXT_BASE 0x60000000
#define CONFIG_DA850_LOWLEVEL
#define CONFIG_SYS_DA850_PLL_INIT
#define CONFIG_SYS_DA850_DDR_INIT
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_DA8XX_GPIO

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@ -31,7 +31,6 @@
#define CONFIG_SYS_OSCIN_FREQ 24000000
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
#define CONFIG_SYS_DA850_PLL_INIT
#define CONFIG_SYS_DA850_DDR_INIT
#ifdef CONFIG_DIRECT_NOR_BOOT

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@ -32,7 +32,6 @@
#define CONFIG_SYS_OSCIN_FREQ 24000000
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
#define CONFIG_SYS_DA850_PLL_INIT
#define CONFIG_SYS_DA850_DDR_INIT
#define CONFIG_SYS_TEXT_BASE 0xc1080000

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@ -26,7 +26,6 @@
#define CONFIG_SYS_OSCIN_FREQ 24000000
#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
#define CONFIG_SYS_DA850_PLL_INIT
#define CONFIG_SYS_DA850_DDR_INIT
#define CONFIG_SYS_TEXT_BASE 0xc1080000

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@ -4706,7 +4706,6 @@ CONFIG_SYS_DA850_PLL1_PLLDIV2
CONFIG_SYS_DA850_PLL1_PLLDIV3
CONFIG_SYS_DA850_PLL1_PLLM
CONFIG_SYS_DA850_PLL1_POSTDIV
CONFIG_SYS_DA850_PLL_INIT
CONFIG_SYS_DA850_SYSCFG_SUSPSRC
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0
CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1