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fsl-layerscape: Move GIC RD tables init to soc.c
Move GIC redistributor tables initialization to CPU setup function. This patch introduces a GIC redistributor tables init function, and moves the function of reserving memory for GIC redistributor tables to soc.c and adds a argument for the memory size to reserve, BTW rename the function so that it is more readable. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Wasim Khan <wasim.khan@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Hou Zhiqiang
Priyanka Jain
parent
0d5b0711e9
commit
f40b120e93
@ -471,6 +471,10 @@ void ft_cpu_setup(void *blob, bd_t *bd)
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do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency",
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CONFIG_SYS_CLK_FREQ, 1);
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#ifdef CONFIG_GIC_V3_ITS
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ls_gic_rd_tables_init(blob);
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#endif
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#if defined(CONFIG_PCIE_LAYERSCAPE) || defined(CONFIG_PCIE_LAYERSCAPE_GEN4)
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ft_pci_setup(blob, bd);
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#endif
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@ -6,10 +6,12 @@
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#include <common.h>
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#include <clock_legacy.h>
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#include <cpu_func.h>
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#include <env.h>
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#include <fsl_immap.h>
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#include <fsl_ifc.h>
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#include <init.h>
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#include <linux/sizes.h>
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#include <asm/arch/fsl_serdes.h>
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#include <asm/arch/soc.h>
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#include <asm/io.h>
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@ -17,6 +19,7 @@
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#include <asm/arch-fsl-layerscape/config.h>
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#include <asm/arch-fsl-layerscape/ns_access.h>
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#include <asm/arch-fsl-layerscape/fsl_icid.h>
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#include <asm/gic-v3.h>
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#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
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#include <fsl_csu.h>
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#endif
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@ -30,9 +33,50 @@
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#include <fsl_immap.h>
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#ifdef CONFIG_TFABOOT
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#include <env_internal.h>
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#endif
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#if defined(CONFIG_TFABOOT) || defined(CONFIG_GIC_V3_ITS)
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DECLARE_GLOBAL_DATA_PTR;
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#endif
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#ifdef CONFIG_GIC_V3_ITS
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#define PENDTABLE_MAX_SZ ALIGN(BIT(ITS_MAX_LPI_NRBITS), SZ_64K)
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#define PROPTABLE_MAX_SZ ALIGN(BIT(ITS_MAX_LPI_NRBITS) / 8, SZ_64K)
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#define GIC_LPI_SIZE ALIGN(cpu_numcores() * PENDTABLE_MAX_SZ + \
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PROPTABLE_MAX_SZ, SZ_1M)
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static int fdt_add_resv_mem_gic_rd_tables(void *blob, u64 base, size_t size)
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{
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u32 phandle;
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int err;
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struct fdt_memory gic_rd_tables;
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gic_rd_tables.start = base;
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gic_rd_tables.end = base + size - 1;
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err = fdtdec_add_reserved_memory(blob, "gic-rd-tables", &gic_rd_tables,
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&phandle);
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if (err < 0)
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debug("%s: failed to add reserved memory: %d\n", __func__, err);
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return err;
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}
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int ls_gic_rd_tables_init(void *blob)
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{
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u64 gic_lpi_base;
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int ret;
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gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
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ret = fdt_add_resv_mem_gic_rd_tables(blob, gic_lpi_base, GIC_LPI_SIZE);
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if (ret)
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return ret;
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ret = gic_lpi_tables_init(gic_lpi_base, cpu_numcores());
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if (ret)
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debug("%s: failed to init gic-lpi-tables\n", __func__);
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return ret;
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}
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#endif
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bool soc_has_dp_ddr(void)
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{
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struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
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@ -158,6 +158,10 @@ void erratum_a010315(void);
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bool soc_has_dp_ddr(void);
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bool soc_has_aiop(void);
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#ifdef CONFIG_GIC_V3_ITS
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int ls_gic_rd_tables_init(void *blob);
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#endif
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#endif
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#endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_ */
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@ -16,7 +16,6 @@
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#include <asm/io.h>
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#include <fdt_support.h>
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#include <linux/libfdt.h>
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#include <linux/sizes.h>
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#include <fsl-mc/fsl_mc.h>
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#include <env_internal.h>
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#include <efi_loader.h>
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@ -30,14 +29,11 @@
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#include "../common/vid.h"
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#include <fsl_immap.h>
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#include <asm/arch-fsl-layerscape/fsl_icid.h>
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#include <asm/gic-v3.h>
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#include <cpu_func.h>
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#ifdef CONFIG_EMC2305
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#include "../common/emc2305.h"
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#endif
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#define GIC_LPI_SIZE 0x200000
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#ifdef CONFIG_TARGET_LX2160AQDS
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#define CFG_MUX_I2C_SDHC(reg, value) ((reg & 0x3f) | value)
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#define SET_CFG_MUX1_SDHC1_SDHC(reg) (reg & 0x3f)
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@ -645,23 +641,6 @@ void board_quiesce_devices(void)
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}
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#endif
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#ifdef CONFIG_GIC_V3_ITS
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int fdt_fixup_gic_lpi_memory(void *blob, u64 gic_lpi_base)
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{
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u32 phandle;
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int err;
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struct fdt_memory gic_lpi;
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gic_lpi.start = gic_lpi_base;
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gic_lpi.end = gic_lpi_base + GIC_LPI_SIZE - 1;
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err = fdtdec_add_reserved_memory(blob, "gic-lpi", &gic_lpi, &phandle);
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if (err < 0)
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debug("failed to add reserved memory: %d\n", err);
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return err;
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}
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#endif
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#ifdef CONFIG_OF_BOARD_SETUP
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int ft_board_setup(void *blob, bd_t *bd)
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{
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@ -673,8 +652,6 @@ int ft_board_setup(void *blob, bd_t *bd)
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u64 mc_memory_base = 0;
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u64 mc_memory_size = 0;
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u16 total_memory_banks;
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u64 __maybe_unused gic_lpi_base;
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int ret;
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ft_cpu_setup(blob, bd);
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@ -694,13 +671,6 @@ int ft_board_setup(void *blob, bd_t *bd)
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size[i] = gd->bd->bi_dram[i].size;
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}
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#ifdef CONFIG_GIC_V3_ITS
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gic_lpi_base = ALIGN(gd->arch.resv_ram - GIC_LPI_SIZE, SZ_64K);
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ret = fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
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if (!ret && gic_lpi_tables_init(gic_lpi_base, cpu_numcores()))
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debug("%s: failed to init gic-lpi-tables\n", __func__);
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#endif
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#ifdef CONFIG_RESV_RAM
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/* reduce size if reserved memory is within this bank */
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if (gd->arch.resv_ram >= base[0] &&
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