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dm: socfpga: mmc: Support CONFIG_BLK
Update the driver to support using driver model for block devices. Signed-off-by: Simon Glass <sjg@chromium.org>
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parent
329a449f2c
commit
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@ -22,6 +22,11 @@ static const struct socfpga_clock_manager *clock_manager_base =
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static const struct socfpga_system_manager *system_manager_base =
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(void *)SOCFPGA_SYSMGR_ADDRESS;
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struct socfpga_dwmci_plat {
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struct mmc_config cfg;
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struct mmc mmc;
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};
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/* socfpga implmentation specific driver private data */
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struct dwmci_socfpga_priv_data {
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struct dwmci_host host;
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@ -98,21 +103,45 @@ static int socfpga_dwmmc_ofdata_to_platdata(struct udevice *dev)
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static int socfpga_dwmmc_probe(struct udevice *dev)
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{
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#ifdef CONFIG_BLK
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struct socfpga_dwmci_plat *plat = dev_get_platdata(dev);
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#endif
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struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
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struct dwmci_socfpga_priv_data *priv = dev_get_priv(dev);
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struct dwmci_host *host = &priv->host;
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#ifdef CONFIG_BLK
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dwmci_setup_cfg(&plat->cfg, dev->name, host->buswidth, host->caps,
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host->bus_hz, 400000);
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host->mmc = &plat->mmc;
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#else
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int ret;
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ret = add_dwmci(host, host->bus_hz, 400000);
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if (ret)
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return ret;
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#endif
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host->mmc->priv = &priv->host;
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upriv->mmc = host->mmc;
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host->mmc->dev = dev;
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return 0;
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}
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static int socfpga_dwmmc_bind(struct udevice *dev)
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{
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#ifdef CONFIG_BLK
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struct socfpga_dwmci_plat *plat = dev_get_platdata(dev);
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int ret;
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ret = dwmci_bind(dev, &plat->mmc, &plat->cfg);
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if (ret)
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return ret;
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#endif
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return 0;
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}
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static const struct udevice_id socfpga_dwmmc_ids[] = {
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{ .compatible = "altr,socfpga-dw-mshc" },
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{ }
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@ -123,6 +152,7 @@ U_BOOT_DRIVER(socfpga_dwmmc_drv) = {
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.id = UCLASS_MMC,
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.of_match = socfpga_dwmmc_ids,
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.ofdata_to_platdata = socfpga_dwmmc_ofdata_to_platdata,
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.bind = socfpga_dwmmc_bind,
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.probe = socfpga_dwmmc_probe,
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.priv_auto_alloc_size = sizeof(struct dwmci_socfpga_priv_data),
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};
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