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eth: mtk-eth: enable mt7629 sgmii mode support in mediatek eth driver

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The sgmii mode init flow is almost the same for all mediatek SoC, the
only difference is the register offset(SGMSYS_GEN2_SPEED) is 0x2028
in the old chip(mt7622) but changed to 0x128 for the newer chip(mt7629
and the following chips).

Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
This commit is contained in:
MarkLee 2020-06-19 19:17:16 +08:00 committed by Tom Rini
parent 3b191c56c8
commit f0236b7015
2 changed files with 3 additions and 1 deletions
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3
drivers/net/mtk_eth.c
View File

@ -1094,7 +1094,8 @@ static int mtk_phy_probe(struct udevice *dev)
static void mtk_sgmii_init(struct mtk_eth_priv *priv)
{
/* Set SGMII GEN2 speed(2.5G) */
clrsetbits_le32(priv->sgmii_base + SGMSYS_GEN2_SPEED,
clrsetbits_le32(priv->sgmii_base + ((priv->soc == SOC_MT7622) ?
SGMSYS_GEN2_SPEED : SGMSYS_GEN2_SPEED_V2),
SGMSYS_SPEED_2500, SGMSYS_SPEED_2500);
/* Disable SGMII AN */

1
drivers/net/mtk_eth.h
View File

@ -46,6 +46,7 @@
#define SGMII_PHYA_PWD BIT(4)
#define SGMSYS_GEN2_SPEED 0x2028
#define SGMSYS_GEN2_SPEED_V2 0x128
#define SGMSYS_SPEED_2500 BIT(2)
/* Frame Engine Registers */