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MX31: add pin definitions for NAND controller

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Add pin definitions ralted to the NAND controller to be used
to set up the pin multiplexer.

Signed-off-by: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Stefano Babic 2010-03-29 15:56:10 +02:00 committed by trix
parent 7d27cd08b4
commit efb9591069
1 changed files with 9 additions and 0 deletions
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9
arch/arm/include/asm/arch-mx31/mx31-regs.h
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@ -207,6 +207,15 @@ struct clock_control_regs {
#define MUX_CTL_CSPI1_SS0 0x8e
#define MUX_CTL_CSPI1_SS1 0x8f
#define MUX_CTL_NFC_WP 0xD0
#define MUX_CTL_NFC_CE 0xD1
#define MUX_CTL_NFC_RB 0xD2
#define MUX_CTL_NFC_WE 0xD4
#define MUX_CTL_NFC_RE 0xD5
#define MUX_CTL_NFC_ALE 0xD6
#define MUX_CTL_NFC_CLE 0xD7
/*
* Helper macros for the MUX_[contact name]__[pin function] macros
*/