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memory: ti-gpmc: Fix lock up at A53 SPL during NAND boot on AM64-EVM

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AM64 ES2.0 bootrom seems to enable WAIT0EDGEDETECTION interrupt.
This causes a lockup at A53 SPL when accessing NAND controller
or ELM registers.

A good option would be to softrest GPMC block at probe
but this cannot be done for AM64 as SOFTRESET bit is marked
as reserved in SYSCONFIG register.

Fix the issue by disabling all IRQs at probe.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
This commit is contained in:
Roger Quadros 2024-02-06 16:02:51 +02:00 committed by Tom Rini
parent b12883fc38
commit ef473d541d
1 changed files with 6 additions and 0 deletions
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6
drivers/memory/ti-gpmc.c
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@ -1196,6 +1196,12 @@ static int gpmc_probe(struct udevice *dev)
gpmc_cfg = (struct gpmc *)priv->base;
gpmc_base = priv->base;
/*
* Disable all IRQs as some bootroms might leave them enabled
* and that will cause a lock-up later
*/
gpmc_write_reg(GPMC_IRQENABLE, 0);
priv->l3_clk = devm_clk_get(dev, "fck");
if (IS_ERR(priv->l3_clk))
return PTR_ERR(priv->l3_clk);