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arm: usb: dra7xx: xHCI registers based on USB port index

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Modify the determination of the base address of xHCI registers of DRA7XX
targets.
Before the commit: by the target.
After the commit: by the USB port index.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Roger Quadros <rogerq@ti.com>
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
This commit is contained in:
Uri Mashiach 2017-02-23 15:39:36 +02:00 committed by Tom Rini
parent 67566ab66b
commit ef3f3b8100
4 changed files with 15 additions and 2 deletions
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1
configs/dra7xx_evm_defconfig
View File

@ -91,6 +91,7 @@ CONFIG_OMAP_TIMER=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_XHCI_DRA7XX_INDEX=1
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_DWC3_OMAP=y

1
configs/dra7xx_hs_evm_defconfig
View File

@ -96,6 +96,7 @@ CONFIG_OMAP_TIMER=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_XHCI_DRA7XX_INDEX=1
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_DWC3_OMAP=y

9
drivers/usb/host/Kconfig
View File

@ -44,6 +44,15 @@ config USB_XHCI_ZYNQMP
help
Enables support for the on-chip xHCI controller on Xilinx ZynqMP SoCs.
config USB_XHCI_DRA7XX_INDEX
int "DRA7XX xHCI USB index"
range 0 1
default 0
depends on DRA7XX
help
Select the DRA7XX xHCI USB index.
Current supported values: 0, 1.
endif # USB_XHCI_HCD
config USB_EHCI_HCD

6
include/linux/usb/xhci-omap.h
View File

@ -10,14 +10,16 @@
#ifndef _ASM_ARCH_XHCI_OMAP_H_
#define _ASM_ARCH_XHCI_OMAP_H_
#ifdef CONFIG_TARGET_DRA7XX_EVM
#ifdef CONFIG_DRA7XX
#if CONFIG_USB_XHCI_DRA7XX_INDEX == 1
#define OMAP_XHCI_BASE 0x488d0000
#define OMAP_OCP1_SCP_BASE 0x4A081000
#define OMAP_OTG_WRAPPER_BASE 0x488c0000
#elif defined CONFIG_TARGET_AM57XX_EVM
#elif CONFIG_USB_XHCI_DRA7XX_INDEX == 0
#define OMAP_XHCI_BASE 0x48890000
#define OMAP_OCP1_SCP_BASE 0x4A084c00
#define OMAP_OTG_WRAPPER_BASE 0x48880000
#endif /* CONFIG_USB_XHCI_DRA7XX_INDEX == 1 */
#elif defined CONFIG_AM43XX
#define OMAP_XHCI_BASE 0x483d0000
#define OMAP_OCP1_SCP_BASE 0x483E8000