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OMAP5: Enable access to auxclk registers

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auxclk0 and auxclk1 are utilized on some OMAP5 boards.
Define the infrastructure needed for accessing them
without using magic numbers.

Also remove unrelated TPS62361 defines from clocks.h

Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
This commit is contained in:
Lubomir Popov 2013-05-15 04:41:01 +00:00 committed by Tom Rini
parent 960187ffa1
commit ee28edac43
3 changed files with 30 additions and 0 deletions
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8
arch/arm/cpu/armv7/omap5/prcm-regs.c
View File

@ -308,6 +308,10 @@ struct prcm_regs const omap5_es1_prcm = {
.prm_sldo_mpu_ctrl = 0x4ae07bd0,
.prm_sldo_mm_setup = 0x4ae07bd4,
.prm_sldo_mm_ctrl = 0x4ae07bd8,
/* SCRM stuff, used by some boards */
.scrm_auxclk0 = 0x4ae0a310,
.scrm_auxclk1 = 0x4ae0a314,
};
struct omap_sys_ctrl_regs const omap5_ctrl = {
@ -751,6 +755,10 @@ struct prcm_regs const omap5_es2_prcm = {
.prm_sldo_mm_ctrl = 0x4ae07cd8,
.prm_abbldo_mpu_setup = 0x4ae07cdc,
.prm_abbldo_mpu_ctrl = 0x4ae07ce0,
/* SCRM stuff, used by some boards */
.scrm_auxclk0 = 0x4ae0a310,
.scrm_auxclk1 = 0x4ae0a314,
};
struct prcm_regs const dra7xx_prcm = {

18
arch/arm/include/asm/arch-omap5/clock.h
View File

@ -281,6 +281,11 @@
#define TPS62361_BASE_VOLT_MV 500
#define TPS62361_VSEL0_GPIO 7
/* Defines for DPLL setup */
#define DPLL_LOCKED_FREQ_TOLERANCE_0 0
#define DPLL_LOCKED_FREQ_TOLERANCE_500_KHZ 500
#define DPLL_LOCKED_FREQ_TOLERANCE_1_MHZ 1000
#define DPLL_NO_LOCK 0
#define DPLL_LOCK 1
@ -298,4 +303,17 @@
#endif
#define V_SCLK V_OSCK
/* AUXCLKx reg fields */
#define AUXCLK_ENABLE_MASK (1 << 8)
#define AUXCLK_SRCSELECT_SHIFT 1
#define AUXCLK_SRCSELECT_MASK (3 << 1)
#define AUXCLK_CLKDIV_SHIFT 16
#define AUXCLK_CLKDIV_MASK (0xF << 16)
#define AUXCLK_SRCSELECT_SYS_CLK 0
#define AUXCLK_SRCSELECT_CORE_DPLL 1
#define AUXCLK_SRCSELECT_PER_DPLL 2
#define AUXCLK_SRCSELECT_ALTERNATE 3
#endif /* _CLOCKS_OMAP5_H_ */

4
arch/arm/include/asm/omap_common.h
View File

@ -351,6 +351,10 @@ struct prcm_regs {
u32 cm_l3init_usbphy_clkctrl;
u32 cm_l4per_mcbsp4_clkctrl;
u32 prm_vc_cfg_channel;
/* SCRM stuff, used by some boards */
u32 scrm_auxclk0;
u32 scrm_auxclk1;
};
struct omap_sys_ctrl_regs {