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am33xx/omap4+: Move SRAM_SCRATCH_SPACE_ADDR to <asm/arch/omap.h>
The location of valid scratch space is dependent on SoC, so move that there. On OMAP4+ we continue to use SRAM_SCRATCH_SPACE_ADDR. On am33xx/ti814x we want to use what the ROM defines as "public stack" which is the area after our defined download image space. Correct the comment about and location of CONFIG_SPL_TEXT_BASE. Signed-off-by: Tom Rini <trini@ti.com>
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@ -31,8 +31,10 @@
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#ifdef CONFIG_AM33XX
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#define NON_SECURE_SRAM_START 0x402F0400
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#define NON_SECURE_SRAM_END 0x40310000
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#define SRAM_SCRATCH_SPACE_ADDR 0x4030C000
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#elif defined(CONFIG_TI814X)
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#define NON_SECURE_SRAM_START 0x40300000
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#define NON_SECURE_SRAM_END 0x40320000
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#define SRAM_SCRATCH_SPACE_ADDR 0x4031B800
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#endif
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#endif
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@ -141,6 +141,7 @@ struct s32ktimer {
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*/
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#define NON_SECURE_SRAM_START 0x40304000
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#define NON_SECURE_SRAM_END 0x4030E000 /* Not inclusive */
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#define SRAM_SCRATCH_SPACE_ADDR NON_SECURE_SRAM_START
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/* base address for indirect vectors (internal boot mode) */
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#define SRAM_ROM_VECT_BASE 0x4030D000
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#endif
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@ -188,6 +188,7 @@ struct s32ktimer {
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*/
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#define NON_SECURE_SRAM_START 0x40300000
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#define NON_SECURE_SRAM_END 0x40320000 /* Not inclusive */
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#define SRAM_SCRATCH_SPACE_ADDR NON_SECURE_SRAM_START
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/* base address for indirect vectors (internal boot mode) */
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#define SRAM_ROM_VECT_BASE 0x4031F000
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@ -591,7 +591,6 @@ static inline u32 omap_revision(void)
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/*
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* SRAM scratch space entries
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*/
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#define SRAM_SCRATCH_SPACE_ADDR NON_SECURE_SRAM_START
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#define OMAP_SRAM_SCRATCH_OMAP_REV SRAM_SCRATCH_SPACE_ADDR
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#define OMAP_SRAM_SCRATCH_EMIF_SIZE (SRAM_SCRATCH_SPACE_ADDR + 0x4)
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#define OMAP_SRAM_SCRATCH_EMIF_T_NUM (SRAM_SCRATCH_SPACE_ADDR + 0xC)
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@ -306,12 +306,11 @@
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#define CONFIG_SPL
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#define CONFIG_SPL_FRAMEWORK
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/*
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* Place the image at the start of the ROM defined image space and leave
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* space for SRAM scratch entries (see arch/arm/include/omap_common.h).
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* Place the image at the start of the ROM defined image space.
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* We limit our size to the ROM-defined downloaded image area, and use the
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* rest of the space for stack.
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*/
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#define CONFIG_SPL_TEXT_BASE 0x402F0500
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#define CONFIG_SPL_TEXT_BASE 0x402F0400
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#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
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#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
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@ -215,12 +215,11 @@
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#define CONFIG_SPL
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#define CONFIG_SPL_FRAMEWORK
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/*
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* Place the image at the start of the ROM defined image space and leave
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* space for SRAM scratch entries (see arch/arm/include/omap_common.h).
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* Place the image at the start of the ROM defined image space.
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* We limit our size to the ROM-defined downloaded image area, and use the
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* rest of the space for stack.
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*/
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#define CONFIG_SPL_TEXT_BASE 0x402F0500
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#define CONFIG_SPL_TEXT_BASE 0x402F0400
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#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
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#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
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@ -205,12 +205,11 @@
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#define CONFIG_SPL
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#define CONFIG_SPL_FRAMEWORK
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/*
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* Place the image at the start of the ROM defined image space and leave
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* space for SRAM scratch entries (see arch/arm/include/omap_common.h).
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* Place the image at the start of the ROM defined image space.
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* We limit our size to the ROM-defined downloaded image area, and use the
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* rest of the space for stack.
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*/
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#define CONFIG_SPL_TEXT_BASE 0x402F0500
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#define CONFIG_SPL_TEXT_BASE 0x402F0400
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#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
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#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
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