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dm: i2c: Add tests for I2C
Add some basic tests to check that the system works as expected. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
This commit is contained in:
Simon Glass
parent
20142019a9
commit
ecc2ed55ee
@ -89,6 +89,18 @@ void ut_failf(struct dm_test_state *dms, const char *fname, int line,
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} \
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}
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/* Assert that a pointer is not NULL */
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#define ut_assertnonnull(expr) { \
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const void *val = (expr); \
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\
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if (val == NULL) { \
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ut_failf(dms, __FILE__, __LINE__, __func__, \
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#expr " = NULL", \
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"Expected non-null, got NULL"); \
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return -1; \
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} \
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}
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/* Assert that an operation succeeds (returns 0) */
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#define ut_assertok(cond) ut_asserteq(0, cond)
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@ -20,4 +20,5 @@ ifneq ($(CONFIG_SANDBOX),)
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obj-$(CONFIG_DM_GPIO) += gpio.o
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obj-$(CONFIG_DM_SPI) += spi.o
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obj-$(CONFIG_DM_SPI_FLASH) += sf.o
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obj-$(CONFIG_DM_I2C) += i2c.o
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endif
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216
test/dm/i2c.c
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216
test/dm/i2c.c
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@ -0,0 +1,216 @@
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/*
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* Copyright (C) 2013 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* Note: Test coverage does not include 10-bit addressing
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*/
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#include <common.h>
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#include <dm.h>
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#include <fdtdec.h>
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#include <i2c.h>
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#include <dm/device-internal.h>
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#include <dm/test.h>
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#include <dm/uclass-internal.h>
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#include <dm/ut.h>
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#include <dm/util.h>
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#include <asm/state.h>
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#include <asm/test.h>
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static const int busnum;
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static const int chip = 0x2c;
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/* Test that we can find buses and chips */
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static int dm_test_i2c_find(struct dm_test_state *dms)
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{
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struct udevice *bus, *dev;
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const int no_chip = 0x10;
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ut_asserteq(-ENODEV, uclass_find_device_by_seq(UCLASS_I2C, busnum,
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false, &bus));
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/*
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* i2c_post_bind() will bind devices to chip selects. Check this then
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* remove the emulation and the slave device.
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*/
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ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
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ut_assertok(i2c_probe(bus, chip, 0, &dev));
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ut_asserteq(-ENODEV, i2c_probe(bus, no_chip, 0, &dev));
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ut_asserteq(-ENODEV, uclass_get_device_by_seq(UCLASS_I2C, 1, &bus));
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return 0;
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}
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DM_TEST(dm_test_i2c_find, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
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static int dm_test_i2c_read_write(struct dm_test_state *dms)
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{
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struct udevice *bus, *dev;
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uint8_t buf[5];
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ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
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ut_assertok(i2c_get_chip(bus, chip, &dev));
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ut_assertok(i2c_read(dev, 0, buf, 5));
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ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));
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ut_assertok(i2c_write(dev, 2, (uint8_t *)"AB", 2));
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ut_assertok(i2c_read(dev, 0, buf, 5));
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ut_assertok(memcmp(buf, "\0\0AB\0", sizeof(buf)));
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return 0;
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}
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DM_TEST(dm_test_i2c_read_write, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
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static int dm_test_i2c_speed(struct dm_test_state *dms)
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{
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struct udevice *bus, *dev;
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uint8_t buf[5];
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ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
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ut_assertok(i2c_get_chip(bus, chip, &dev));
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ut_assertok(i2c_set_bus_speed(bus, 100000));
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ut_assertok(i2c_read(dev, 0, buf, 5));
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ut_assertok(i2c_set_bus_speed(bus, 400000));
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ut_asserteq(400000, i2c_get_bus_speed(bus));
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ut_assertok(i2c_read(dev, 0, buf, 5));
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ut_asserteq(-EINVAL, i2c_write(dev, 0, buf, 5));
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return 0;
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}
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DM_TEST(dm_test_i2c_speed, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
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static int dm_test_i2c_offset_len(struct dm_test_state *dms)
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{
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struct udevice *bus, *dev;
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uint8_t buf[5];
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ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
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ut_assertok(i2c_get_chip(bus, chip, &dev));
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ut_assertok(i2c_set_chip_offset_len(dev, 1));
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ut_assertok(i2c_read(dev, 0, buf, 5));
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/* This is not supported by the uclass */
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ut_asserteq(-EINVAL, i2c_set_chip_offset_len(dev, 5));
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return 0;
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}
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DM_TEST(dm_test_i2c_offset_len, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
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static int dm_test_i2c_probe_empty(struct dm_test_state *dms)
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{
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struct udevice *bus, *dev;
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ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
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ut_assertok(i2c_probe(bus, SANDBOX_I2C_TEST_ADDR, 0, &dev));
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return 0;
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}
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DM_TEST(dm_test_i2c_probe_empty, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
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static int dm_test_i2c_bytewise(struct dm_test_state *dms)
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{
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struct udevice *bus, *dev;
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struct udevice *eeprom;
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uint8_t buf[5];
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ut_assertok(uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus));
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ut_assertok(i2c_get_chip(bus, chip, &dev));
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ut_assertok(i2c_read(dev, 0, buf, 5));
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ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));
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/* Tell the EEPROM to only read/write one register at a time */
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ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));
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ut_assertnonnull(eeprom);
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sandbox_i2c_eeprom_set_test_mode(eeprom, SIE_TEST_MODE_SINGLE_BYTE);
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/* Now we only get the first byte - the rest will be 0xff */
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ut_assertok(i2c_read(dev, 0, buf, 5));
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ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf)));
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/* If we do a separate transaction for each byte, it works */
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ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS));
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ut_assertok(i2c_read(dev, 0, buf, 5));
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ut_assertok(memcmp(buf, "\0\0\0\0\0", sizeof(buf)));
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/* This will only write A */
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ut_assertok(i2c_set_chip_flags(dev, 0));
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ut_assertok(i2c_write(dev, 2, (uint8_t *)"AB", 2));
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ut_assertok(i2c_read(dev, 0, buf, 5));
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ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf)));
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/* Check that the B was ignored */
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ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_RD_ADDRESS));
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ut_assertok(i2c_read(dev, 0, buf, 5));
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ut_assertok(memcmp(buf, "\0\0A\0\0\0", sizeof(buf)));
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/* Now write it again with the new flags, it should work */
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ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS));
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ut_assertok(i2c_write(dev, 2, (uint8_t *)"AB", 2));
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ut_assertok(i2c_read(dev, 0, buf, 5));
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ut_assertok(memcmp(buf, "\0\xff\xff\xff\xff", sizeof(buf)));
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ut_assertok(i2c_set_chip_flags(dev, DM_I2C_CHIP_WR_ADDRESS |
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DM_I2C_CHIP_RD_ADDRESS));
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ut_assertok(i2c_read(dev, 0, buf, 5));
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ut_assertok(memcmp(buf, "\0\0AB\0\0", sizeof(buf)));
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/* Restore defaults */
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sandbox_i2c_eeprom_set_test_mode(eeprom, SIE_TEST_MODE_NONE);
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ut_assertok(i2c_set_chip_flags(dev, 0));
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return 0;
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}
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DM_TEST(dm_test_i2c_bytewise, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
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static int dm_test_i2c_offset(struct dm_test_state *dms)
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{
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struct udevice *eeprom;
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struct udevice *dev;
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uint8_t buf[5];
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ut_assertok(i2c_get_chip_for_busnum(busnum, chip, &dev));
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/* Do a transfer so we can find the emulator */
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ut_assertok(i2c_read(dev, 0, buf, 5));
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ut_assertok(uclass_first_device(UCLASS_I2C_EMUL, &eeprom));
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/* Offset length 0 */
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sandbox_i2c_eeprom_set_offset_len(eeprom, 0);
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ut_assertok(i2c_set_chip_offset_len(dev, 0));
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ut_assertok(i2c_write(dev, 10 /* ignored */, (uint8_t *)"AB", 2));
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ut_assertok(i2c_read(dev, 0, buf, 5));
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ut_assertok(memcmp(buf, "AB\0\0\0\0", sizeof(buf)));
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/* Offset length 1 */
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sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
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ut_assertok(i2c_set_chip_offset_len(dev, 1));
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ut_assertok(i2c_write(dev, 2, (uint8_t *)"AB", 2));
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ut_assertok(i2c_read(dev, 0, buf, 5));
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ut_assertok(memcmp(buf, "ABAB\0", sizeof(buf)));
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/* Offset length 2 */
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sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
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ut_assertok(i2c_set_chip_offset_len(dev, 2));
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ut_assertok(i2c_write(dev, 0x210, (uint8_t *)"AB", 2));
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ut_assertok(i2c_read(dev, 0x210, buf, 5));
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ut_assertok(memcmp(buf, "AB\0\0\0", sizeof(buf)));
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/* Offset length 3 */
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sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
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ut_assertok(i2c_set_chip_offset_len(dev, 2));
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ut_assertok(i2c_write(dev, 0x410, (uint8_t *)"AB", 2));
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ut_assertok(i2c_read(dev, 0x410, buf, 5));
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ut_assertok(memcmp(buf, "AB\0\0\0", sizeof(buf)));
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/* Offset length 4 */
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sandbox_i2c_eeprom_set_offset_len(eeprom, 2);
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ut_assertok(i2c_set_chip_offset_len(dev, 2));
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ut_assertok(i2c_write(dev, 0x420, (uint8_t *)"AB", 2));
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ut_assertok(i2c_read(dev, 0x420, buf, 5));
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ut_assertok(memcmp(buf, "AB\0\0\0", sizeof(buf)));
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/* Restore defaults */
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sandbox_i2c_eeprom_set_offset_len(eeprom, 1);
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return 0;
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}
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DM_TEST(dm_test_i2c_offset, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
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@ -93,6 +93,23 @@
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num-gpios = <10>;
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};
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i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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compatible = "sandbox,i2c";
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clock-frequency = <100000>;
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eeprom@2c {
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reg = <0x2c>;
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compatible = "i2c-eeprom";
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emul {
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compatible = "sandbox,i2c-eeprom";
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sandbox,filename = "i2c.bin";
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sandbox,size = <256>;
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};
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};
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};
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spi@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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