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rockchip: rk3588-rock-5b: Update defconfig
Update defconfig for rk3588-rock-5b with new defaults. Remove the SPL_ROCKCHIP_BACK_TO_BROM=y option, SPL is expected to load next stage from a FIT image and then jump to next stage not back to BootRom. Extend SPL_MAX_SIZE to 0x40000, SPL is loaded to 0x0 and TF-A is loaded to 0x40000, use the space in between as SPL_MAX_SIZE. Add config option to include useful gpio cmd. Remove the CONFIG_NET_RANDOM_ETHADDR=y option, ethaddr and eth1addr is set based on cpuid read from OTP. Add CONFIG_SYS_NS16550_MEM32=y to use 32bit access of serial register. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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@ -10,9 +10,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
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CONFIG_DEFAULT_DEVICE_TREE="rk3588-rock-5b"
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CONFIG_ROCKCHIP_RK3588=y
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CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
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CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
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CONFIG_SPL_MMC=y
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CONFIG_SPL_SERIAL=y
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CONFIG_SPL_STACK_R_ADDR=0x600000
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CONFIG_TARGET_ROCK5B_RK3588=y
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@ -30,7 +28,7 @@ CONFIG_OF_BOARD_SETUP=y
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CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-rock-5b.dtb"
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_SPL_MAX_SIZE=0x20000
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CONFIG_SPL_MAX_SIZE=0x40000
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CONFIG_SPL_PAD_TO=0x7f8000
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CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
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CONFIG_SPL_BSS_START_ADDR=0x4000000
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@ -39,6 +37,7 @@ CONFIG_SPL_BSS_MAX_SIZE=0x4000
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# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_ATF=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_PCI=y
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@ -49,7 +48,6 @@ CONFIG_CMD_REGULATOR=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_LIVE=y
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CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_SPL_REGMAP=y
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CONFIG_SPL_SYSCON=y
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CONFIG_SPL_CLK=y
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@ -73,6 +71,7 @@ CONFIG_PWM_ROCKCHIP=y
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CONFIG_SPL_RAM=y
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CONFIG_BAUDRATE=1500000
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_SYS_NS16550_MEM32=y
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CONFIG_SYSRESET=y
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CONFIG_USB=y
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CONFIG_USB_EHCI_HCD=y
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