arm1176: fix relocation

Fix relocation code for arm1176, do it like other ARM
CPU's are doing.
Tested only with CONFIG_SKIP_RELOCATE_UBOOT defined
and using nand_spl (booting from nand). Test done on
s3c6410 based board (not yet supported in main line).

Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
This commit is contained in:
Darius Augulis 2010-10-25 13:48:03 +03:00 committed by Wolfgang Denk
parent 123fb7deb2
commit ea34c9d6ed
2 changed files with 98 additions and 62 deletions

View File

@ -116,14 +116,46 @@ _armboot_start:
/* /*
* These are defined in the board-specific linker script. * These are defined in the board-specific linker script.
* Subtracting _start from them lets the linker put their
* relative position in the executable instead of leaving
* them null.
*/ */
.globl _bss_start
_bss_start:
.word __bss_start
.globl _bss_end .globl _bss_start_ofs
_bss_end: _bss_start_ofs:
.word _end .word __bss_start - _start
.globl _bss_end_ofs
_bss_end_ofs:
.word _end - _start
.globl _datarel_start_ofs
_datarel_start_ofs:
.word __datarel_start - _start
.globl _datarelrolocal_start_ofs
_datarelrolocal_start_ofs:
.word __datarelrolocal_start - _start
.globl _datarellocal_start_ofs
_datarellocal_start_ofs:
.word __datarellocal_start - _start
.globl _datarelro_start_ofs
_datarelro_start_ofs:
.word __datarelro_start - _start
.globl _rel_dyn_start_ofs
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
.globl _rel_dyn_end_ofs
_rel_dyn_end_ofs:
.word __rel_dyn_end - _start
.globl _dynsym_start_ofs
_dynsym_start_ofs:
.word __dynsym_start - _start
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */ /* IRQ stack memory (calculated at run-time) + 8 bytes */
@ -131,30 +163,6 @@ _bss_end:
IRQ_STACK_START_IN: IRQ_STACK_START_IN:
.word 0x0badc0de .word 0x0badc0de
.globl _datarel_start
_datarel_start:
.word __datarel_start
.globl _datarelrolocal_start
_datarelrolocal_start:
.word __datarelrolocal_start
.globl _datarellocal_start
_datarellocal_start:
.word __datarellocal_start
.globl _datarelro_start
_datarelro_start:
.word __datarelro_start
.globl _got_start
_got_start:
.word __got_start
.globl _got_end
_got_end:
.word __got_end
/* /*
* the actual reset code * the actual reset code
*/ */
@ -275,9 +283,8 @@ stack_setup:
adr r0, _start adr r0, _start
ldr r2, _TEXT_BASE ldr r2, _TEXT_BASE
ldr r3, _bss_start ldr r3, _bss_start_ofs
sub r2, r3, r2 /* r2 <- size of armboot */ add r2, r0, r3 /* r2 <- source end address */
add r2, r0, r2 /* r2 <- source end address */
cmp r0, r6 cmp r0, r6
beq clear_bss beq clear_bss
@ -289,24 +296,44 @@ copy_loop:
blo copy_loop blo copy_loop
#ifndef CONFIG_PRELOADER #ifndef CONFIG_PRELOADER
/* fix got entries */ /*
ldr r1, _TEXT_BASE /* Text base */ * fix .rel.dyn relocations
mov r0, r7 /* reloc addr */ */
ldr r2, _got_start /* addr in Flash */ ldr r0, _TEXT_BASE /* r0 <- Text base */
ldr r3, _got_end /* addr in Flash */ sub r9, r7, r0 /* r9 <- relocation offset */
sub r3, r3, r1 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
add r3, r3, r0 add r10, r10, r0 /* r10 <- sym table in FLASH */
sub r2, r2, r1 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
add r2, r2, r0 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
fixloop: fixloop:
ldr r4, [r2] ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
sub r4, r4, r1 add r0, r0, r9 /* r0 <- location to fix up in RAM */
add r4, r4, r0 ldr r1, [r2, #4]
str r4, [r2] and r8, r1, #0xff
add r2, r2, #4 cmp r8, #23 /* relative fixup? */
beq fixrel
cmp r8, #2 /* absolute fixup? */
beq fixabs
/* ignore unknown type of fixup */
b fixnext
fixabs:
/* absolute fix: set location to (offset) symbol value */
mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
add r1, r10, r1 /* r1 <- address of symbol in table */
ldr r1, [r1, #4] /* r1 <- symbol value */
add r1, r1, r9 /* r1 <- relocated sym addr */
b fixnext
fixrel:
/* relative fix: increase location by offset */
ldr r1, [r0]
add r1, r1, r9
fixnext:
str r1, [r0]
add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
cmp r2, r3 cmp r2, r3
bne fixloop blo fixloop
#endif #endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
@ -350,13 +377,11 @@ skip_hw_init:
clear_bss: clear_bss:
#ifndef CONFIG_PRELOADER #ifndef CONFIG_PRELOADER
ldr r0, _bss_start ldr r0, _bss_start_ofs
ldr r1, _bss_end ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */ ldr r3, _TEXT_BASE /* Text base */
mov r4, r7 /* reloc addr */ mov r4, r7 /* reloc addr */
sub r0, r0, r3
add r0, r0, r4 add r0, r0, r4
sub r1, r1, r3
add r1, r1, r4 add r1, r1, r4
mov r2, #0x00000000 /* clear */ mov r2, #0x00000000 /* clear */
@ -378,18 +403,20 @@ clbss_l:str r2, [r0] /* clear loop... */
_nand_boot: .word nand_boot _nand_boot: .word nand_boot
#else #else
ldr r0, _TEXT_BASE ldr r0, _board_init_r_ofs
ldr r2, _board_init_r adr r1, _start
sub r2, r2, r0 add lr, r0, r1
add r2, r2, r7 /* position from board_init_r in RAM */ #ifndef CONFIG_SKIP_RELOCATE_UBOOT
add lr, lr, r9
#endif
/* setup parameters for board_init_r */ /* setup parameters for board_init_r */
mov r0, r5 /* gd_t */ mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */ mov r1, r7 /* dest_addr */
/* jump to it ... */ /* jump to it ... */
mov lr, r2
mov pc, lr mov pc, lr
_board_init_r: .word board_init_r _board_init_r_ofs:
.word board_init_r - _start
#endif #endif
#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ #else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */

View File

@ -51,11 +51,14 @@ SECTIONS
*(.data.rel.ro) *(.data.rel.ro)
} }
__got_start = .;
. = ALIGN(4); . = ALIGN(4);
.got : { *(.got) } __rel_dyn_start = .;
.rel.dyn : { *(.rel.dyn) }
__rel_dyn_end = .;
__dynsym_start = .;
.dynsym : { *(.dynsym) }
__got_end = .;
. = .; . = .;
__u_boot_cmd_start = .; __u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) } .u_boot_cmd : { *(.u_boot_cmd) }
@ -65,4 +68,10 @@ SECTIONS
__bss_start = .; __bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); } .bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .; _end = .;
/DISCARD/ : { *(.dynstr*) }
/DISCARD/ : { *(.dynamic*) }
/DISCARD/ : { *(.plt*) }
/DISCARD/ : { *(.interp*) }
/DISCARD/ : { *(.gnu*) }
} }