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ppc: arm: Move sdhc_clk into arch_global_data
This is used by both powerpc and arm, but I think it still qualifies as architecture-specific. Signed-off-by: Simon Glass <sjg@chromium.org>
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225ca83dfe
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@ -478,11 +478,11 @@ int get_clocks(void)
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{
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#ifdef CONFIG_FSL_ESDHC
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#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
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gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
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gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
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#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
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gd->sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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#else
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gd->sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
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gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
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#endif
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#endif
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return 0;
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@ -229,9 +229,9 @@ int get_clocks(void)
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{
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#ifdef CONFIG_FSL_ESDHC
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#if CONFIG_SYS_FSL_ESDHC_ADDR == IMX_MMC_SDHC2_BASE
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gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
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gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
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#else
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gd->sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
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gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC1_CLK);
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#endif
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#endif
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return 0;
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@ -37,23 +37,23 @@ int get_clocks(void)
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#ifdef CONFIG_FSL_ESDHC
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#ifdef CONFIG_FSL_USDHC
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#if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR
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gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
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gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
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#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC3_BASE_ADDR
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gd->sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC4_BASE_ADDR
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gd->sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
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gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
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#else
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gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
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gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
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#endif
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#else
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#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
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gd->sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
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gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
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#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
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gd->sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC4_BASE_ADDR
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gd->sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
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gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
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#else
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gd->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
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gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
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#endif
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#endif
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#endif
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@ -26,6 +26,9 @@
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/* Architecture-specific global data */
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struct arch_global_data {
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#if defined(CONFIG_FSL_ESDHC)
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u32 sdhc_clk;
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#endif
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#ifdef CONFIG_AT91FAMILY
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/* "static data" needed by at91's clock.c */
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unsigned long cpu_clk_rate_hz;
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@ -69,9 +72,6 @@ typedef struct global_data {
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unsigned long env_addr; /* Address of Environment struct */
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unsigned long env_valid; /* Checksum of Environment valid? */
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unsigned long fb_base; /* base address of frame buffer */
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#ifdef CONFIG_FSL_ESDHC
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unsigned long sdhc_clk;
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#endif
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unsigned long relocaddr; /* Start address of U-Boot in RAM */
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phys_size_t ram_size; /* RAM size */
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unsigned long mon_len; /* monitor len */
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@ -478,7 +478,7 @@ int get_clocks(void)
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gd->arch.tdm_clk = tdm_clk;
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#endif
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#if defined(CONFIG_FSL_ESDHC)
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gd->sdhc_clk = sdhc_clk;
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gd->arch.sdhc_clk = sdhc_clk;
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#endif
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gd->arch.core_clk = core_clk;
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gd->arch.i2c1_clk = i2c1_clk;
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@ -570,7 +570,8 @@ static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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strmhz(buf, gd->arch.tdm_clk));
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#endif
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#if defined(CONFIG_FSL_ESDHC)
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printf(" SDHC: %-4s MHz\n", strmhz(buf, gd->sdhc_clk));
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printf(" SDHC: %-4s MHz\n",
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strmhz(buf, gd->arch.sdhc_clk));
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#endif
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#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
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defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)
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@ -428,9 +428,9 @@ int get_clocks (void)
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#if defined(CONFIG_FSL_ESDHC)
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#if defined(CONFIG_MPC8569) || defined(CONFIG_P1010) ||\
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defined(CONFIG_P1014)
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gd->sdhc_clk = gd->bus_clk;
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gd->arch.sdhc_clk = gd->bus_clk;
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#else
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gd->sdhc_clk = gd->bus_clk / 2;
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gd->arch.sdhc_clk = gd->bus_clk / 2;
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#endif
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#endif /* defined(CONFIG_FSL_ESDHC) */
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@ -29,6 +29,9 @@
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/* Architecture-specific global data */
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struct arch_global_data {
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#if defined(CONFIG_FSL_ESDHC)
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u32 sdhc_clk;
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#endif
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#if defined(CONFIG_8xx)
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unsigned long brg_clk;
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#endif
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@ -150,9 +153,6 @@ typedef struct global_data {
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/* We cannot bracket this with CONFIG_PCI due to mpc5xxx */
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unsigned long pci_clk;
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unsigned long mem_clk;
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#if defined(CONFIG_FSL_ESDHC)
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u32 sdhc_clk;
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#endif
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phys_size_t ram_size; /* RAM size */
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unsigned long env_addr; /* Address of Environment struct */
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unsigned long env_valid; /* Checksum of Environment valid? */
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@ -583,7 +583,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
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mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
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mmc->f_min = 400000;
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mmc->f_max = MIN(gd->sdhc_clk, 52000000);
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mmc->f_max = MIN(gd->arch.sdhc_clk, 52000000);
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mmc->b_max = 0;
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mmc_register(mmc);
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@ -598,7 +598,7 @@ int fsl_esdhc_mmc_init(bd_t *bis)
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cfg = malloc(sizeof(struct fsl_esdhc_cfg));
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memset(cfg, 0, sizeof(struct fsl_esdhc_cfg));
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cfg->esdhc_base = CONFIG_SYS_FSL_ESDHC_ADDR;
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cfg->sdhc_clk = gd->sdhc_clk;
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cfg->sdhc_clk = gd->arch.sdhc_clk;
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return fsl_esdhc_initialize(bis, cfg);
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}
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@ -616,7 +616,7 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd)
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#endif
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do_fixup_by_compat_u32(blob, compat, "clock-frequency",
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gd->sdhc_clk, 1);
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gd->arch.sdhc_clk, 1);
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do_fixup_by_compat(blob, compat, "status", "okay",
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4 + 1, 1);
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