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igep00x0: Use the SRAM available for SPL.
Move CONFIG_SPL_TEXT_BASE down to 0x40200000 and set CONFIG_SPL_MAX_SIZE to (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE), so that it's clear what the limit is. This will also help some compilers to fit all the code into the allocated space. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
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@ -19,6 +19,13 @@
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#include <configs/ti_omap3_common.h>
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#include <configs/ti_omap3_common.h>
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#include <asm/mach-types.h>
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#include <asm/mach-types.h>
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/* SRAM starts at 0x40200000 and ends at 0x4020FFFF (64KB) */
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#undef CONFIG_SPL_MAX_SIZE
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#undef CONFIG_SPL_TEXT_BASE
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#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE)
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#define CONFIG_SPL_TEXT_BASE 0x40200000
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/*
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/*
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* Display CPU and Board information
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* Display CPU and Board information
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*/
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*/
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