Patch by Scott McNutt, 25 Apr 2004:

Add Nios GDB/JTAG Console support:
- Add stubs to support gdb via JTAG.
- Add support for console over JTAG.
- Minor cleanup.

CHANGELOG

@@ -2,6 +2,12 @@
 Changes since U-Boot 1.1.1:
 ======================================================================
 
+* Patch by Scott McNutt, 25 Apr 2004:
+  Add Nios GDB/JTAG Console support:
+  - Add stubs to support gdb via JTAG.
+  - Add support for console over JTAG.
+  - Minor cleanup.
+
 * Add support for CATcenter board (based on PPChameleon ME module)
 
 * Patch by Klaus Heydeck, 12 May 2004:

MAINTAINERS

@@ -98,7 +98,6 @@ Wolfgang Denk <wd@denx.de>
 	TQM8255			MPC8255
 
 	CPU86			MPC8260
-	PM825			MPC8250
 	PM826			MPC8260
 	TQM8260			MPC8260
 

board/altera/dk1c20/vectors.S

@@ -38,6 +38,8 @@
  *	_cwp_lolimit	-Handles register window underflows.
  *	_cwp_hilimit	-Handles register window overflows.
  *	_timebase_int	-Increments the timebase.
+ *	_brkpt_hw_int	-Hardware breakpoint handler.
+ *	_brkpt_sw_int	-Software breakpoint handler.
  *	_def_xhandler	-Default exception handler.
  *
  * _timebase_int handles a Nios Timer interrupt and increments the
@@ -58,9 +60,8 @@ _vectors:
 	.long	_def_xhandler@h		/* Vector 0  - NMI */
 	.long	_cwp_lolimit@h		/* Vector 1  -  underflow */
 	.long	_cwp_hilimit@h		/* Vector 2  - overflow	*/
-
+	.long	_brkpt_hw_int@h		/* Vector 3 - Breakpoint */
-	.long	_def_xhandler@h		/* Vector 3 - GNUPro debug */
+	.long	_brkpt_sw_int@h		/* Vector 4 - Single step*/
-	.long	_def_xhandler@h		/* Vector 4 - GNUPro debug */
 	.long	_def_xhandler@h		/* Vector 5 - GNUPro debug */
 	.long	_def_xhandler@h		/* Vector 6 - future reserved */
 	.long	_def_xhandler@h		/* Vector 7 - future reserved */

config.mk

@@ -126,7 +126,7 @@ endif
 # this option have to be placed behind -Wall -- that's why it is here
 ifeq ($(ARCH),nios)
 ifeq ($(findstring 2.9,$(shell $(CC) --version)),2.9)
-CFLAGS := $(CPPFLAGS) -Wno-trigraphs
+CFLAGS := $(CPPFLAGS) -Wall -Wno-trigraphs
 endif
 endif
 

cpu/nios/interrupts.c

@@ -179,7 +179,7 @@ int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	int vec;
 
 	printf ("\nInterrupt-Information:\n");
-	printf ("Nr  Routine   Arg       CouIt's ok to cnt\n");
+	printf ("Nr  Routine   Arg       Count\n");
 
 	for (vec=0; vec<64; vec++) {
 		if (irq_vecs[vec].handler != NULL) {

cpu/nios/serial.c

@@ -26,6 +26,48 @@
 #include <watchdog.h>
 #include <nios-io.h>
 
+/*------------------------------------------------------------------
+ * JTAG acts as the serial port
+ *-----------------------------------------------------------------*/
+#if defined(CONFIG_CONSOLE_JTAG)
+
+static nios_jtag_t *jtag = (nios_jtag_t *)CFG_NIOS_CONSOLE;
+
+void serial_setbrg( void ){ return; }
+int serial_init( void ) { return(0);}
+
+void serial_putc (char c)
+{
+	while ((jtag->txcntl & NIOS_JTAG_TRDY) != 0)
+		WATCHDOG_RESET ();
+	jtag->txcntl = NIOS_JTAG_TRDY | (unsigned char)c;
+}
+
+void serial_puts (const char *s)
+{
+	while (*s != 0)
+		serial_putc (*s++);
+}
+
+int serial_tstc (void)
+{
+	return (jtag->rxcntl & NIOS_JTAG_RRDY);
+}
+
+int serial_getc (void)
+{
+	int c;
+	while (serial_tstc() == 0)
+		WATCHDOG_RESET ();
+	c = jtag->rxcntl & 0x0ff;
+	jtag->rxcntl = 0;
+	return (c);
+}
+
+/*------------------------------------------------------------------
+ * UART the serial port
+ *-----------------------------------------------------------------*/
+#else
 
 static nios_uart_t *uart = (nios_uart_t *)CFG_NIOS_CONSOLE;
 
@@ -34,12 +76,12 @@ static nios_uart_t *uart = (nios_uart_t *)CFG_NIOS_CONSOLE;
 /* Everything's already setup for fixed-baud PTF
  * assignment
  */
-void serial_setbrg( void ){ return; }
+void serial_setbrg (void){ return; }
-int serial_init( void ) { return(0);}
+int serial_init (void) { return (0);}
 
 #else
 
-void serial_setbrg( void )
+void serial_setbrg (void)
 {
 	DECLARE_GLOBAL_DATA_PTR;
 	unsigned div;
@@ -49,39 +91,44 @@ void serial_setbrg( void )
 	return;
 }
 
-int serial_init( void )
+int serial_init (void)
 {
-	serial_setbrg();
+	serial_setbrg ();
-	return(0);
+	return (0);
 }
 
 #endif /* CFG_NIOS_FIXEDBAUD */
 
 
-void serial_putc( char c )
+/*-----------------------------------------------------------------------
+ * UART CONSOLE
+ *---------------------------------------------------------------------*/
+void serial_putc (char c)
 {
 	if (c == '\n')
-		serial_putc('\r');
+		serial_putc ('\r');
-	while( (uart->status & NIOS_UART_TRDY) == 0 )
+	while ((uart->status & NIOS_UART_TRDY) == 0)
 		WATCHDOG_RESET ();
 	uart->txdata = (unsigned char)c;
 }
 
-void serial_puts( const char *s )
+void serial_puts (const char *s)
 {
-	while( *s != 0 ) {
+	while (*s != 0) {
-		serial_putc( *s++ );
+		serial_putc (*s++);
 	}
 }
 
-int serial_tstc( void )
+int serial_tstc (void)
 {
-	return( uart->status & NIOS_UART_RRDY);
+	return (uart->status & NIOS_UART_RRDY);
 }
 
-int serial_getc( void )
+int serial_getc (void)
 {
-	while( serial_tstc() == 0 )
+	while (serial_tstc () == 0)
 		WATCHDOG_RESET ();
 	return( uart->rxdata & 0x00ff );
 }
+
+#endif /* CONFIG_JTAG_CONSOLE */

cpu/nios/start.S

@@ -93,6 +93,14 @@ _start:
 	subi	%g6, 4			/* %g6 <- src addr */
 	ld	%g7, [%g7]		/* %g7 <- dst addr */
 
+	/* No need to move text sections if we're already located
+	 * at the proper address.
+	 */
+	cmp	%g7, %g6
+	ifs	cc_z
+	br	reloc
+	nop				/* delay slot */
+
 1:	cmp	%g7, %g5
 	skps	cc_nz
 	br	2f
@@ -114,6 +122,7 @@ _start:
 	 pfx	%xhi(reloc@h)
 	 movhi	%g0, %xlo(reloc@h)
 	 jmp	%g0
+	 nop				/* delay slot */
 reloc:
 
 	/*
@@ -140,6 +149,48 @@ reloc:
 	nop				/* delay slot */
 4:
 
+	/*
+	 * INIT VECTOR TABLE
+	 */
+	pfx	%hi(CFG_VECT_BASE)
+	movi	%g0, %lo(CFG_VECT_BASE)
+	pfx	%xhi(CFG_VECT_BASE)
+	movhi	%g0, %xlo(CFG_VECT_BASE)	/* dst */
+	mov	%l0, %g0
+
+	pfx	%hi(_vectors)
+	movi	%g1, %lo(_vectors)
+	pfx	%xhi(_vectors)
+	movhi	%g1, %xlo(_vectors)	/* src */
+	bgen	%g2, 6			/* cnt = 64 */
+
+	ldp	%g3, [%l0, 3]		/* bkpt vector */
+	ldp	%g4, [%l0, 4]		/* single step vector */
+
+5:	ld	%g7, [%g1]
+	addi	%g1, 4			/* src++ */
+	st	[%g0], %g7
+	addi	%g0, 4			/* dst++ */
+
+	subi	%g2, 1			/* cnt-- */
+	ifrnz	%g2
+	br	5b
+	nop				/* delay slot */
+
+#if defined(CONFIG_ROM_STUBS)
+	/* Restore the breakpoint and single step exception
+	 * vectors to their original values.
+	 */
+	stp	[%l0,3], %g3		/* breakpoint */
+	stp	[%l0,4], %g4		/* single step */
+#endif
+
+	/* For debug startup convenience ... software breakpoints
+	 * set prior to this point may not succeed ;-)
+	 */
+	.global __start
+__start:
+
 	/*
 	 * Call board_init -- never returns
 	 */

cpu/nios/traps.S

@@ -557,3 +557,26 @@ _timebase_int:
 	mov	%fp, %sp
 
 	tret	%o7			/* Done */
+
+/*************************************************************************
+ * GDB stubs
+ ************************************************************************/
+	.text
+	.global _brkpt_hw_int, _brkpt_sw_int
+	.align	4
+
+_brkpt_hw_int:
+	movi	%l1, 9
+	pfx	3
+	wrctl	%l1
+	pfx	4
+	wrctl	%l1
+
+_brkpt_sw_int:
+	movi	%l1, 9
+	pfx	3
+	wrctl	%l1
+	pfx	4
+	wrctl	%l1
+
+	tret	%o7

doc/README.nios

@@ -55,6 +55,12 @@ sources (when altera silicon is not involved). This isn't really
 a problem as little, if any, of the Altera source contains
 features that are not already available in U-Boot.
 
+1.3 Debugging via OCI
+---------------------
+The Nios port supports debugging with gdb and/or nios-console
+via the JTAG port. Stubs for debugging with gdb via the serial
+port are not currently implemented.
+
 
 2. CONFIGURATION OPTIONS/SETTINGS
 ----------------------------------
@@ -79,7 +85,11 @@ description).
 
 CONFIG_NIOS -- defined for all Nios-32 boards.
 
-CFG_NIOS_CONSOLE -- the base address of the console UART.
+CFG_NIOS_CONSOLE -- the base address of the console UART or the JTAG
+	stdio port. To enable a console via JTAG, define
+	CONFIG_CONSOLE_JTAG and set CGF_NIOS_CONSOLE to the base address
+	of the JTAG stdio port (normally OCI base + 0x00fa). Then
+	run nios-console with the -w option.
 	(standard-32: nasys_uart_0 resp. na_uart1_base).
 
 CFG_NIOS_FIXEDBAUD -- defined if the console UART PTF fixed_baud
@@ -176,20 +186,109 @@ GERMS monitor (that is, avoid running code stored in flash memory):
     3. Release CFG_NIOS_CPU_BUTTON_PIO, button number 0.
 
 
-5. BRAIN DAMAGE
+5. DEBUGGING WITH GDB
+---------------------
+
+Debug sessions using gdb are currently supported only via JTAG. The
+stubs for debugging via a serial port are not implemented. To enable
+the gdb JTAG stubs, simply reference _brkpt_hw_int and _brkpt_sw_int
+at vector table offsets 3 and 4, respectively. For an example, see
+board/altera/dk1c20/vectors.S.
+
+5.1 Vector Table Initialization and ROM Stubs
+---------------------------------------------
+If CONFIG_ROM_STUBS is defined, the debug breakpoint and single step
+entries in the vector table are restored to their initial values
+immediately _after_ initializing the vector table. Defining this macro
+is useful when ROM-based stubs are implemented.
+
+NOTE: The default GERMS monitor does NOT implement gdb stubs, nor does
+it initialize the vector table. Therefore, when debugging U-Boot, you
+should NOT set a software breakpoint prior to vector table initialization.
+
+5.2 Starting a Debug Session
+----------------------------
+If you're not familiar with gdb, you follow these step-by-step instructions.
+These instructions are NOT the only way to start a debug session, but they
+cover most of the individual functions to get you started.
+
+	1.  Start the JTAG gdb server. Open a Nios shell window and start
+	the server. When the server is started you must provide the base
+	address of the OCI core. For example, when using the Cyclone
+	development kit (DK1C20):
+
+		$ nios-gdb-server --ocibase=0x00920800 --tcpport=2342
+
+	2.  Start gdb. Open a Nios shell window, change to the top-level
+	U-Boot directory and start gdb, specifying the u-boot elf file:
+
+		$ nios-elf-gdb u-boot
+
+	3.  Update target settings. From the file menu, select
+	"Target Settings ..." and select the following, then click 'Ok':
+
+		Target:	Remote/TCP
+		Port :	2342   (same as in step 1)
+		Display download dialog: checked
+		All other check boxes: unchecked
+
+	4.  Connect to the target. Select menu: 'Run->Connect to target'.
+	You should see a dialog box indicating the you successfully connected
+	to the target.
+
+	5.  Download U-Boot. Select menu: 'Run->Download'.
+
+	6.  Open a gdb console window and set the source directory paths.
+	Select menu: 'View->Console'. In the console window, enter the
+	following commands, then close the console window:
+
+		(gdb) directory common
+		(gdb) directory cpu/nios
+		(gdb) directory lib_nios
+		(gdb) directory board/altera/dk1c20
+
+	Note that the last command is for the DK1C20 board only. If you
+	are using another board, specify that board's directory.
+
+	7.  Open the file board.c (using the file menu in the lower
+	left hand corner). Scroll to the board_init() routine and set
+	a breakpoint.
+
+	8. Run U-Boot. Just click on the run icon, or select menu:
+	'Run->Run'. U-Boot should start running, then break at your
+	breakpoint.
+
+	9.  Have fun & start learning more about gdb.
+
+
+5.3 For advanced Users
+----------------------
+A few notes for those more familiar with gdb.
+
+	-Serial port stubs are not implemented. Sorry, but it's just not
+	worth _my_ effort. The JTAG stubs work great and are ridiculously
+	simple to implement.
+
+	-If you need to debug the early startup code (prior to the vector
+	table initialization), use the nios-console debugger.
+
+	- Connect, download & run -- there are some problems here. Connect
+	download and run seperately to avoid trouble.
+
+6. BRAIN DAMAGE
 ----------------
 
 This section describes some of the unfortunate and avoidable aspects
 of working with the Nios CPU ... and some things you can do to
 reduce your pain.
 
-5.1 GERMS doesn't work with Hyperterminal
+6.1 GERMS doesn't work with Hyperterminal
 ------------------------------------------
 GERMS doesn't do CR/LF mapping that is compatible with Hyperterminal
 (or minicom) -- geez. Regardless of you opion of Hyperterminal, this
 sad design decision is remedied by using U-Boot.
 
-5.2 cygwin Incompatibility
+6.2 cygwin Incompatibility
 ---------------------------
 The version of cygwin distributed with the nios GNUPro toolchain is
 out-of-date and incompatible with the latest cygwin distributions.
@@ -202,7 +301,7 @@ topic).
 The solution ... well, you can wait for Altera ... or build as
 set of tools for linux.
 
-5.3 No native gcc
+6.3 No native gcc
 ------------------
 I'm not sure how this one slipped through the cracks ... but it is
 a real pain. Basically, if you want to build anything for the native
@@ -215,7 +314,7 @@ distro. Anybody who wants to use an already precompiled NIOS cross
 toolchain can it found in the CDK4NIOS project hosted by Source
 Forge at http://cdk4nios.sourceforge.net.
 
-5.4 Can't build default U-Boot
+6.4 Can't build default U-Boot
 -------------------------------
 By default, when you build U-Boot you will be building some native
 tools along with the target elf, bin, and srec files. Without a
@@ -232,15 +331,16 @@ environment.o: environment.c ../tools/envcrc
 		-c -o $@ environment.c
 
 With:
-environment.o: environment.c ../tools/envcrc
+environment.o: environment.c
 	$(CC) $(AFLAGS) -Wa,--no-warn \
 		-DENV_CRC=0 \
 		-c -o $@ environment.c
 
-BTW, thats a 'zero' ... not the letter 'O'.
+BTW, thats a 'zero' ... not the letter 'O'. And not that the
+"../tools/envcrc" dependency is removed.
 
 
-6. HELP WANTED
+7. HELP WANTED
 ---------------
 
 There are plenty of areas where help is needed. Here's are some ideas

examples/Makefile

@@ -38,7 +38,7 @@ LOAD_ADDR = 0x80200000 -T mips.lds
 endif
 
 ifeq ($(ARCH),nios)
-LOAD_ADDR = 0x01000000 -L $(gcclibdir)/m32 -T nios.lds
+LOAD_ADDR = 0x00800000 -L $(gcclibdir)/m32 -T nios.lds
 endif
 
 ifeq ($(ARCH),m68k)

include/configs/DK1C20.h

@@ -471,6 +471,7 @@
 				 CFG_CMD_MII	| \
 				 CFG_CMD_PCI	| \
 				 CFG_CMD_PCMCIA | \
+				 CFG_CMD_REISER	| \
 				 CFG_CMD_SCSI	| \
 				 CFG_CMD_SPI	| \
 				 CFG_CMD_VFD	| \

include/nios-io.h

@@ -167,4 +167,17 @@ typedef volatile struct nios_asmi_t {
 #define NIOS_ASMI_IEOP		(1 << 9)	/* rx eop int ena */
 #define NIOS_ASMI_SSO		(1 << 10)	/* slave select enable */
 
+/*------------------------------------------------------------------------
+ * JTAG UART
+ *----------------------------------------------------------------------*/
+typedef volatile struct nios_jtag_t {
+	unsigned short	rxcntl;			/* Rx data/cntl reg */
+	unsigned short	txcntl;			/* Tx data/cntl reg */
+	unsigned short	errcntl;		/* Err dta/cntl reg */
+}nios_jtag_t;
+
+/* status register */
+#define NIOS_JTAG_TRDY		(1 << 8)	/* tx ready bit */
+#define NIOS_JTAG_RRDY		(1 << 8)	/* rx ready bit */
+
 #endif /* __NIOSIO_H__ */

lib_nios/board.c

@@ -49,7 +49,6 @@
 
 extern void malloc_bin_reloc (void);
 typedef int (init_fnc_t) (void);
-extern unsigned _vectors[];
 
 /*
  * Begin and End of memory area for malloc(), and current "brk"
@@ -120,10 +119,6 @@ void board_init (void)
 	gd = (gd_t *)CFG_GBL_DATA_OFFSET;
 	memset( gd, 0, CFG_GBL_DATA_SIZE );
 
-	/* Copy exception vectors to the correct location.
-	 */
-	memcpy( (void *)CFG_VECT_BASE, _vectors, 256 );
-
 	gd->bd = (bd_t *)(gd+1);	/* At end of global data */
 	gd->baudrate = CONFIG_BAUDRATE;
 	gd->cpu_clk = CONFIG_SYS_CLK_FREQ;

nios_config.mk

@@ -22,4 +22,4 @@
 # MA 02111-1307 USA
 #
 
-PLATFORM_CPPFLAGS += -m32 -DCONFIG_NIOS -D__NIOS__ -ffixed-g7
+PLATFORM_CPPFLAGS += -m32 -DCONFIG_NIOS -D__NIOS__ -ffixed-g7 -gstabs