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Kconfig: Add EEPROM options to Kconfig when I2C_EEPROM is set
Add the following options to drivers/misc/Kconfig: SYS_I2C_EEPROM_ADDR SYS_I2C_EEPROM_BUS SYS_EEPROM_SIZE SYS_EEPROM_PAGE_WRITE_BITS SYS_EEPROM_PAGE_WRITE_DELAY_MS SYS_I2C_EEPROM_ADDR_LEN SYS_I2C_EEPROM_ADDR_OVERFLOW This does not migrate any boards, but provides a foundations for those who want/need these options Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Migrate uniphier] Signed-off-by: Tom Rini <trini@konsulko.com>
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@ -35,6 +35,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_GPIO_UNIPHIER=y
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CONFIG_MISC=y
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CONFIG_I2C_EEPROM=y
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CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
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CONFIG_MMC_UNIPHIER=y
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CONFIG_NAND=y
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CONFIG_NAND_DENALI=y
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@ -34,6 +34,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_GPIO_UNIPHIER=y
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CONFIG_MISC=y
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CONFIG_I2C_EEPROM=y
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CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
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CONFIG_MMC_UNIPHIER=y
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CONFIG_NAND=y
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CONFIG_NAND_DENALI=y
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@ -35,6 +35,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_GPIO_UNIPHIER=y
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CONFIG_MISC=y
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CONFIG_I2C_EEPROM=y
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CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
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CONFIG_MMC_UNIPHIER=y
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CONFIG_NAND=y
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CONFIG_NAND_DENALI=y
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@ -28,6 +28,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_GPIO_UNIPHIER=y
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CONFIG_MISC=y
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CONFIG_I2C_EEPROM=y
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CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
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CONFIG_MMC_UNIPHIER=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_CADENCE=y
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@ -196,4 +196,49 @@ config I2C_EEPROM
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depends on MISC
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help
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Enable a generic driver for EEPROMs attached via I2C.
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if I2C_EEPROM
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config SYS_I2C_EEPROM_ADDR
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hex "Chip address of the EEPROM device"
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default 0
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config SYS_I2C_EEPROM_BUS
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int "I2C bus of the EEPROM device."
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default 0
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config SYS_EEPROM_SIZE
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int "Size in bytes of the EEPROM device"
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default 256
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config SYS_EEPROM_PAGE_WRITE_BITS
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int "Number of bits used to address bytes in a single page"
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default 0
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help
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The EEPROM page size is 2^SYS_EEPROM_PAGE_WRITE_BITS.
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A 64 byte page, for example would require six bits.
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config SYS_EEPROM_PAGE_WRITE_DELAY_MS
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int "Number of milliseconds to delay between page writes"
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default 0
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config SYS_I2C_EEPROM_ADDR_LEN
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int "Length in bytes of the EEPROM memory array address"
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default 1
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help
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Note: This is NOT the chip address length!
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config SYS_I2C_EEPROM_ADDR_OVERFLOW
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hex "EEPROM Address Overflow"
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default 0
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help
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EEPROM chips that implement "address overflow" are ones
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like Catalyst 24WC04/08/16 which has 9/10/11 bits of
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address and the extra bits end up in the "chip address" bit
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slots. This makes a 24WC08 (1Kbyte) chip look like four 256
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byte chips.
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endif
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endmenu
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30
env/Kconfig
vendored
30
env/Kconfig
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@ -68,40 +68,10 @@ config ENV_IS_IN_EEPROM
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These two #defines specify the offset and size of the
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environment area within the total memory of your EEPROM.
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- CONFIG_SYS_I2C_EEPROM_ADDR:
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If defined, specified the chip address of the EEPROM device.
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The default address is zero.
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- CONFIG_SYS_I2C_EEPROM_BUS:
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If defined, specified the i2c bus of the EEPROM device.
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- CONFIG_SYS_EEPROM_PAGE_WRITE_BITS:
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If defined, the number of bits used to address bytes in a
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single page in the EEPROM device. A 64 byte page, for example
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would require six bits.
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- CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS:
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If defined, the number of milliseconds to delay between
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page writes. The default is zero milliseconds.
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- CONFIG_SYS_I2C_EEPROM_ADDR_LEN:
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The length in bytes of the EEPROM memory array address. Note
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that this is NOT the chip address length!
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- CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW:
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EEPROM chips that implement "address overflow" are ones
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like Catalyst 24WC04/08/16 which has 9/10/11 bits of
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address and the extra bits end up in the "chip address" bit
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slots. This makes a 24WC08 (1Kbyte) chip look like four 256
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byte chips.
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Note that we consider the length of the address field to
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still be one byte because the extra address bits are hidden
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in the chip address.
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- CONFIG_SYS_EEPROM_SIZE:
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The size in bytes of the EEPROM device.
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- CONFIG_ENV_EEPROM_IS_ON_I2C
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define this, if you have I2C and SPI activated, and your
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EEPROM, which holds the environment, is on the I2C bus.
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@ -13,8 +13,6 @@
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#define CONFIG_ARMV7_PSCI_1_0
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
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/*-----------------------------------------------------------------------
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* MMU and Cache Setting
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*----------------------------------------------------------------------*/
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