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ARM: dts: ast2600: Update SDHCI nodes
Match the description used by the Linux kernel, except use scu instead of syscon as the phandle. Signed-off-by: Joel Stanley <joel@jms.id.au>
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@ -15,9 +15,9 @@
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};
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};
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aliases {
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aliases {
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mmc0 = &emmc_slot0;
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mmc0 = &emmc;
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mmc1 = &sdhci_slot0;
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mmc1 = &sdhci0;
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mmc2 = &sdhci_slot1;
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mmc2 = &sdhci1;
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spi0 = &fmc;
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spi0 = &fmc;
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spi1 = &spi1;
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spi1 = &spi1;
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spi2 = &spi2;
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spi2 = &spi2;
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@ -134,18 +134,16 @@
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};
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};
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};
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};
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&emmc {
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u-boot,dm-pre-reloc;
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&emmc_controller {
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timing-phase = <0x700ff>;
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status = "okay";
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};
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};
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&emmc_slot0 {
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&emmc {
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u-boot,dm-pre-reloc;
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non-removable;
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status = "okay";
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bus-width = <4>;
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bus-width = <4>;
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max-frequency = <100000000>;
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pinctrl-names = "default";
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clk-phase-mmc-hs200 = <9>, <225>;
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pinctrl-0 = <&pinctrl_emmc_default>;
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sdhci-drive-type = <1>;
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};
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};
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&i2c4 {
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&i2c4 {
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@ -416,60 +416,51 @@
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status = "disabled";
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status = "disabled";
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};
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};
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sdhci: sdhci@1e740000 {
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sdc: sdc@1e740000 {
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#interrupt-cells = <1>;
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compatible = "aspeed,ast2600-sd-controller";
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compatible = "aspeed,aspeed-sdhci-irq", "simple-mfd";
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reg = <0x1e740000 0x100>;
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reg = <0x1e740000 0x1000>;
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interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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clocks = <&scu ASPEED_CLK_GATE_SDCLK>,
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<&scu ASPEED_CLK_GATE_SDEXTCLK>;
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clock-names = "ctrlclk", "extclk";
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x1e740000 0x1000>;
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ranges = <0 0x1e740000 0x10000>;
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clocks = <&scu ASPEED_CLK_GATE_SDCLK>;
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status = "disabled";
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sdhci_slot0: sdhci_slot0@100 {
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sdhci0: sdhci@1e740100 {
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compatible = "aspeed,sdhci-ast2600";
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compatible = "aspeed,ast2600-sdhci", "sdhci";
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reg = <0x100 0x100>;
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reg = <0x100 0x100>;
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interrupts = <0>;
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interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&sdhci>;
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sdhci,auto-cmd12;
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sdhci,auto-cmd12;
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clocks = <&scu ASPEED_CLK_SDIO>;
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clocks = <&scu ASPEED_CLK_SDIO>;
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status = "disabled";
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status = "disabled";
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};
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};
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sdhci_slot1: sdhci_slot1@200 {
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sdhci1: sdhci@1e740200 {
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compatible = "aspeed,sdhci-ast2600";
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compatible = "aspeed,ast2600-sdhci", "sdhci";
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reg = <0x200 0x100>;
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reg = <0x200 0x100>;
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interrupts = <1>;
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interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&sdhci>;
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sdhci,auto-cmd12;
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sdhci,auto-cmd12;
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clocks = <&scu ASPEED_CLK_SDIO>;
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clocks = <&scu ASPEED_CLK_SDIO>;
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status = "disabled";
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status = "disabled";
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};
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};
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};
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};
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emmc: emmc@1e750000 {
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emmc_controller: sdc@1e750000 {
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#interrupt-cells = <1>;
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compatible = "aspeed,ast2600-sd-controller";
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compatible = "aspeed,aspeed-emmc-irq", "simple-mfd";
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reg = <0x1e750000 0x100>;
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reg = <0x1e750000 0x1000>;
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interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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clocks = <&scu ASPEED_CLK_GATE_EMMCCLK>,
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<&scu ASPEED_CLK_GATE_EMMCEXTCLK>;
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clock-names = "ctrlclk", "extclk";
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x1e750000 0x1000>;
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ranges = <0 0x1e750000 0x10000>;
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clocks = <&scu ASPEED_CLK_GATE_EMMCCLK>;
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status = "disabled";
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emmc_slot0: emmc_slot0@100 {
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emmc: sdhci@1e750100 {
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compatible = "aspeed,emmc-ast2600";
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compatible = "aspeed,ast2600-sdhci";
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reg = <0x100 0x100>;
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reg = <0x100 0x100>;
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interrupts = <0>;
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sdhci,auto-cmd12;
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interrupt-parent = <&emmc>;
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interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&scu ASPEED_CLK_EMMC>;
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clocks = <&scu ASPEED_CLK_EMMC>;
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status = "disabled";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_emmc_default>;
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};
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};
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};
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};
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